0 8:52:44 PM UV3BAND_E_CPS. IRP_MJ_CREATE ProlificSerial0 SUCCESS Options: Open 1 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_QUEUE_SIZE ProlificSerial0 SUCCESS InSize: 1024 OutSize: 512 3 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 4 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_TIMEOUTS ProlificSerial0 SUCCESS RI:-1 RM:0 RC:0 WM:0 WC:5000 5 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 6 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 7 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 8 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 10 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 11 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 12 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 14 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 15 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 16 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_BAUD_RATE ProlificSerial0 SUCCESS Rate: 9600 17 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_CLR_RTS ProlificSerial0 SUCCESS 18 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_DTR ProlificSerial0 SUCCESS 19 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_LINE_CONTROL ProlificSerial0 SUCCESS StopBits: 1 Parity: NONE WordLength: 8 20 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_CHAR ProlificSerial0 SUCCESS EOF:1a ERR:0 BRK:0 EVT:0 XON:11 XOFF:13 21 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_HANDFLOW ProlificSerial0 SUCCESS Shake:1 Replace:0 XonLimit:256 XoffLimit:256 22 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: 23 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_CLR_DTR ProlificSerial0 SUCCESS 24 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 25 8:52:44 PM UV3BAND_E_CPS. IRP_MJ_CLEANUP ProlificSerial0 SUCCESS 26 8:52:44 PM UV3BAND_E_CPS. IRP_MJ_CLOSE ProlificSerial0 SUCCESS 27 8:52:44 PM UV3BAND_E_CPS. IRP_MJ_CREATE ProlificSerial0 SUCCESS Options: Open 28 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 29 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_QUEUE_SIZE ProlificSerial0 SUCCESS InSize: 1024 OutSize: 512 30 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 31 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_TIMEOUTS ProlificSerial0 SUCCESS RI:-1 RM:0 RC:0 WM:0 WC:5000 32 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 33 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 34 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 36 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 35 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 37 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 38 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 39 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 40 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 41 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 42 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 43 8:52:44 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_BAUD_RATE ProlificSerial0 SUCCESS Rate: 9600 44 8:52:45 PM UV3BAND_E_CPS. IOCTL_SERIAL_CLR_RTS ProlificSerial0 SUCCESS 45 8:52:45 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_DTR ProlificSerial0 SUCCESS 46 8:52:45 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_LINE_CONTROL ProlificSerial0 SUCCESS StopBits: 1 Parity: NONE WordLength: 8 47 8:52:45 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_CHAR ProlificSerial0 SUCCESS EOF:1a ERR:0 BRK:0 EVT:0 XON:11 XOFF:13 48 8:52:45 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_HANDFLOW ProlificSerial0 SUCCESS Shake:1 Replace:0 XonLimit:256 XoffLimit:256 49 8:52:45 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 50 8:52:45 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 51 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 52 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 55 53 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 54 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 55 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 58 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 59 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 60 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 15 67 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 71 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 72 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 73 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 09 74 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 75 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 78 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 79 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 80 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 25 81 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 82 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 83 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 85 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 86 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 87 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 88 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 89 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 92 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 93 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 4D 95 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 96 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 97 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 98 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 99 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 100 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 02 102 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 103 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 104 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 105 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 106 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 107 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 110 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 111 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 112 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 113 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 114 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 117 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 118 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 119 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 120 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 121 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 122 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 123 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 124 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 125 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 126 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 127 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 128 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 129 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 130 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 131 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 132 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 133 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 134 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 135 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 136 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 137 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 138 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 139 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 140 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 141 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 142 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 143 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 144 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 145 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 146 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 147 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 148 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 149 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 150 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 151 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 152 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 153 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 154 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 155 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 156 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 157 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 158 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 159 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 160 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 161 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 162 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 163 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 164 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 165 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 166 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 167 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 168 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 169 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 170 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 171 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 172 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 173 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 174 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 175 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 176 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 177 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 178 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 179 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 180 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 181 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 182 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 183 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 184 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 185 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 186 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 187 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 188 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 189 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 190 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 191 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 192 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 193 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 194 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 195 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 196 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 197 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 198 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 199 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 200 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 201 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 202 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 203 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 204 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 205 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 206 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 207 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 208 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 209 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 210 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 211 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 212 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 213 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 214 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 215 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 216 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 217 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 218 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 219 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 220 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 221 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 222 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 223 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 224 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 225 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 226 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 227 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 228 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 229 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 230 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 231 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 232 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 233 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 234 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 235 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 236 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 237 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 238 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 239 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 240 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 241 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 242 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 243 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 244 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 245 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 246 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 247 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 248 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 249 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 250 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 251 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 252 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 253 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 254 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 255 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 256 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 257 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 258 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 259 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 260 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 261 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 262 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 263 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 264 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 265 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 266 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 267 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 268 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 269 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 270 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 271 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 272 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 273 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 274 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 275 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 276 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 277 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 278 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 279 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 280 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 281 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 282 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 283 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 284 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 285 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 286 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 288 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 287 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 289 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 290 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 291 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 292 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 293 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 294 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 295 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 296 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 297 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 298 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 299 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 300 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 301 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 302 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 303 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 304 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 305 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 306 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 307 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 308 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 309 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 310 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 311 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 312 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 313 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 314 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 315 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 316 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 317 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 318 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 319 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 320 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 321 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 322 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 323 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 324 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 325 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 326 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 327 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 328 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 329 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 330 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 331 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 332 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 333 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 334 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 335 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 336 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 337 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 338 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 339 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 340 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 341 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 342 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 343 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 344 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 345 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 346 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 347 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 348 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 349 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 350 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 351 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 352 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 353 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 354 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 355 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 356 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 357 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 358 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 359 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 03 360 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 361 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 362 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 363 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 364 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 365 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 07 366 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 367 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 368 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 369 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 370 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 371 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 372 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 373 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 374 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 375 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 376 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 377 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 48 378 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 379 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 54 380 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 381 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 59 382 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 383 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 33 384 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 385 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 386 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 387 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 388 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 389 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 02 390 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 391 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 392 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 393 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 394 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 395 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 02 396 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 397 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 07 398 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 399 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 400 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 401 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 402 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 403 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 404 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 405 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 406 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 407 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 408 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 409 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 4D 410 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 411 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 33 412 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 413 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 47 414 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 415 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 32 416 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 417 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 31 418 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 419 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 34 420 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 421 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 422 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 423 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 424 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 425 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 426 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 427 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 428 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 429 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 08 430 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 431 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 432 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 433 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 434 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 435 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 436 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 437 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 438 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 439 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 440 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 441 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 442 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 443 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 444 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 445 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 446 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 447 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 448 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 449 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 450 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 451 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 452 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 453 8:52:47 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 55 454 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 455 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 456 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 457 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 458 8:52:47 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 459 8:52:48 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: 460 8:52:48 PM UV3BAND_E_CPS. IOCTL_SERIAL_CLR_DTR ProlificSerial0 SUCCESS 461 8:52:48 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 462 8:52:48 PM UV3BAND_E_CPS. IRP_MJ_CLEANUP ProlificSerial0 SUCCESS 463 8:52:48 PM UV3BAND_E_CPS. IRP_MJ_CLOSE ProlificSerial0 SUCCESS 464 8:53:07 PM UV3BAND_E_CPS. IRP_MJ_CREATE ProlificSerial0 SUCCESS Options: Open 465 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 466 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_QUEUE_SIZE ProlificSerial0 SUCCESS InSize: 1024 OutSize: 512 467 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 468 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_TIMEOUTS ProlificSerial0 SUCCESS RI:-1 RM:0 RC:0 WM:0 WC:5000 469 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 470 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 471 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 472 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 473 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 474 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 475 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 476 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 477 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 478 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 479 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 480 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_BAUD_RATE ProlificSerial0 SUCCESS Rate: 9600 481 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_CLR_RTS ProlificSerial0 SUCCESS 482 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_DTR ProlificSerial0 SUCCESS 483 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_LINE_CONTROL ProlificSerial0 SUCCESS StopBits: 1 Parity: NONE WordLength: 8 484 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_CHAR ProlificSerial0 SUCCESS EOF:1a ERR:0 BRK:0 EVT:0 XON:11 XOFF:13 485 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_HANDFLOW ProlificSerial0 SUCCESS Shake:1 Replace:0 XonLimit:256 XoffLimit:256 486 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 487 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 488 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 489 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 490 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 491 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 55 492 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 493 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 494 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 495 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 496 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 497 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 498 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 499 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 500 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 501 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 502 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 503 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 15 504 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 505 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 506 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 507 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 508 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 509 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 09 510 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 511 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 512 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 513 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 514 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 515 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 25 516 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 517 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 518 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 519 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 520 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 521 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 522 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 523 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 524 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 525 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 526 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 527 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 4D 528 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 529 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 530 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 531 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 532 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 533 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 02 534 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 535 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 536 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 537 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 538 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 539 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 540 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 541 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 542 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 543 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 544 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 545 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 546 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 547 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 548 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 549 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 550 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 551 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 552 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 553 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 554 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 555 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 556 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 557 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 558 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 559 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 560 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 561 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 562 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 563 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 564 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 565 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 566 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 567 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 568 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 569 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 570 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 571 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 572 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 573 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 574 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 575 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 576 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 577 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 578 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 579 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 580 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 581 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 582 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 583 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 584 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 585 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 586 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 587 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 588 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 589 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 590 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 592 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 591 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 593 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 594 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 595 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 596 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 597 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 598 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 599 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 600 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 601 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 602 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 603 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 604 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 605 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 606 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 607 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 608 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 609 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 610 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 611 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 612 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 613 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 614 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 615 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 616 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 617 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 618 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 619 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 620 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 621 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 622 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 623 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 624 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 625 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 626 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 627 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 628 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 629 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 630 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 631 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 632 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 633 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 634 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 635 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 636 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 637 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 638 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 639 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 640 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 641 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 642 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 643 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 644 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 645 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 646 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 647 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 648 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 649 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 650 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 651 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 652 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 653 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 654 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 655 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 656 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 657 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 658 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 659 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 660 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 661 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 662 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 663 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 664 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 665 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 666 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 667 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 668 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 669 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 670 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 671 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 672 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 673 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 674 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 675 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 676 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 677 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 678 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 679 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 680 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 681 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 682 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 683 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 684 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 685 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 686 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 687 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 688 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 689 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 690 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 691 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 692 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 693 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 694 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 695 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 696 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 697 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 698 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 699 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 700 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 701 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 702 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 703 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 704 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 705 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 706 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 707 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 708 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 709 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 710 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 711 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 712 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 713 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 714 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 715 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 716 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 717 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 718 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 719 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 720 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 721 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 722 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 723 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 724 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 725 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 726 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 727 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 728 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 729 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 730 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 731 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 732 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 733 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 734 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 735 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 737 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 736 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 738 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 739 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 740 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 741 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 742 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 743 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 744 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 745 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 746 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 747 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 748 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 749 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 750 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 751 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 752 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 753 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 754 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 755 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 756 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 757 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 758 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 759 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 760 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 761 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 762 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 763 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 764 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 765 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 766 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 767 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 768 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 769 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 770 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 771 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 772 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 773 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 774 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 775 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 776 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 777 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 778 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 779 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 780 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 781 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 782 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 783 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 784 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 785 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 786 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 787 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 788 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 789 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 790 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 791 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 792 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 793 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 794 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 795 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 796 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 797 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 798 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 03 799 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 800 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 801 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 802 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 803 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 804 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 07 805 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 806 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 807 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 808 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 809 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 810 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 811 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 812 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 813 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 814 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 815 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 816 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 48 817 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 818 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 54 819 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 820 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 59 821 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 822 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 33 823 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 824 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 825 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 826 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 827 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 828 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 02 829 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 830 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 831 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 832 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 833 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 834 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 02 835 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 836 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 07 837 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 838 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 839 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 840 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 841 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 842 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 843 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 844 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 845 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 846 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 847 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 848 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 4D 849 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 850 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 33 851 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 852 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 47 853 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 854 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 32 855 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 856 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 31 857 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 858 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 34 859 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 860 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 861 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 862 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 863 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 864 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 865 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 866 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 867 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 868 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 08 869 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 870 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 871 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 872 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 873 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 874 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 875 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 876 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 877 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 878 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 879 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 880 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 881 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 882 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 883 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 884 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 885 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 886 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 887 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 888 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 889 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 890 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 891 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 892 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 55 893 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 894 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 895 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 896 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 897 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 898 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 899 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 900 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 901 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 902 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 903 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 904 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 905 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 906 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 907 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 908 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 909 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 910 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 911 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 912 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 913 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 914 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 915 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 916 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 917 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 3D 918 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 919 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 920 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 921 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 922 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 923 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 924 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 925 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 926 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 927 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 928 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 929 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 930 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 931 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 932 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 933 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 934 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 935 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 936 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 937 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 938 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 939 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 940 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 941 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 942 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 943 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 944 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 945 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 946 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 947 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 948 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 949 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 950 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 951 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 952 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 953 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 954 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 955 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 956 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 957 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 958 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 959 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 960 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 961 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 962 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 963 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 964 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 965 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 966 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 967 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 968 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 969 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 970 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 971 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 972 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 973 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 974 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 975 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 976 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 977 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 978 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 979 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 980 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 981 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 982 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 983 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 984 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 985 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 986 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 987 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 988 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 989 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 990 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 991 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 992 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 993 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 994 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 995 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 996 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 997 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 998 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 999 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1000 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1001 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1002 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1003 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1004 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1005 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1006 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1007 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1008 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1009 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1010 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1011 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1012 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1013 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1014 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1015 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1016 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1017 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1018 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1019 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1020 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1021 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1022 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1023 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1024 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1025 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1026 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1027 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1028 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1029 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1030 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1031 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1032 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1034 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1033 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1035 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1036 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 1037 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1038 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 3D 1039 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1040 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: F0 1041 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1042 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 10 1043 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1044 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 1045 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1046 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 1047 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1048 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 1049 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1050 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 1051 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1052 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 1053 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1054 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 1055 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1056 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 32 1057 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1058 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 1059 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1060 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 30 1061 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1062 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 35 1063 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1064 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 32 1065 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1066 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 1067 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1068 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1069 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1070 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1071 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1072 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1073 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1074 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1075 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1076 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 1077 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1078 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1079 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1080 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 1081 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1082 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1083 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1084 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 1085 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1086 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1087 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1088 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1089 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1090 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1091 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1092 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1093 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1094 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1095 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1096 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 1097 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1098 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1099 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1100 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1101 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1102 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 1103 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1104 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1105 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1106 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1107 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1108 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 1109 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1110 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1111 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1112 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1113 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1114 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 1115 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1116 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1117 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1118 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1119 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1120 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1121 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1122 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1123 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1124 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1125 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1126 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1127 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1128 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1129 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1130 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1131 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1132 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1133 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1134 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1135 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1136 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1137 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1138 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1139 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1140 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1141 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1142 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1143 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1144 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1145 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1146 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1147 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1148 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1149 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1150 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1151 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1152 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1153 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1154 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1155 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1156 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1157 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1158 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1159 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1160 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1161 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1162 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1163 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1164 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1165 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1166 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1167 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1168 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1169 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1170 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1171 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1172 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1173 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1174 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1175 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1176 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1177 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1178 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1179 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1180 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1181 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1182 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1183 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1184 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1185 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1186 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1187 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1188 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1189 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1190 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1191 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1192 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1193 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1194 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1195 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1196 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1197 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1198 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1199 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1200 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1201 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1202 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1203 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1204 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1205 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1206 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1207 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1208 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1209 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1210 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1211 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1212 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1213 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1214 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1215 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1216 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1217 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1218 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1219 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1220 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1221 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1222 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1223 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1224 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1225 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1226 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1227 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1228 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1229 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1230 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1231 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1232 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1233 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1234 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1235 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1236 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1237 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1238 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1239 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1240 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1241 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1242 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1243 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1244 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1245 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1246 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1247 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1248 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1249 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1250 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1251 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1252 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1253 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1254 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1256 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1255 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1257 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1258 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1259 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1260 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1262 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1261 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1263 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1264 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1265 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1266 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1267 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1268 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1269 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1270 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1271 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1272 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1273 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1274 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1275 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1276 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1277 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1278 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1280 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1279 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1281 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1282 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1283 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1284 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1285 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1286 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1287 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1288 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1289 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1290 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1291 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1292 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1293 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1294 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1295 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1296 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1297 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1298 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1299 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1300 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1301 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1302 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1303 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1304 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1305 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1306 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1307 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1308 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1309 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1310 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1311 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1312 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1313 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1314 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1315 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1316 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1317 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1318 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1319 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1320 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1322 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1321 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1323 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1324 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1325 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1326 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1327 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1328 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1329 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1330 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1331 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1332 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1333 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1334 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1335 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1336 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1337 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1338 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1339 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1340 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1341 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1342 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1343 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1344 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1345 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1346 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1347 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1348 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1349 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1350 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1351 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1352 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1353 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1354 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1355 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1356 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1357 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1358 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1359 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1360 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1361 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1362 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1363 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1364 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1365 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1366 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1367 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1368 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1369 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1370 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1371 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1372 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1373 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1374 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1375 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1376 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1377 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1378 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1379 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1380 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1381 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1382 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1383 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1384 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1385 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1386 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1387 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1388 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1389 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1390 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1391 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1392 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1393 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1394 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1395 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1396 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1397 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1398 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1399 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1400 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1401 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1402 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1403 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1404 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1405 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1406 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1407 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1408 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1409 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1410 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1411 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1412 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1413 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1414 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1415 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1416 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1418 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1417 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1419 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1420 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1421 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1422 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1424 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1423 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1425 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1426 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1427 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1428 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1429 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1430 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1431 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1432 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1433 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1434 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1435 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1436 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1437 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1438 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1439 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1440 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1441 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1442 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1443 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1444 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1445 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1446 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1447 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1448 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1449 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1450 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1451 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1452 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1453 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1454 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1455 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1456 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1457 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1458 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1459 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1460 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1461 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1462 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1463 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1464 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1465 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1466 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1467 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1468 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1469 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1470 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1471 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1472 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1473 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1474 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1475 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1476 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1477 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1478 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1479 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1480 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1481 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1482 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1483 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1484 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1485 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1486 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1487 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1488 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1489 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1490 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1491 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1492 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1493 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1494 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1495 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1496 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1497 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1498 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1499 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1500 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1501 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1502 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1503 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1504 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1505 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1506 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1507 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1508 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1509 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1510 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1511 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1512 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1513 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1514 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1515 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1516 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1517 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1518 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1519 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1520 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1521 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1522 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1523 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1524 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1525 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1526 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1527 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1528 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 1529 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1530 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 1531 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1532 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1533 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1534 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1535 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1536 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 1537 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1538 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1539 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1540 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 25 1541 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1542 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 46 1543 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1544 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 14 1545 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1546 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1547 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1548 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 25 1549 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1550 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 46 1551 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1552 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 14 1553 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1554 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1555 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1556 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1557 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1558 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1559 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1560 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1561 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1562 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1563 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1564 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1565 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1566 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 1567 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1568 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 1569 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1570 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1571 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1572 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1573 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1574 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1575 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1576 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1577 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1578 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1579 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1580 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1581 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1582 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1583 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1584 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1585 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1586 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1587 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1588 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1589 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1590 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1591 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1592 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1593 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1594 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1595 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1596 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1597 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1598 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1599 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1600 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1601 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1602 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1603 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1604 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1605 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1606 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1607 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1608 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1609 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1610 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1611 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1612 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1613 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1614 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1615 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1616 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1617 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1618 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1619 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1620 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1621 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1622 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1623 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1624 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1625 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1626 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1627 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1628 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1629 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1630 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1631 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1632 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1633 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1634 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1635 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1636 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1637 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1638 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1639 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1640 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1641 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1642 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1643 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1644 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1645 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1646 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1647 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1648 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1649 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1650 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1651 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1652 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1653 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1654 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1655 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1656 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1657 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1658 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1659 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1660 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1661 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1662 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1663 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1664 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 1665 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1666 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 1667 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1668 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1669 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1670 8:53:08 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 1671 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1672 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1673 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1674 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1675 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1676 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1677 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1678 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1679 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1680 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1681 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1682 8:53:08 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1683 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1684 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1685 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 1686 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1687 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1688 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1689 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1690 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1691 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 1692 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1693 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1694 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1695 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1696 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1697 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 1698 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1699 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1700 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1701 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1702 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 1703 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 1704 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1705 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1706 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1707 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1708 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1709 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1710 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1711 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1712 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1713 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1714 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1715 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1716 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1717 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1718 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1719 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1720 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1721 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1722 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1723 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1724 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1725 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1726 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1727 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1728 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1729 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1730 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1731 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1732 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1733 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1734 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1735 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1736 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1737 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1738 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1739 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1740 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1741 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1742 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1743 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1744 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1745 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1746 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1747 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1748 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1749 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1750 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1751 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1752 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1753 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1754 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1755 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1756 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1757 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1758 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1759 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1760 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1761 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1762 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1763 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1764 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1765 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1766 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1767 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1768 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1769 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1770 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1771 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1772 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1773 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1774 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1775 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1776 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1777 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1778 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1779 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1780 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1781 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1782 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1783 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1784 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1785 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1786 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1787 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1788 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1789 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1790 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1791 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1792 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1793 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1794 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1795 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1796 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1797 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1798 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1799 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1800 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1801 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1802 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1803 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1804 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1805 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1806 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1807 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1808 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1809 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1810 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1811 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1812 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1813 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1814 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1815 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1816 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1817 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1818 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1819 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1820 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1821 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1822 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1823 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1824 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1825 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1826 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1827 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1828 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1829 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1830 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1831 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1832 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1833 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1834 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1835 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1836 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1837 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1838 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1839 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1840 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1841 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1842 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1843 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1844 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1845 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1846 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1847 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1848 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1849 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1850 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1851 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1852 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1853 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1854 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1855 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1856 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1857 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1858 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1859 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1860 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1861 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1862 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1863 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1864 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1865 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1866 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1867 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1868 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1869 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1870 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1871 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1872 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1873 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1874 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1875 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1876 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1877 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1878 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1879 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1880 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1881 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1882 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1883 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1884 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1885 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1886 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1887 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1888 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1889 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1890 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1891 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1892 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1893 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1894 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1895 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1896 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1897 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1898 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1899 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1900 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1901 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1902 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1903 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1904 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1905 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1906 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1907 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1908 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1909 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1910 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1911 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1912 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1913 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1914 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1915 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1916 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1917 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1918 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1919 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1920 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1921 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1922 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1923 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1924 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1925 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1926 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1927 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1928 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1929 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1930 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1931 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1932 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1933 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1934 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1935 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1936 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1937 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1938 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1939 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1940 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1941 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1942 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1943 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1944 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1945 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1946 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1947 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1948 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1949 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1950 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1951 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1952 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1953 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1954 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1955 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1956 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1957 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1958 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1959 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1960 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1961 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1962 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1963 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1964 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1965 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1966 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1967 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1968 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1969 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1970 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1971 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1972 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1973 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1974 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1975 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1976 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1977 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1978 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1979 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1980 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1981 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1982 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1983 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1984 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1985 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1986 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1987 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1988 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1989 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1990 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1991 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1992 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1993 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 1994 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 1995 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1996 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1997 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1998 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 1999 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2000 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2001 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2002 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2003 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2004 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2005 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2006 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2007 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2008 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2009 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2010 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2011 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2012 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2013 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2014 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2015 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2016 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2017 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2018 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2019 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2020 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2021 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2022 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2023 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2024 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2025 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2026 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2027 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2028 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2029 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2030 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2031 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2032 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2033 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2034 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2035 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2036 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2037 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2038 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2039 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2040 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2041 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2042 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2043 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2044 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2045 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2046 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2047 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2048 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2049 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2050 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2051 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2052 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2053 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2055 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2054 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2056 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2057 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2058 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2059 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2060 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2061 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2062 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2063 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2064 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2065 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2066 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2067 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2068 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2069 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2070 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2071 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2072 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2073 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2074 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2075 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2076 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2077 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2078 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2079 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2080 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2081 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2082 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2083 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2084 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2085 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2086 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2087 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2088 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2089 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2090 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2091 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2092 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2093 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2094 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2095 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2096 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2097 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2098 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2099 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2100 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2101 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2102 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2103 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2104 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2105 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2106 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2107 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2109 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2108 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2110 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2111 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2112 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2113 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2114 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2115 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2116 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2117 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 2118 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2119 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 2120 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2121 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 10 2122 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2123 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 2124 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2125 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 2126 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2127 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2128 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2129 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2130 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2131 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2132 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2133 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2134 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2135 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2136 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2137 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2138 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2139 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2140 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2141 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2142 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2143 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2144 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2145 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2146 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2147 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2148 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2149 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2150 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2151 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2152 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2153 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2154 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2155 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2156 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2157 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2158 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2159 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2160 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2161 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2162 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2163 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2164 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2165 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2166 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2167 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2168 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2169 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2170 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2171 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2172 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2173 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2174 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2175 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2176 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2177 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2178 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2179 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2180 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2181 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2182 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2183 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2184 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2185 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2186 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2187 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2188 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2189 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2190 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2191 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2192 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2193 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2194 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2195 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2196 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2197 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2198 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2199 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2200 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2201 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2202 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2203 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2204 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2205 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2206 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2207 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2208 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2209 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2210 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2211 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2212 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2213 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2214 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2215 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2216 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2217 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2218 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2219 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2220 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2221 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2222 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2223 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2224 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2225 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2226 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2227 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2228 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2229 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2230 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2231 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2232 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2233 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2234 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2235 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2236 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2237 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2238 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2239 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2240 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2241 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2242 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2243 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2244 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2245 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2246 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2247 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2248 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2249 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2250 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2251 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2252 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2253 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2254 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2255 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 2256 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2257 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2258 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2259 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 2260 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2261 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2262 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2263 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2264 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2265 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2266 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2267 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2268 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2269 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2270 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2271 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2272 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2273 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2274 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 2275 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2276 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2277 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2278 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2279 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2280 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 2281 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2282 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2283 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2284 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2285 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2286 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 2287 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2288 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2289 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2290 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2291 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2292 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 2293 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2294 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2295 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2296 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2297 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2298 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2299 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2300 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2301 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2302 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2303 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2304 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2305 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2306 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2307 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2308 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2309 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2310 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2311 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2312 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2313 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2314 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2315 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2316 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2317 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2318 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2319 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2320 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2321 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2322 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2323 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2324 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2325 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2326 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2327 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2328 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2329 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2330 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2331 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2332 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2333 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2334 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2335 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2336 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2337 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2338 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2339 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2340 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2341 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2342 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2343 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2344 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2345 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2346 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2347 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2348 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2349 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2350 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2351 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2352 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2353 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2354 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2355 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2356 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2357 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2358 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2359 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2360 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2361 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2362 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2363 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2364 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2365 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2366 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2368 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2367 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2369 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2370 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2371 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2372 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2373 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2374 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2375 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2376 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2377 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2378 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2379 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2380 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2381 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2382 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2383 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2384 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2385 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2386 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2387 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2388 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2389 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2390 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2391 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2392 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2393 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2394 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2395 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2396 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2397 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2398 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2399 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2400 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2401 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2402 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2403 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2404 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2405 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2406 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2407 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2408 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2409 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2410 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2411 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2412 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2413 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2414 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2415 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2416 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2417 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2418 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2419 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2420 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2421 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2422 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2423 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2424 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2425 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2426 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2427 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2428 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2429 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2430 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2431 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2432 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2433 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2434 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2435 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2436 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2437 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2438 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2440 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2439 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2441 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2442 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2443 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2444 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2445 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2446 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2447 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2448 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2449 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2450 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2451 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2452 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2453 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2454 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2455 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2456 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2457 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2458 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2459 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2460 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2461 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2462 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2463 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2464 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2465 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2466 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2467 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2468 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2469 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2470 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2471 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2472 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2473 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2474 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2475 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2476 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2477 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2478 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2479 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2480 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2481 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2482 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2483 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2484 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2485 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2486 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2487 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2488 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2489 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2490 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2491 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2492 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2493 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2494 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2495 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2496 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2497 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2498 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2499 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2500 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2501 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2502 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2503 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2504 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2505 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2506 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2507 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2508 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2509 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2510 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2511 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2512 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2513 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2514 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2515 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2516 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2517 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2518 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2519 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2520 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2521 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2522 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2523 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2524 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2525 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2526 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2527 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2528 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2529 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2530 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2531 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2532 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2533 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2534 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2535 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2536 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2537 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2538 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2539 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2540 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2541 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2542 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2543 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2544 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2545 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2546 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2547 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2548 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2549 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2550 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2551 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2552 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2553 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2554 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2555 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2556 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2557 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2558 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2559 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2560 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2561 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2562 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2563 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2564 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2565 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2566 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2567 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2568 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2569 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2570 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2571 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2572 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2573 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2574 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2575 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2576 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2577 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2578 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2579 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2580 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2581 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2582 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2583 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2584 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2585 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2586 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2587 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2588 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2589 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2590 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2591 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2592 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2593 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2594 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2595 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2596 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2597 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2598 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2599 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2600 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2601 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2602 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2603 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2604 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2605 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2606 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2607 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2608 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2609 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2610 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2611 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2612 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2613 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2614 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2615 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2616 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2617 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2618 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2619 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2620 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2621 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2622 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2623 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2624 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2625 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2626 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2627 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2628 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2629 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2630 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2631 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2632 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2633 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2634 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2635 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2636 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2637 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2638 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2639 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2640 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2641 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2642 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2643 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2644 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2645 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2646 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2647 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2648 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2649 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2650 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2651 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2652 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2653 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2654 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2655 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2656 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2657 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2658 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2659 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2660 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2661 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2662 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2663 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2664 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2665 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2666 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2667 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2668 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2669 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2670 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2671 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2672 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2674 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2673 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2675 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2676 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2677 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2678 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2679 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2680 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2681 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2682 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2683 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2684 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2685 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2686 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2687 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2688 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2689 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2690 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2691 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2692 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2693 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2694 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2695 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2696 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2697 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2698 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2699 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2700 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2701 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2702 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2703 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2704 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2705 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2706 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 2707 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2708 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 2709 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2710 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 2711 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2712 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 80 2713 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2714 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 2715 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2716 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2717 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2718 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2719 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2720 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2721 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2722 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2723 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2724 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2725 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2726 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2727 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2728 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2729 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2730 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2731 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2732 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2733 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2734 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2735 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2736 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2737 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2738 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2739 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2740 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2741 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2742 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2743 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2744 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2745 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2746 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2747 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2748 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2749 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2750 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2751 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2752 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2753 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2754 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2755 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2756 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2757 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2758 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2759 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2760 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2761 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2762 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2763 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2764 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2765 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2766 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2767 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2768 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2769 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2770 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2771 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2772 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2773 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2774 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2775 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2776 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2777 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2778 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2779 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2780 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2781 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2782 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2783 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2784 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2785 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2786 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2787 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2788 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2789 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2790 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2791 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2792 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2793 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2794 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2795 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2796 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2797 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2798 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2799 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2800 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2801 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2802 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2803 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2804 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2805 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2806 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2807 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2808 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2809 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2810 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2811 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2812 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2813 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2814 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2815 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2816 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2817 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2818 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2819 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2820 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2821 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2822 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2823 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2824 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2825 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2826 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2827 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2828 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2829 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2830 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2831 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2832 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2833 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2834 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2835 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2836 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2837 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2838 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2839 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2840 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2841 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2842 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 2843 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2844 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 2845 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2846 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2847 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2848 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 2849 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2850 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2851 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2852 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2853 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2854 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2855 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2856 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2857 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2858 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2859 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2860 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2861 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2862 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2863 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 2864 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2865 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2866 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2867 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2868 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2869 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 2870 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2871 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2872 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2873 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2874 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2875 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 2876 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2877 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2878 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2879 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2880 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 2881 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 2882 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2883 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2884 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2885 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2886 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2887 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2888 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2889 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2890 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2891 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2892 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2893 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2894 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2895 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2896 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2897 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2898 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2899 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2900 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2901 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2902 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2903 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2904 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2905 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2906 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2907 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2908 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2909 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2910 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2911 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2912 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2913 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2914 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2915 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2916 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2917 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2918 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2919 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2920 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2921 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2922 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2923 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2924 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2925 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2926 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2927 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2928 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2929 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2930 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2931 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2932 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2933 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2934 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2935 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2936 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2937 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2938 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2939 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2940 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2941 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2942 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2943 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2945 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2944 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2946 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2947 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2948 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2949 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2950 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2951 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2952 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2953 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2954 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2955 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2956 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2957 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2958 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2959 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2960 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2961 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2962 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2963 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2964 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2965 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2966 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2967 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2968 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2969 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2970 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2971 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2972 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2973 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2974 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2975 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2976 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2977 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2978 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2979 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2980 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2981 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2982 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2983 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2984 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2985 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2986 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2987 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2988 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2989 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2990 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2991 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2992 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2993 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 2994 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2995 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2996 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2997 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 2998 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 2999 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3000 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3001 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3002 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3003 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3004 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3005 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3006 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3007 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3008 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3009 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3010 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3011 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3012 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3013 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3014 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3015 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3016 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3017 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3018 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3019 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3020 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3021 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3022 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3023 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3024 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3025 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3026 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3027 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3028 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3029 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3030 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3031 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3032 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3033 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3035 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3034 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3036 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3037 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3038 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3039 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3040 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3041 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3042 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3043 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3044 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3045 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3047 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3046 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3048 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3049 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3050 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3051 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3052 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3053 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3054 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3055 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3056 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3057 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3058 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3059 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3060 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3061 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3062 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3063 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3064 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3065 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3066 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3067 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3068 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3069 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3070 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3071 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3072 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3073 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3074 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3075 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3077 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3076 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3078 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3079 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3080 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3081 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3082 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3083 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3084 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3085 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3086 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3087 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3088 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3089 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3090 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3091 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3092 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3093 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3094 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3095 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3096 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3097 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3098 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3099 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3100 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3101 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3102 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3103 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3104 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3105 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3106 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3107 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3108 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3109 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3110 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3111 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3112 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3113 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3114 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3115 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3116 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3117 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3118 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3119 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3120 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3121 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3122 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3123 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3124 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3125 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3126 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3127 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3128 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3129 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3131 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3130 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3132 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3133 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3134 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3135 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3136 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3137 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3138 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3139 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3140 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3141 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3143 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3142 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3144 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3145 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3146 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3147 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3148 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3149 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3150 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3151 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3152 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3153 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3154 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3155 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3156 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3157 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3158 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3159 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3160 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3161 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3162 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3163 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3164 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3165 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3166 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3167 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3168 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3169 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3170 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3171 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3172 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3173 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3174 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3175 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3176 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3177 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3178 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3179 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3180 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3181 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3182 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3183 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3184 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3185 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3186 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3187 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3188 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3189 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3191 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3190 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3192 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3193 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3194 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3195 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3196 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3197 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3198 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3199 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3200 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3201 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3202 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3203 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3204 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3205 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3206 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3207 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3208 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3209 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3210 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3211 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3212 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3213 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3214 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3215 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3216 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3217 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3218 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3219 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3220 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3221 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3222 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3223 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3224 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3225 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3226 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3227 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3228 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3229 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3230 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3231 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3232 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3233 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3234 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3235 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3236 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3237 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3238 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3239 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3240 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3241 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3242 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3243 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3244 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3245 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3246 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3247 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3248 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3249 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3250 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3251 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3252 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3253 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3254 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3255 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3256 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3257 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3258 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3259 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3260 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3261 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3262 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3263 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3264 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3265 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3266 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3267 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3268 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3269 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3270 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3271 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3272 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3273 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3274 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3275 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3276 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3277 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3278 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3279 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3280 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3281 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3282 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3283 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3284 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3285 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3286 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3287 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3288 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3289 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3290 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3291 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3292 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3293 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3294 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3295 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 3296 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3297 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 3298 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3299 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 10 3300 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3301 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 80 3302 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3303 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 3304 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3305 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3306 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3307 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3308 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3309 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3310 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3311 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3312 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3313 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3314 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3315 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3316 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3317 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3318 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3319 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3320 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3321 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3322 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3323 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3324 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3325 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3326 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3327 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3328 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3329 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3330 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3331 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3332 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3333 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3334 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3335 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3336 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3337 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3338 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3339 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3340 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3341 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3342 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3343 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3344 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3345 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3346 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3347 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3348 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3349 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3350 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3351 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3352 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3353 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3354 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3355 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3356 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3357 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3358 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3359 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3360 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3361 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3362 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3363 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3364 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3365 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3366 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3367 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3368 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3369 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3370 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3371 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3372 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3373 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3374 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3375 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3376 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3377 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3378 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3379 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3380 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3381 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3382 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3383 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3384 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3385 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3386 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3387 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3388 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3389 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3390 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3391 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3392 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3393 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3394 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3395 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3396 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3397 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3398 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3399 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3400 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3401 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3402 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3403 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3404 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3405 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3406 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3407 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3408 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3409 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3410 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3411 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3412 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3413 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3414 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3415 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3416 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3417 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3418 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3419 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3420 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3421 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3422 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3423 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3424 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3425 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3426 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3427 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3428 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3429 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3430 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3431 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3432 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3433 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 3434 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3435 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3436 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 3437 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 3438 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3439 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3440 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3441 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3442 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3443 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3444 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3445 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3446 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3447 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3448 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3449 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3450 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3451 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 3452 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 3453 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3454 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3455 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3456 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3457 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 3458 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 3459 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3460 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3461 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3462 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3463 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 3464 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 3465 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3466 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3467 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3468 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3469 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 3470 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 3471 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3472 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3473 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3474 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3475 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3476 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3477 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3478 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3480 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3479 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3481 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3482 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3483 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3484 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3485 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3486 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3487 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3488 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3489 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3490 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3491 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3492 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3493 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3494 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3495 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3496 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3497 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3498 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3499 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3500 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3501 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3502 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3503 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3504 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3505 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3506 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3507 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3508 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3509 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3510 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3511 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3512 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3513 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3514 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3515 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3516 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3517 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3518 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3519 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3520 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3521 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3522 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3523 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3524 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3525 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3526 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3527 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3528 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3529 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3530 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3531 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3532 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3533 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3534 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3535 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3536 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3537 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3538 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3539 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3540 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3541 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3542 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3543 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3544 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3546 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3545 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3547 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3548 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3549 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3550 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3551 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3552 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3553 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3554 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3555 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3556 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3557 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3558 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3559 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3560 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3561 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3562 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3563 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3564 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3565 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3566 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3567 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3568 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3569 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3570 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3571 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3572 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3573 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3574 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3575 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3576 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3577 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3578 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3579 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3580 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3581 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3582 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3583 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3584 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3585 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3586 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3587 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3588 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3589 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3590 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3591 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3592 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3593 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3594 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3595 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3596 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3597 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3598 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3599 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3600 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3601 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3602 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3603 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3604 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3605 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3606 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3607 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3608 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3609 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3610 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3611 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3612 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3613 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3614 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3615 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3616 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3617 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3618 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3619 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3620 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3621 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3622 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3623 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3624 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3625 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3626 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3627 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3628 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3629 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3630 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3631 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3632 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3633 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3634 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3635 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3636 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3637 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3638 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3639 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3640 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3641 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3642 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3643 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3644 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3645 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3646 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3647 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3648 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3649 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3650 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3651 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3652 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3653 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3654 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3655 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3656 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3657 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3658 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3659 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3660 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3661 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3662 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3663 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3664 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3665 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3666 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3667 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3668 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3669 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3670 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3671 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3672 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3673 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3674 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3675 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3676 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3677 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3678 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3679 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3680 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3681 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3682 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3683 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3684 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3685 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3686 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3687 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3688 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3689 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3690 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3691 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3692 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3693 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3694 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3695 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3696 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3697 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3698 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3699 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3700 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3701 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3702 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3703 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3704 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3705 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3706 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3708 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3707 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3709 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3710 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3711 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3712 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3713 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3714 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3715 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3716 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3717 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3718 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3720 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3719 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3721 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3722 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3723 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3724 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3725 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3726 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3727 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3728 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3729 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3730 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3731 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3732 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3733 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3734 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3735 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3736 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3737 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3738 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3739 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3740 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3741 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3742 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3744 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3743 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3745 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3746 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3747 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3748 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3749 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3750 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3751 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3752 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3753 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3754 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3755 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3756 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3757 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3758 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3759 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3760 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3761 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3762 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3763 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3764 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3765 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3766 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3767 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3768 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3769 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3770 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3771 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3772 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3773 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3774 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3775 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3776 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3777 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3778 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3779 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3780 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3781 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3782 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3783 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3784 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3785 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3786 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3787 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3788 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3789 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3790 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3791 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3792 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3793 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3794 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3795 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3796 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3797 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3798 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3799 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3800 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3801 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3802 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3803 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3804 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3805 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3806 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3807 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3808 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3809 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3810 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3811 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3812 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3813 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3814 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3815 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3816 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3817 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3818 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3819 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3820 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3821 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3822 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3823 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3824 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3825 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3826 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3827 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3828 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3829 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3830 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3831 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3832 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3833 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3834 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3835 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3836 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3837 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3838 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3839 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3840 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3841 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3842 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3843 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3844 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3845 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3846 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3847 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3848 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3849 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3850 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3851 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3852 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3853 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3854 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3855 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3856 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3857 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3858 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3859 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3860 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3861 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3862 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3863 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3864 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3865 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3866 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3867 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3868 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3869 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3870 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3871 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3872 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3873 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3874 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3875 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3876 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3877 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3878 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3879 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3880 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 3881 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 3882 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3883 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3884 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 3885 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3886 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 3887 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3888 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 3889 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3890 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: C0 3891 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3892 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 3893 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3894 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3895 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3896 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3897 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3898 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3899 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3900 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3901 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3902 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3903 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3904 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3905 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3906 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3907 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3908 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3909 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3910 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3911 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3912 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3913 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3914 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3915 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3916 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3917 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3918 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3919 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3920 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3921 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3922 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3923 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3924 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3925 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3926 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3927 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3928 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3929 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3930 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3931 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3932 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3933 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3934 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3935 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3936 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3937 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3938 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3939 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3940 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3941 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3942 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3943 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3944 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3945 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3946 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3947 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3948 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3949 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3950 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3951 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3952 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3953 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3954 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3955 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3956 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3957 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3958 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3959 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3960 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3961 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3962 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3963 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3964 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3965 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3966 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3967 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3968 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3969 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3970 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3971 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3972 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3973 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3974 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3975 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3976 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3977 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3978 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3979 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3980 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3981 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3982 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3983 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3984 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3985 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3986 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3987 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3988 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3989 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3990 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3991 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3992 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3993 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3994 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3995 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3996 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3997 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 3998 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 3999 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4000 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4001 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4002 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4003 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4004 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4005 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4006 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4007 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4008 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4009 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4010 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4011 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4012 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4013 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4014 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4015 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4016 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4017 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4018 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4019 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4020 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4021 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4022 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 4023 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4024 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4025 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4026 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 4027 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4028 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4029 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4030 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4031 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4032 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4033 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4034 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4035 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4036 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4037 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4038 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4039 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4040 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4041 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 4042 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4043 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4044 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4045 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4046 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4047 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 4048 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4049 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4050 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4051 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4052 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4053 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 4054 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4055 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4056 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4057 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4058 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4059 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 4060 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4061 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4062 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4063 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4064 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4065 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4066 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4067 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4068 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4069 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4070 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4071 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4072 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4073 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4074 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4075 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4076 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4077 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4078 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4079 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4080 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4081 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4082 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4083 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4084 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4085 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4086 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4087 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4088 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4089 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4090 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4091 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4092 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4093 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4094 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4095 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4096 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4097 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4098 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4099 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4100 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4101 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4102 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4103 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4105 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4104 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4106 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4107 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4108 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4109 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4110 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4111 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4112 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4113 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4114 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4115 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4116 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4117 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4118 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4119 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4120 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4121 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4122 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4123 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4124 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4125 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4126 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4127 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4128 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4129 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4130 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4131 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4132 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4133 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4135 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4134 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4136 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4137 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4138 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4139 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4140 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4141 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4142 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4143 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4144 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4145 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4146 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4147 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4148 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4149 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4150 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4151 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4152 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4153 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4154 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4155 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4156 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4157 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4158 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4159 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4160 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4161 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4162 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4163 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4164 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4165 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4166 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4167 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4168 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4169 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4170 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4171 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4172 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4173 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4174 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4175 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4176 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4177 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4178 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4179 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4180 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4181 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4182 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4183 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4184 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4185 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4186 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4187 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4188 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4189 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4190 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4191 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4192 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4193 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4194 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4195 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4196 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4197 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4198 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4199 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4200 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4201 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4202 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4203 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4204 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4205 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4206 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4207 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4208 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4209 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4210 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4211 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4212 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4213 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4214 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4215 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4216 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4217 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4218 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4219 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4220 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4221 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4222 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4223 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4224 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4225 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4226 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4227 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4228 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4229 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4230 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4231 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4232 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4233 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4234 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4235 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4236 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4237 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4238 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4239 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4240 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4241 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4242 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4243 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4244 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4245 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4246 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4247 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4248 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4249 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4250 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4251 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4252 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4253 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4254 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4255 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4256 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4257 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4258 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4259 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4260 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4261 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4262 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4263 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4264 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4265 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4266 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4267 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4268 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4269 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4270 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4271 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4272 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4273 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4274 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4275 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4276 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4277 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4278 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4279 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4280 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4281 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4282 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4283 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4284 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4285 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4286 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4287 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4288 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4289 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4290 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4291 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4292 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4293 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4294 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4295 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4296 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4297 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4298 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4299 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4300 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4301 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4302 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4303 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4304 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4305 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4306 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4307 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4309 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4308 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4310 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4311 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4312 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4313 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4314 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4315 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4316 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4317 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4318 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4319 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4320 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4321 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4322 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4323 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4324 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4325 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4326 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4327 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4328 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4329 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4330 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4331 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4332 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4333 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4334 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4335 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4336 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4337 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4338 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4339 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4340 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4341 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4342 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4343 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4344 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4345 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4346 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4347 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4348 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4349 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4350 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4351 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4352 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4353 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4354 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4355 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4356 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4357 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4358 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4359 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4360 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4361 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4362 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4363 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4364 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4365 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4366 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4367 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4368 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4369 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4370 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4371 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4372 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4373 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4374 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4375 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4376 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4377 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4378 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4379 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4380 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4381 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4382 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4383 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4384 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4385 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4387 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4386 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4388 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4389 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4390 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4391 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4392 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4393 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4394 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4395 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4396 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4397 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4398 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4399 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4400 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4401 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4402 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4403 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4404 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4405 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4406 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4407 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4408 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4409 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4410 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4411 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4412 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4413 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4414 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4415 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4416 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4417 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4418 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4419 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4420 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4421 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4422 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4423 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4424 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4425 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4426 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4427 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4428 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4429 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4430 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4431 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4432 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4433 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4434 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4435 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4436 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4437 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4438 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4439 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4440 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4441 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4442 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4443 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4444 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4445 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4446 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4447 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4448 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4449 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4450 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4451 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4452 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4453 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4454 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4455 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4456 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4457 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4458 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4459 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4460 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4461 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4462 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4463 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4464 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4465 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4466 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4467 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4468 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4469 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4470 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4471 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4472 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4473 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 4474 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4475 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 4476 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4477 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 10 4478 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4479 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: C0 4480 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4481 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 4482 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4483 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4484 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4485 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4486 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4487 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4488 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4489 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4490 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4491 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4492 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4493 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4494 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4495 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4496 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4497 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4498 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4499 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4500 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4501 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4502 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4503 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4504 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4505 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4506 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4507 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4508 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4509 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4510 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4511 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4512 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4513 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4514 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4515 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4516 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4517 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4518 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4519 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4520 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4521 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4522 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4523 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4524 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4525 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4526 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4527 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4528 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4529 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4530 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4531 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4532 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4533 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4534 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4535 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4536 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4537 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4538 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4539 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4540 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4541 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4542 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4543 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4544 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4545 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4546 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4547 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4548 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4549 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4550 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4551 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4552 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4553 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4554 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4555 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4556 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4557 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4558 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4559 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4560 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4561 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4562 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4563 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4564 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4565 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4566 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4567 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4568 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4569 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4570 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4571 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4572 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4573 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4574 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4575 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4576 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4577 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4578 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4579 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4580 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4581 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4582 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4583 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4584 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4585 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4586 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4587 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4588 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4589 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4590 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4591 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4592 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4593 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4594 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4595 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4596 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4597 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4598 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4599 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4600 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4601 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4602 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4603 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4604 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4605 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4606 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4607 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4608 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4609 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 4610 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4611 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 4612 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4613 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4614 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4615 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 4616 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4617 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4618 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4619 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4620 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4621 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4622 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4623 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4624 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4625 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4626 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4627 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4628 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4629 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4630 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 4631 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4632 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4633 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4634 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4635 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4636 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 4637 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4638 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4639 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4640 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4641 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4642 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 4643 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4644 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4645 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4646 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4647 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 4648 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 4649 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4650 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4651 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4652 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4653 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4654 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4655 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4656 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4657 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4658 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4659 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4660 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4661 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4662 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4663 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4664 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4665 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4666 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4667 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4668 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4670 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4669 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4671 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4672 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4673 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4674 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4675 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4676 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4677 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4678 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4679 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4680 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4681 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4682 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4683 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4684 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4685 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4686 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4687 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4688 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4689 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4690 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4691 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4692 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4693 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4694 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4695 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4696 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4697 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4698 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4699 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4700 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4701 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4702 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4703 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4704 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4705 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4706 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4707 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4708 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4709 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4710 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4711 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4712 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4713 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4714 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4715 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4716 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4717 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4718 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4719 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4720 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4721 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4722 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4723 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4724 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4725 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4726 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4727 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4728 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4729 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4730 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4731 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4732 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4733 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4734 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4735 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4736 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4737 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4738 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4739 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4740 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4741 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4742 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4743 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4744 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4745 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4746 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4747 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4748 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4749 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4750 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4751 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4752 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4753 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4754 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4755 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4756 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4757 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4758 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4759 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4760 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4761 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4762 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4763 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4764 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4765 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4766 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4767 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4768 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4769 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4770 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4771 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4772 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4773 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4774 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4775 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4776 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4777 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4778 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4779 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4780 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4781 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4782 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4784 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4783 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4785 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4786 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4787 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4788 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4789 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4790 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4791 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4792 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4793 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4794 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4795 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4796 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4797 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4798 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4799 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4800 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4801 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4802 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4803 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4804 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4805 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4806 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4807 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4808 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4809 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4810 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4811 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4812 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4813 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4814 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4815 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4816 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4817 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4818 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4820 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4819 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4821 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4822 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4823 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4824 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4825 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4826 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4827 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4828 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4829 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4830 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4831 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4832 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4833 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4834 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4835 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4836 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4837 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4838 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4839 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4840 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4841 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4842 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4843 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4844 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4845 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4846 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4847 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4848 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4849 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4850 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4851 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4852 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4853 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4854 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4855 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4856 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4857 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4858 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4859 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4860 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4861 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4862 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4863 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4864 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4865 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4866 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4867 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4868 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4869 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4870 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4871 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4872 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4873 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4874 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4875 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4876 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4877 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4878 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4879 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4880 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4881 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4882 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4883 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4884 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4885 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4886 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4887 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4888 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4889 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4890 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4891 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4892 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4893 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4894 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4895 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4896 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4897 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4898 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4899 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4900 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4901 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4902 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4903 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4904 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4905 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4906 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4907 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4908 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4909 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4910 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4911 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4912 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4913 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4914 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4915 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4916 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4917 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4918 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4919 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4920 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4922 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4921 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4923 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4924 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4925 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4926 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4927 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4928 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4929 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4930 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4931 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4932 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4933 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4934 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4935 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4936 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4937 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4938 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4939 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4940 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4941 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4942 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4943 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4944 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4945 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4946 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4947 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4948 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4949 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4950 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4951 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4952 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4953 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4954 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4955 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4956 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4957 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4958 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4959 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4960 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4961 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4962 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4963 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4964 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4965 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4966 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4967 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4968 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4969 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4970 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4971 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4972 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4973 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4974 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4975 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4976 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4977 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4978 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4979 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4980 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4981 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4982 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4983 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4984 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4985 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4986 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4987 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4988 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4989 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4990 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4991 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4992 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4993 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4994 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 4995 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4996 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4997 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 4998 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 4999 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5000 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5001 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5002 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5003 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5004 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5005 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5006 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5007 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5008 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5009 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5010 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5011 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5012 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5013 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5014 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5015 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5016 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5017 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5018 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5019 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5020 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5021 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5022 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5023 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5024 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5025 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5026 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5027 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5028 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5029 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5030 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5031 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5032 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5033 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5034 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5035 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5036 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5037 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5038 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5039 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5040 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5041 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5042 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5043 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5044 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5045 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5046 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5047 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5048 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5049 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5050 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5051 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5052 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5053 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5054 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5055 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5056 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5057 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5058 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5059 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5060 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5061 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5062 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 5063 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5064 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 5065 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5066 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 5067 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5068 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 5069 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5070 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 5071 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5072 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5073 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5074 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5075 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5076 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5077 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5078 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5079 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5080 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5081 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5082 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5083 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5084 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5085 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5086 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5087 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5088 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5089 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5090 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5091 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5092 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5093 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5094 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5095 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5096 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5097 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5098 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5099 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5100 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5101 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5102 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5103 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5104 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5105 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5106 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5107 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5108 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5109 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5110 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5111 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5112 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5113 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5114 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5115 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5116 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5117 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5118 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5119 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5120 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5121 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5122 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5123 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5124 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5125 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5126 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5127 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5128 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5129 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5130 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5131 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5132 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5133 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5134 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5135 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5136 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5137 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5138 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5139 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5140 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5141 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5142 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5143 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5144 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5145 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5146 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5147 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5148 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5149 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5150 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5151 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5152 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5153 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5154 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5155 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5156 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5157 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5158 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5159 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5160 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5161 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5162 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5163 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5164 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5165 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5166 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5167 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5168 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5169 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5170 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5171 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5172 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5173 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5174 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5175 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5176 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5177 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5178 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5179 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5180 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5181 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5182 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5183 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5184 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5185 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5186 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5187 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5188 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5189 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5190 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5191 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5192 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5193 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5194 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5195 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5196 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5197 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5198 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5199 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5200 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 5201 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5202 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5203 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5204 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 5205 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5206 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5207 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5208 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5209 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5210 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5211 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5212 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5213 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5214 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5215 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5216 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5217 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5218 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5219 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 5220 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5221 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5222 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5223 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5224 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5225 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 5226 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5227 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5228 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5229 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5230 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5231 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 5232 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5233 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5234 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5235 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5236 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5237 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 5238 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5239 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5240 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5241 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5242 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5243 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5244 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5245 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5246 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5247 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5248 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5249 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5250 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5251 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5252 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5253 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5254 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5255 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5256 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5257 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5258 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5259 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5260 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5261 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5262 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5263 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5264 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5265 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5266 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5267 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5268 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5269 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5271 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5270 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5272 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5273 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5274 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5275 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5276 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5277 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5278 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5279 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5280 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5281 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5282 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5283 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5284 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5285 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5286 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5287 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5288 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5289 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5290 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5291 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5292 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5293 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5294 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5295 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5296 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5297 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5298 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5299 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5300 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5301 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5302 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5303 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5304 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5305 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5306 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5307 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5308 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5309 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5310 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5311 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5312 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5313 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5314 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5315 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5316 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5317 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5318 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5319 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5320 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5321 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5322 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5323 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5325 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5324 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5326 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5327 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5328 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5329 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5330 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5331 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5332 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5333 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5334 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5335 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5336 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5337 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5338 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5339 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5340 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5341 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5342 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5343 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5344 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5345 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5346 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5347 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5348 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5349 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5350 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5351 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5352 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5353 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5354 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5355 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5356 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5357 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5358 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5359 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5360 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5361 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5362 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5363 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5364 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5365 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5366 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5367 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5368 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5369 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5370 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5371 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5372 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5373 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5374 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5375 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5376 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5377 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5378 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5379 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5380 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5381 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5382 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5383 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5384 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5385 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5386 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5387 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5388 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5389 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5390 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5391 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5392 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5393 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5394 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5395 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5396 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5397 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5398 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5399 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5400 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5401 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5402 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5403 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5404 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5405 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5406 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5407 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5408 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5409 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5410 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5411 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5412 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5413 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5414 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5415 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5416 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5417 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5418 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5419 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5420 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5421 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5422 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5423 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5424 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5425 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5426 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5427 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5428 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5429 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5430 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5431 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5432 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5433 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5434 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5435 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5436 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5437 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5438 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5439 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5440 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5441 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5442 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5443 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5445 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5444 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5446 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5447 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5448 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5449 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5450 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5451 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5452 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5453 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5454 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5455 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5456 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5457 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5458 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5459 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5460 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5461 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5462 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5463 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5464 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5465 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5466 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5467 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5468 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5469 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5470 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5471 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5472 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5473 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5474 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5475 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5476 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5477 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5478 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5479 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5480 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5481 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5482 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5483 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5484 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5485 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5486 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5487 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5488 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5489 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5490 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5491 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5492 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5493 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5494 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5495 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5496 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5497 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5498 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5499 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5500 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5501 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5502 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5503 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5504 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5505 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5506 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5507 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5508 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5509 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5510 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5511 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5512 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5513 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5514 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5515 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5517 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5516 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5518 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5519 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5520 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5521 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5522 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5523 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5524 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5525 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5526 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5527 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5528 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5529 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5530 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5531 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5532 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5533 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5535 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5534 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5536 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5537 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5538 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5539 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5540 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5541 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5542 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5543 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5544 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5545 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5546 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5547 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5548 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5549 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5550 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5551 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5552 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5553 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5554 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5555 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5556 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5557 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5558 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5559 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5560 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5561 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5562 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5563 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5564 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5565 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5566 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5567 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5568 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5569 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5570 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5571 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5572 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5573 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5574 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5575 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5576 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5577 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5578 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5579 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5580 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5581 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5582 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5583 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5584 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5585 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5586 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5587 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5588 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5589 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5590 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5591 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5592 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5593 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5594 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5595 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5596 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5597 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5598 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5599 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5600 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5601 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5602 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5603 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5604 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5605 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5606 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5607 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5608 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5609 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5610 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5611 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5612 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5613 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5614 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5615 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5616 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5617 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5618 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5619 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5620 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5621 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5622 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5623 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5625 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5624 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5626 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5627 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5628 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5629 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5630 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5631 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5632 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5633 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5634 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5635 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5636 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5637 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5638 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5639 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5640 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5641 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5642 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5643 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5644 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5645 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5646 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5647 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5648 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5649 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5650 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5651 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 5652 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5653 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 5654 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5655 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 11 5656 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5657 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 5658 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5659 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 5660 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5661 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5662 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5663 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5664 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5665 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5666 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5667 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5668 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5669 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5670 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5671 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5672 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5673 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5674 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5675 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5676 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5677 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5678 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5679 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5680 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5681 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5682 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5683 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5684 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5685 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5686 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5687 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5688 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5689 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5690 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5691 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5692 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5693 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5694 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5695 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5696 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5697 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5698 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5699 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5700 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5701 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5702 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5703 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5704 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5705 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5706 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5707 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5708 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5709 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5710 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5711 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5712 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5713 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5714 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5715 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5716 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5717 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5718 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5719 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5720 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5721 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5722 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5723 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5724 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5725 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5726 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5727 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5728 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5729 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5730 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5731 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5732 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5733 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5734 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5735 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5736 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5737 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5738 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5739 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5740 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5741 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5742 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5743 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5744 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5745 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5746 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5747 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5748 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5749 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5750 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5751 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5752 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5753 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5754 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5755 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5756 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5757 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5758 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5759 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5760 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5761 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5762 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5763 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5764 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5765 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5766 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5767 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5768 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5769 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5770 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5771 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5772 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5773 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5774 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5775 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5776 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5777 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5778 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5779 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5780 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5781 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5782 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5783 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5784 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5785 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5786 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5787 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 5788 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5789 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 5790 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5791 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5792 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5793 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 5794 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5795 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5796 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5797 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5798 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5799 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5800 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5801 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5802 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5803 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5804 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5805 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5806 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5807 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5808 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 5809 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5810 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5811 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5812 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5813 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5814 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 5815 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5816 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5817 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5818 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5819 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5820 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 5821 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5822 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5823 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5824 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5825 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 5826 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 5827 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5828 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5829 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5830 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5831 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5832 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5833 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5834 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5835 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5836 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5837 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5838 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5839 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5840 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5841 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5842 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5843 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5844 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5845 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5846 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5847 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5848 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5849 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5850 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5851 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5852 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5853 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5854 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5855 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5856 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5857 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5858 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5859 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5860 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5861 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5862 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5863 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5864 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5866 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5865 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5867 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5868 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5869 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5870 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5871 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5872 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5873 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5874 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5875 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5876 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5877 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5878 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5880 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5879 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5881 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5882 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5883 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5884 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5885 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5886 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5887 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5888 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5889 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5890 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5891 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5892 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5893 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5894 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5895 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5896 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5897 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5898 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5899 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5900 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5901 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5902 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5903 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5904 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5905 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5906 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5907 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5908 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5909 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5910 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5911 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5912 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5913 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5914 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5915 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5916 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5917 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5918 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5920 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5919 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5921 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5922 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5923 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5924 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5925 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5926 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5927 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5928 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5929 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5930 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5931 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5932 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5933 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5934 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5935 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5936 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5937 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5938 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5939 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5940 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5941 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5942 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5943 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5944 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5945 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5946 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5947 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5948 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5949 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5950 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5951 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5952 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5953 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5954 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5955 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5956 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5957 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5958 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5959 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5960 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5962 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5961 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5963 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5964 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5965 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5966 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5967 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5968 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5969 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5970 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5971 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5972 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5973 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5974 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5975 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5976 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5977 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5978 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5979 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5980 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5981 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5982 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5983 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5984 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5985 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5986 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5987 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5988 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5989 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5990 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5991 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5992 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5993 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5994 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5995 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5996 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 5997 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 5998 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 5999 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6000 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6001 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6002 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6003 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6004 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6005 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6006 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6007 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6008 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6009 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6010 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6011 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6012 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6013 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6014 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6015 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6016 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6017 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6018 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6019 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6020 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6021 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6022 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6023 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6024 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6025 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6026 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6028 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6027 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6029 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6030 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6031 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6032 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6034 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6033 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6035 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6036 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6037 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6038 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6039 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6040 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6041 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6042 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6043 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6044 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6045 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6046 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6047 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6048 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6049 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6050 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6051 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6052 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6053 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6054 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6055 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6056 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6057 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6058 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6059 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6060 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6061 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6062 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6063 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6064 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6065 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6066 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6067 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6068 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6069 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6070 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6071 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6072 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6073 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6074 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6075 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6076 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6077 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6078 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6079 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6080 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6081 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6082 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6083 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6084 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6085 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6086 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6087 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6088 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6089 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6090 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6091 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6092 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6093 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6094 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6095 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6096 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6097 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6098 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6099 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6100 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6101 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6102 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6103 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6104 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6106 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6105 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6107 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6108 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6109 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6110 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6111 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6112 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6113 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6114 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6115 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6116 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6117 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6118 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6119 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6120 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6121 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6122 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6123 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6124 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6125 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6126 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6127 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6128 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6129 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6130 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6131 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6132 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6133 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6134 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6135 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6136 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6137 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6138 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6139 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6140 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6141 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6142 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6143 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6144 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6145 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6146 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6147 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6148 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6149 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6150 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6151 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6152 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6153 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6154 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6155 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6156 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6157 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6158 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6159 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6160 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6161 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6162 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6163 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6164 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6165 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6166 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6167 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6168 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6169 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6170 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6171 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6172 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6173 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6174 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6175 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6176 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6178 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6177 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6179 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6180 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6181 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6182 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6183 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6184 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6185 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6186 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6187 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6188 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6189 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6190 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6191 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6192 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6193 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6194 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6195 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6196 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6197 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6198 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6199 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6200 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6201 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6202 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6203 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6204 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6205 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6206 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6207 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6208 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6209 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6210 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6211 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6212 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6213 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6214 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6215 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6216 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6217 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6218 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6219 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6220 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6221 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6222 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6223 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6224 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6225 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6226 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6227 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6228 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6229 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6230 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6231 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6232 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6233 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6234 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6235 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6236 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6237 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6238 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6239 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6240 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 6241 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6242 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 6243 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6244 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 6245 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6246 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 6247 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6248 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 6249 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6250 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6251 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6252 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6253 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6254 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6255 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6256 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6257 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6258 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6259 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6260 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6261 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6262 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6263 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6264 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6265 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6266 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6267 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6268 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6269 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6270 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6271 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6272 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6273 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6274 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6275 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6276 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6277 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6278 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6279 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6280 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6281 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6282 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6283 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6284 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6285 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6286 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6287 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6288 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6289 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6290 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6291 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6292 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6293 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6294 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6295 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6296 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6297 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6298 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6299 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6300 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6301 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6302 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6303 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6304 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6305 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6306 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6307 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6308 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6309 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6310 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6311 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6312 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6313 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6314 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6315 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6316 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6317 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6318 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6319 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6320 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6321 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6322 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6323 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6324 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6325 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6326 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6327 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6328 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6329 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6330 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6331 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6332 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6333 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6334 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6335 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6336 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6337 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6338 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6339 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6340 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6341 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6342 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6343 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6344 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6345 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6346 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6347 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6348 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6349 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6350 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6351 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6352 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6353 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6354 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6355 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6356 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6357 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6358 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6359 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6360 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6361 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6362 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6363 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6364 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6365 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6366 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6367 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6368 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6369 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6370 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6371 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6372 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6373 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6374 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6375 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6376 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6377 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6378 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 6379 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6380 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6381 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6382 8:53:09 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 6383 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6384 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6385 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6386 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6387 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6388 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6389 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6390 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6391 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6392 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6393 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6394 8:53:09 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6395 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6396 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6397 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 6398 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6399 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6400 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6401 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6402 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6403 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 6404 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6405 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6406 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6407 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6408 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6409 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 6410 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6411 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6412 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6413 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6414 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6415 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 6416 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6417 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6418 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6419 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6420 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6421 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6422 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6423 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6424 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6425 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6426 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6427 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6428 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6429 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6430 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6431 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6432 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6433 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6434 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6435 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6436 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6437 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6438 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6439 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6440 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6441 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6442 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6443 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6444 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6445 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6446 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6447 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6448 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6449 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6450 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6451 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6452 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6453 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6454 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6455 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6456 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6457 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6458 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6459 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6460 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6461 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6462 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6463 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6464 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6465 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6466 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6467 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6468 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6469 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6470 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6471 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6472 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6473 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6474 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6475 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6476 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6477 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6478 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6479 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6480 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6481 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6482 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6483 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6485 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6484 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6486 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6487 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6488 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6489 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6490 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6491 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6492 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6493 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6494 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6495 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6496 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6497 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6498 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6499 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6500 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6501 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6502 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6503 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6504 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6505 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6506 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6507 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6508 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6509 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6510 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6511 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6512 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6513 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6514 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6515 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6516 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6517 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6518 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6519 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6520 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6521 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6522 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6523 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6524 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6525 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6526 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6527 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6528 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6529 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6530 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6531 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6532 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6533 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6534 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6535 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6536 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6537 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6538 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6539 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6540 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6541 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6542 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6543 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6544 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6545 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6546 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6547 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6548 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6549 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6550 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6551 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6552 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6553 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6554 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6555 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6556 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6557 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6558 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6559 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6560 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6561 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6562 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6563 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6564 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6565 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6566 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6567 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6568 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6569 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6570 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6571 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6572 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6573 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6574 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6575 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6576 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6577 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6578 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6579 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6580 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6581 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6582 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6583 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6584 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6585 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6586 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6587 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6588 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6589 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6590 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6591 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6592 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6593 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6594 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6595 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6596 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6597 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6598 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6599 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6600 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6601 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6602 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6603 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6604 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6605 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6606 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6607 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6608 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6609 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6610 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6611 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6612 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6613 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6614 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6615 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6616 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6617 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6618 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6619 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6620 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6621 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6622 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6623 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6624 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6625 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6626 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6627 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6628 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6629 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6630 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6631 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6632 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6633 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6634 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6635 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6636 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6637 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6638 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6639 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6640 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6641 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6642 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6643 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6644 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6645 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6646 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6647 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6648 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6649 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6650 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6651 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6652 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6653 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6654 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6655 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6656 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6657 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6658 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6659 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6660 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6661 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6662 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6663 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6664 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6665 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6666 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6667 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6668 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6669 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6670 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6671 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6672 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6673 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6674 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6675 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6676 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6677 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6678 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6679 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6680 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6681 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6682 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6683 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6684 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6685 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6686 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6687 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6688 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6689 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6690 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6691 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6692 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6693 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6694 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6695 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6696 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6697 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6698 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6699 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6700 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6701 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6702 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6703 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6704 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6705 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6706 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6707 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6708 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6709 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6710 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6711 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6712 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6713 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6714 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6715 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6716 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6717 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6718 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6719 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6720 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6721 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6722 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6723 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6724 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6725 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6726 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6727 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6728 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6729 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6730 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6731 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6732 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6733 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6734 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6735 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6736 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6737 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6738 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6739 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6740 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6741 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6742 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6743 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6744 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6745 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6746 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6747 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6748 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6749 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6750 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6751 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6752 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6753 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6754 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6755 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6756 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6757 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6758 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6759 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6760 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6761 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6762 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6763 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6764 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6765 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6766 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6767 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6768 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6769 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6770 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6771 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6772 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6773 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6774 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6775 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6776 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6777 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6778 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6779 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6780 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6781 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6782 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6783 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6784 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6785 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6786 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6787 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6788 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6789 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6790 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6791 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6792 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6793 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6794 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6795 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6796 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6797 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6798 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6799 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6800 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6801 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6802 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6803 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6804 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6805 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6806 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6807 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6808 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6809 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6810 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6811 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6812 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6813 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6814 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6815 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6816 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6817 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6818 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6819 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6820 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6821 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6822 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6823 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6824 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6825 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6826 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6827 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6828 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6829 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 6830 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6831 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 6832 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6833 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 11 6834 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6835 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 6836 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6837 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 6838 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6839 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6840 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6841 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6842 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6843 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6844 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6845 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6846 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6847 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6848 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6849 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6850 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6851 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6852 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6853 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6854 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6855 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6856 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6857 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6858 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6859 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6860 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6861 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6862 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6863 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6864 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6865 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6866 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6867 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6868 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6869 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6870 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6871 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6872 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6873 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6874 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6875 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6876 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6877 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6878 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6879 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6880 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6881 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6882 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6883 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6884 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6885 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6886 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6887 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6888 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6889 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6890 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6891 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6892 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6893 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6894 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6895 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6896 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6897 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6898 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6899 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6900 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6901 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6902 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6903 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6904 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6905 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6906 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6907 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6908 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6909 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6910 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6911 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6912 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6913 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6914 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6915 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6916 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6917 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6918 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6919 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6920 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6921 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6922 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6923 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6924 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6925 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6926 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6927 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6928 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6929 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6930 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6931 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6932 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6933 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6934 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6935 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6936 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6937 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6938 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6939 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6940 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6941 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6942 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6943 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6944 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6945 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6946 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6947 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6948 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6949 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6950 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6951 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6952 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6953 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6954 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6955 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6956 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6957 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6958 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6959 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6960 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6961 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6962 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6963 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6964 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6965 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 6966 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6967 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 6968 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6969 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6970 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6971 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 6972 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6973 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6974 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6975 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6976 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6977 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6978 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6979 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6980 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6981 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6982 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6983 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6984 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6985 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6986 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 6987 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6988 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6989 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6990 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6991 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6992 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 6993 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6994 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 6995 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 6996 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 6997 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 6998 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 6999 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7000 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7001 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7002 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7003 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 7004 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 7005 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7006 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7007 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7008 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7009 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7010 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7011 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7012 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7013 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7014 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7015 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7016 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7017 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7018 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7019 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7020 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7021 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7022 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7023 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7024 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7025 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7026 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7027 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7028 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7029 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7030 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7031 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7032 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7033 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7034 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7035 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7036 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7037 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7038 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7039 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7040 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7041 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7042 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7043 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7044 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7045 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7046 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7047 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7048 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7049 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7050 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7051 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7052 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7053 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7054 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7055 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7056 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7057 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7058 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7059 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7060 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7061 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7062 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7063 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7064 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7065 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7066 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7067 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7068 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7069 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7070 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7071 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7072 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7073 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7074 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7075 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7076 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7077 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7078 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7079 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7080 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7081 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7082 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7083 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7084 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7085 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7086 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7087 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7088 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7089 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7090 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7091 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7092 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7093 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7094 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7095 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7096 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7097 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7098 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7099 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7100 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7101 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7102 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7103 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7104 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7105 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7106 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7107 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7108 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7109 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7110 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7111 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7112 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7113 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7114 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7115 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7116 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7117 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7118 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7119 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7120 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7121 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7122 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7123 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7124 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7125 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7126 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7127 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7128 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7129 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7130 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7131 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7132 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7133 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7134 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7135 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7136 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7137 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7138 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7140 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7139 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7141 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7142 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7143 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7144 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7145 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7146 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7147 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7148 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7149 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7150 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7151 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7152 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7153 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7154 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7155 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7156 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7157 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7158 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7159 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7160 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7161 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7162 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7163 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7164 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7165 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7166 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7167 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7168 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7169 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7170 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7171 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7172 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7173 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7174 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7176 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7175 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7177 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7178 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7179 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7180 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7181 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7182 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7183 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7184 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7185 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7186 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7187 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7188 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7189 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7190 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7191 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7192 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7193 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7194 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7195 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7196 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7197 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7198 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7199 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7200 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7201 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7202 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7203 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7204 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7205 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7206 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7207 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7208 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7209 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7210 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7211 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7212 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7213 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7214 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7215 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7216 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7218 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7217 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7219 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7220 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7221 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7222 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7223 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7224 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7225 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7226 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7227 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7228 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7229 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7230 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7231 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7232 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7233 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7234 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7235 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7236 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7237 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7238 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7239 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7240 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7241 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7242 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7243 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7244 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7245 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7246 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7247 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7248 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7249 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7250 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7251 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7252 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7254 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7253 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7255 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7256 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7257 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7258 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7259 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7260 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7261 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7262 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7263 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7264 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7265 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7266 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7267 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7268 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7269 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7270 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7271 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7272 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7273 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7274 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7275 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7276 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7277 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7278 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7279 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7280 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7281 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7282 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7284 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7283 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7285 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7286 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7287 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7288 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7290 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7289 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7291 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7292 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7293 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7294 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7295 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7296 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7297 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7298 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7299 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7300 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7301 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7302 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7303 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7304 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7305 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7306 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7307 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7308 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7309 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7310 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7311 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7312 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7313 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7314 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7315 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7316 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7317 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7318 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7319 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7320 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7321 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7322 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7323 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7324 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7325 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7326 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7327 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7328 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7329 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7330 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7332 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7331 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7333 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7334 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7335 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7336 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7337 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7338 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7339 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7340 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7341 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7342 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7344 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7343 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7345 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7346 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7347 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7348 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7349 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7350 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7351 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7352 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7353 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7354 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7355 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7356 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7357 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7358 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7359 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7360 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7361 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7362 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7363 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7364 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7365 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7366 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7367 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7368 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7369 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7370 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7371 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7372 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7373 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7374 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7375 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7376 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7377 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7378 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7379 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7380 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7381 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7382 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7383 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7384 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7385 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7386 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7387 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7388 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7389 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7390 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7391 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7392 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7393 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7394 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7395 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7396 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7397 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7398 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7399 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7400 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7401 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7402 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7403 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7404 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7405 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7406 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7407 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7408 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7409 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7410 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7411 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7412 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7413 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7414 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7415 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7416 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7417 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7418 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 7419 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7420 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 7421 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7422 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 7423 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7424 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 80 7425 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7426 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 7427 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7428 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7429 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7430 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7431 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7432 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7433 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7434 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7435 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7436 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7437 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7438 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7439 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7440 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7441 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7442 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7443 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7444 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7445 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7446 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7447 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7448 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7449 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7450 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7451 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7452 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7453 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7454 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7455 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7456 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7457 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7458 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7459 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7460 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7461 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7462 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7463 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7464 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7465 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7466 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7467 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7468 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7469 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7470 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7471 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7472 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7473 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7474 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7475 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7476 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7477 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7478 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7479 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7480 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7481 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7482 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7483 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7484 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7485 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7486 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7487 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7488 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7489 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7490 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7491 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7492 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7493 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7494 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7495 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7496 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7497 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7498 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7499 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7500 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7501 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7502 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7503 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7504 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7505 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7506 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7507 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7508 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7509 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7510 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7511 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7512 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7513 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7514 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7515 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7516 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7517 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7518 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7519 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7520 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7521 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7522 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7523 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7524 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7525 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7526 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7527 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7528 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7529 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7530 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7531 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7532 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7533 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7534 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7535 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7536 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7537 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7538 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7539 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7540 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7541 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7542 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7543 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7544 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7545 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7546 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7547 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7548 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7549 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7550 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7551 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7552 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7553 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7554 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 7555 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7556 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 7557 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7558 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7559 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 7560 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 7561 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7562 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7563 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7564 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7565 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7566 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7567 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7568 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7569 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7570 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7571 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7572 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7573 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7574 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 7575 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 7576 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7577 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7578 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7579 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7580 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 7581 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 7582 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7583 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7584 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7585 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7586 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 7587 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 7588 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7589 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7590 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7591 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7592 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 7593 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 7594 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7595 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7596 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7597 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7598 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7599 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7600 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7601 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7602 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7603 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7604 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7605 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7606 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7607 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7608 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7609 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7610 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7611 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7612 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7613 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7614 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7615 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7616 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7617 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7618 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7619 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7620 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7621 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7622 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7623 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7624 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7625 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7626 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7627 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7628 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7629 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7630 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7631 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7632 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7633 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7634 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7635 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7636 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7637 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7638 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7639 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7640 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7641 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7642 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7643 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7644 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7645 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7646 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7647 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7648 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7649 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7650 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7651 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7652 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7653 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7654 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7655 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7656 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7657 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7658 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7659 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7660 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7661 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7662 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7663 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7664 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7665 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7666 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7667 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7668 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7669 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7670 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7671 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7672 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7673 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7674 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7675 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7676 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7677 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7678 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7679 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7681 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7680 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7682 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7683 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7684 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7685 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7686 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7687 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7688 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7689 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7690 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7691 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7692 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7693 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7694 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7695 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7696 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7697 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7698 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7699 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7700 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7701 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7702 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7703 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7704 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7705 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7706 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7707 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7708 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7709 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7710 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7711 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7712 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7713 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7714 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7715 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7716 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7717 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7718 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7719 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7720 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7721 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7722 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7723 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7724 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7725 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7726 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7727 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7728 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7729 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7730 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7731 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7732 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7733 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7734 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7735 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7736 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7737 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7738 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7739 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7740 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7741 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7742 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7743 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7744 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7745 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7746 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7747 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7748 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7749 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7750 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7751 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7753 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7752 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7754 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7755 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7756 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7757 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7758 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7759 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7760 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7761 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7762 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7763 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7764 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7765 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7766 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7767 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7768 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7769 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7770 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7771 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7772 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7773 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7774 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7775 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7776 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7777 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7778 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7779 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7780 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7781 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7782 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7783 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7784 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7785 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7786 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7787 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7788 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7789 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7790 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7791 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7792 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7793 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7794 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7795 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7796 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7797 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7798 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7799 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7800 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7801 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7802 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7803 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7804 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7805 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7807 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7806 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7808 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7809 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7810 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7811 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7812 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7813 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7814 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7815 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7816 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7817 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7818 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7819 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7820 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7821 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7822 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7823 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7824 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7825 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7826 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7827 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7828 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7829 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7830 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7831 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7832 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7833 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7834 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7835 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7836 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7837 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7838 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7839 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7840 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7841 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7842 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7843 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7844 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7845 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7846 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7847 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7848 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7849 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7850 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7851 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7852 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7853 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7854 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7855 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7856 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7857 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7858 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7859 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7860 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7861 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7862 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7863 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7864 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7865 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7867 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7866 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7868 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7869 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7870 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7871 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7872 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7873 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7874 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7875 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7876 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7877 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7878 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7879 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7880 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7881 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7882 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7883 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7884 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7885 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7886 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7887 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7888 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7889 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7890 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7891 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7892 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7893 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7894 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7895 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7896 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7897 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7898 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7899 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7900 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7901 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7902 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7903 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7904 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7905 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7906 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7907 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7908 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7909 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7910 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7911 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7912 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7913 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7915 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7914 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7916 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7917 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7918 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7919 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7921 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7920 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7922 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7923 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7924 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7925 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7926 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7927 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7928 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7929 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7930 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7931 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7932 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7933 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7934 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7935 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7936 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7937 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7938 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7939 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7940 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7941 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7942 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7943 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7944 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7945 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7946 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7947 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7948 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7949 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7950 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7951 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7952 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7953 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7954 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7955 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7956 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7957 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7958 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7959 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7960 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7961 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7962 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7963 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7964 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7965 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7966 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7967 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7968 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7969 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7970 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7971 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7972 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7973 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7975 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7974 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7976 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7977 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7978 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7979 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7980 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7981 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7982 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7983 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7984 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7985 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7986 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7987 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7988 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7989 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7990 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7991 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7992 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 7993 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7994 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7995 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7996 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7997 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 7998 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 7999 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8000 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8001 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8002 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8003 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8004 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8005 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8006 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8007 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 8008 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8009 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 8010 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8011 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 11 8012 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8013 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 80 8014 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8015 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 8016 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8017 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8018 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8019 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8020 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8021 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8022 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8023 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8024 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8025 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8026 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8027 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8028 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8029 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8030 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8031 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8032 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8033 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8034 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8035 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8036 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8037 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8038 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8039 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8040 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8041 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8042 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8043 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8044 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8045 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8046 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8047 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8048 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8049 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8050 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8051 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8052 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8053 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8054 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8055 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8056 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8057 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8058 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8059 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8060 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8061 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8062 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8063 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8064 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8065 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8066 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8067 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8068 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8069 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8070 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8071 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8072 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8073 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8074 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8075 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8076 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8077 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8078 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8079 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8080 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8081 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8082 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8083 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8084 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8085 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8086 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8087 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8088 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8089 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8090 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8091 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8092 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8093 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8094 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8095 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8096 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8097 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8098 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8099 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8100 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8101 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8102 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8103 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8104 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8105 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8106 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8107 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8108 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8109 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8110 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8111 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8112 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8113 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8114 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8115 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8116 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8117 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8118 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8119 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8120 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8121 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8122 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8123 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8124 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8125 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8126 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8127 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8128 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8129 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8130 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8131 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8132 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8133 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8134 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8135 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8136 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8137 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8138 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8139 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8140 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8141 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8142 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8143 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8144 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8145 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 8146 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8147 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8148 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8149 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 8150 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8151 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8152 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8153 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8154 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8155 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8156 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8157 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8158 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8159 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8160 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8161 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8162 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8163 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8164 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 8165 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8166 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8167 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8168 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8169 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8170 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 8171 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8172 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8173 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8174 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8175 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8176 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 8177 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8178 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8179 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8180 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8181 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8182 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 8183 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8184 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8185 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8186 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8187 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8188 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8189 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8190 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8191 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8192 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8193 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8194 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8195 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8196 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8197 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8198 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8199 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8200 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8201 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8202 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8203 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8204 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8205 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8206 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8207 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8208 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8209 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8210 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8211 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8212 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8213 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8214 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8215 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8216 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8217 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8218 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8219 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8220 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8221 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8222 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8223 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8224 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8225 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8226 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8227 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8228 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8229 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8230 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8231 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8232 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8233 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8234 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8235 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8236 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8237 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8238 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8239 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8240 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8241 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8242 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8243 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8244 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8245 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8246 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8247 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8248 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8249 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8250 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8251 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8252 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8253 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8254 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8255 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8256 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8257 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8258 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8259 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8260 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8261 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8262 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8263 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8264 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8265 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8266 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8267 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8268 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8269 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8270 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8271 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8272 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8273 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8274 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8275 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8276 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8277 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8278 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8279 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8280 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8281 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8282 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8283 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8284 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8285 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8286 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8287 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8288 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8289 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8290 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8291 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8292 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8293 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8294 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8295 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8296 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8297 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8298 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8299 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8300 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8301 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8302 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8303 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8304 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8305 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8306 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8307 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8308 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8309 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8310 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8311 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8312 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8313 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8314 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8315 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8316 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8317 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8318 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8319 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8320 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8321 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8322 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8323 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8324 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8325 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8326 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8327 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8328 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8329 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8330 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8331 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8332 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8333 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8334 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8335 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8336 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8337 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8338 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8339 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8340 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8341 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8342 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8343 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8344 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8345 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8346 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8347 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8348 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8349 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8350 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8351 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8352 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8353 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8354 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8355 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8356 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8357 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8358 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8359 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8360 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8361 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8362 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8363 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8364 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8365 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8366 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8367 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8368 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8369 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8370 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8371 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8372 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8373 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8374 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8375 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8376 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8377 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8378 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8379 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8380 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8381 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8382 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8383 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8384 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8385 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8386 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8387 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8388 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8389 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8390 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8391 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8392 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8393 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8394 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8395 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8396 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8397 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8398 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8399 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8400 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8401 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8402 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8403 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8404 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8405 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8406 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8407 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8408 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8409 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8410 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8411 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8412 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8413 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8414 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8415 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8416 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8417 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8418 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8419 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8420 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8421 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8422 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8423 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8424 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8425 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8426 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8427 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8428 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8429 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8430 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8431 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8432 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8433 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8434 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8435 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8436 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8437 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8438 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8439 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8440 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8441 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8442 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8443 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8444 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8445 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8446 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8447 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8448 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8449 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8450 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8451 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8452 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8453 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8454 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8455 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8456 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8457 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8458 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8459 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8460 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8461 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8462 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8463 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8464 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8465 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8466 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8467 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8468 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8469 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8470 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8471 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8472 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8473 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8474 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8475 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8476 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8477 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8478 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8479 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8480 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8481 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8482 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8483 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8484 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8486 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8485 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8487 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8488 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8489 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8490 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8491 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8492 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8493 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8494 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8495 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8496 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8497 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8498 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8499 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8500 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8501 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8502 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8503 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8504 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8505 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8506 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8507 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8508 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8509 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8510 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8511 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8512 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8513 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8514 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8515 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8516 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8517 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8518 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8519 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8520 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8521 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8522 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8523 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8524 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8525 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8526 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8527 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8528 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8529 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8530 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8531 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8532 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8533 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8534 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8535 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8536 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8537 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8538 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8539 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8540 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8541 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8542 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8543 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8544 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8545 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8546 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8547 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8548 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8549 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8550 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8551 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8552 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8553 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8554 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8555 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8556 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8557 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8558 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8559 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8560 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8561 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8562 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8563 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8564 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8565 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8566 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8567 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8568 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8569 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8570 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8571 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8572 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8573 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8574 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8576 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8575 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8577 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8578 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8579 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8580 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8581 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8582 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8583 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8584 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8585 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8586 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8587 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8588 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8589 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8590 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8591 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8592 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8593 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8594 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8595 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8596 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 8597 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8598 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 8599 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8600 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 8601 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8602 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: C0 8603 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8604 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 8605 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8606 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8607 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8608 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8609 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8610 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8611 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8612 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8613 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8614 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8615 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8616 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8617 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8618 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8619 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8620 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8621 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8622 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8623 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8624 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8625 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8626 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8627 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8628 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8629 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8630 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8631 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8632 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8633 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8634 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8635 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8636 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8637 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8638 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8639 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8640 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8641 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8642 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8643 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8644 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8645 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8646 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8647 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8648 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8649 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8650 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8651 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8652 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8653 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8654 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8655 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8656 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8657 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8658 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8659 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8660 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8661 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8662 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8663 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8664 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8665 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8666 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8667 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8668 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8669 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8670 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8671 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8672 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8673 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8674 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8675 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8676 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8677 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8678 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8679 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8680 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8681 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8682 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8683 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8684 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8685 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8686 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8687 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8688 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8689 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8690 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8691 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8692 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8693 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8694 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8695 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8696 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8697 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8698 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8699 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8700 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8701 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8702 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8703 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8704 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8705 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8706 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8707 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8708 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8709 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8710 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8711 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8712 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8713 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8714 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8715 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8716 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8717 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8718 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8719 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8720 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8721 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8722 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8723 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8724 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8725 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8726 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8727 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8728 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8729 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8730 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8731 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8732 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 8733 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8734 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 8735 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8736 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8737 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8738 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 8739 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8740 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8741 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8742 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8743 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8744 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8745 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8746 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8747 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8748 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8749 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8750 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8751 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8752 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8753 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 8754 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8755 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8756 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8757 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8758 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8759 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 8760 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8761 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8762 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8763 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8764 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8765 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 8766 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8767 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8768 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8769 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8770 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 8771 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 8772 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8773 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8774 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8775 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8776 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8777 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8778 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8779 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8780 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8781 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8782 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8783 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8784 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8785 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8786 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8787 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8788 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8789 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8790 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8791 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8792 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8793 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8794 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8795 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8796 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8797 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8798 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8799 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8800 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8801 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8802 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8803 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8804 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8805 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8806 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8807 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8808 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8809 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8810 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8811 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8812 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8813 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8814 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8815 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8816 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8817 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8818 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8819 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8820 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8821 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8822 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8823 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8824 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8825 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8826 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8827 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8828 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8829 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8830 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8831 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8832 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8833 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8834 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8835 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8836 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8837 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8838 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8839 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8840 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8841 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8842 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8843 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8844 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8845 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8846 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8847 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8848 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8849 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8850 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8851 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8852 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8853 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8854 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8855 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8856 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8857 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8858 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8859 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8860 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8861 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8862 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8863 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8864 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8865 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8866 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8867 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8868 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8869 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8870 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8871 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8872 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8873 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8874 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8875 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8876 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8877 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8878 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8879 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8880 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8881 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8882 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8883 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8884 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8885 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8886 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8887 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8888 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8889 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8890 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8891 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8892 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8893 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8894 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8895 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8896 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8897 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8898 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8899 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8900 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8901 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8902 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8903 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8904 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8905 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8906 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8907 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8908 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8909 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8910 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8911 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8912 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8913 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8914 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8915 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8916 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8917 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8918 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8919 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8920 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8921 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8922 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8923 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8925 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8924 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8926 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8927 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8928 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8929 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8930 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8931 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8932 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8933 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8934 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8935 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8937 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8936 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8938 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8939 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8940 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8941 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8942 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8943 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8944 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8945 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8946 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8947 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8948 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8949 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8950 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8951 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8952 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8953 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8954 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8955 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8956 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8957 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8958 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8959 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8961 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8960 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8962 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8963 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8964 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8965 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8966 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8967 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8968 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8969 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8970 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8971 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8972 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8973 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8974 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8975 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8976 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8977 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8978 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8979 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8980 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8981 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8982 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8983 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8984 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8985 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8986 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8987 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8988 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8989 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8990 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8991 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8992 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8993 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8994 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8995 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 8996 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8997 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 8998 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 8999 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9000 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9001 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9002 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9003 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9004 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9005 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9006 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9007 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9009 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9008 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9010 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9011 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9012 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9013 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9014 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9015 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9016 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9017 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9018 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9019 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9020 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9021 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9022 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9023 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9024 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9025 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9026 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9027 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9028 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9029 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9030 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9031 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9032 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9033 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9034 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9035 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9036 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9037 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9038 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9039 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9040 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9041 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9042 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9043 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9044 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9045 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9046 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9047 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9048 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9049 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9050 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9051 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9052 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9053 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9054 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9055 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9056 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9057 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9058 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9059 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9060 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9061 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9062 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9063 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9064 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9065 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9066 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9067 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9068 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9069 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9070 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9071 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9072 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9073 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9074 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9075 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9076 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9077 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9078 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9079 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9080 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9081 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9082 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9083 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9084 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9085 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9086 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9087 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9088 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9089 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9090 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9091 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9092 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9093 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9094 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9095 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9096 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9097 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9098 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9099 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9100 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9101 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9102 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9103 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9104 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9105 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9106 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9107 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9108 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9109 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9110 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9111 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9112 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9113 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9114 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9115 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9116 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9117 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9118 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9119 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9120 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9121 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9123 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9122 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9124 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9125 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9126 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9127 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9128 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9129 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9130 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9131 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9132 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9133 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9134 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9135 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9136 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9137 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9138 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9139 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9140 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9141 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9142 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9143 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9144 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9145 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9146 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9147 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9148 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9149 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9150 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9151 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9152 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9153 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9154 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9155 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9156 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9157 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9158 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9159 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9160 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9161 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9162 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9163 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9164 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9165 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9166 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9167 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9168 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9169 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9170 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9171 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9172 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9173 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9174 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9175 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9176 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9177 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9178 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9179 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9180 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9181 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9182 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9183 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9184 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9185 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 9186 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9187 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 9188 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9189 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 11 9190 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9191 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: C0 9192 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9193 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 9194 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9195 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9196 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9197 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9198 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9199 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9200 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9201 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9202 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9203 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9204 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9205 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9206 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9207 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9208 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9209 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9210 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9211 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9212 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9213 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9214 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9215 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9216 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9217 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9218 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9219 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9220 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9221 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9222 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9223 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9224 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9225 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9226 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9227 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9228 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9229 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9230 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9231 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9232 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9233 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9234 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9235 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9236 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9237 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9238 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9239 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9240 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9241 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9242 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9243 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9244 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9245 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9246 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9247 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9248 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9249 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9250 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9251 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9252 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9253 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9254 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9255 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9256 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9257 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9258 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9259 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9260 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9261 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9262 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9263 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9264 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9265 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9266 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9267 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9268 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9269 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9270 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9271 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9272 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9273 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9274 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9275 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9276 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9277 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9278 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9279 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9280 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9281 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9282 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9283 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9284 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9285 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9286 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9287 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9288 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9289 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9290 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9291 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9292 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9293 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9294 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9295 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9296 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9297 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9298 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9299 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9300 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9301 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9302 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9303 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9304 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9305 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9306 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9307 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9308 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9309 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9310 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9311 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9312 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9313 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9314 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9315 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9316 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9317 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9318 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9319 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9320 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9321 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 9322 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9323 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 9324 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9325 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9326 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 9327 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 9328 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9329 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9330 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9331 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9332 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9333 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9334 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9336 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9335 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9337 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9338 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9339 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9340 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9341 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 9342 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 9343 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9344 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9345 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9346 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9347 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 9348 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 02 9349 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9350 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9351 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9352 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9353 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 9354 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 9355 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9356 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9357 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9358 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9359 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 9360 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 9361 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9362 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9363 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9364 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9365 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9366 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9367 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9368 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9369 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9370 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9371 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9372 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9373 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9374 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9375 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9376 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9377 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9378 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9379 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9380 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9381 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9382 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9383 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9384 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9385 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9386 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9388 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9387 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9389 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9390 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9391 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9392 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9393 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9394 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9395 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9396 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9397 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9398 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9399 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9400 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9401 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9402 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9403 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9404 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9405 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9406 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9407 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9408 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9409 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9410 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9411 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9412 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9413 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9414 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9415 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9416 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9417 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9418 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9419 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9420 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9421 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9422 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9423 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9424 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9425 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9426 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9427 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9428 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9429 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9430 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9431 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9432 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9433 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9434 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9435 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9436 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9437 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9438 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9439 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9440 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9441 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9442 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9443 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9444 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9445 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9446 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9447 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9448 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9449 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9450 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9451 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9452 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9453 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9454 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9455 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9456 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9457 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9458 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9459 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9460 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9461 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9462 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9463 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9464 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9465 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9466 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9467 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9468 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9469 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9470 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9471 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9472 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9473 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9474 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9475 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9476 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9477 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9478 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9479 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9480 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9481 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9482 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9483 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9484 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9485 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9486 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9487 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9488 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9489 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9490 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9491 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9492 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9493 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9494 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9495 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9496 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9497 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9498 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9499 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9500 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9502 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9501 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9503 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9504 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9505 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9506 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9507 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9508 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9509 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9510 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9511 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9512 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9513 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9514 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9515 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9516 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9517 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9518 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9520 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9519 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9521 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9522 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9523 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9524 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9525 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9526 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9527 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9528 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9529 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9530 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9532 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9531 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9533 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9534 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9535 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9536 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9537 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9538 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9539 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9540 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9541 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9542 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9543 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9544 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9545 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9546 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9547 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9548 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9549 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9550 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9551 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9552 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9553 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9554 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9555 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9556 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9557 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9558 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9559 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9560 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9561 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9562 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9563 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9564 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9565 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9566 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9567 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9568 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9569 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9570 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9571 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9572 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9573 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9574 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9575 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9576 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9577 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9578 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9580 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9579 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9581 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9582 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9583 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9584 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9585 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9586 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9587 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9588 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9589 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9590 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9592 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9591 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9593 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9594 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9595 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9596 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9597 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9598 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9599 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9600 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9601 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9602 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9603 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9604 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9605 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9606 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9607 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9608 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9609 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9610 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9611 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9612 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9613 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9614 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9615 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9616 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9617 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9618 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9619 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9620 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9621 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9622 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9623 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9624 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9625 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9626 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9627 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9628 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9629 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9630 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9631 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9632 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9633 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9634 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9635 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9636 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9637 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9638 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9639 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9640 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9641 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9642 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9643 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9644 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9645 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9646 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9647 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9648 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9649 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9650 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9651 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9652 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9653 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9654 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9655 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9656 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9657 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9658 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9659 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9660 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9661 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9662 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9663 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9664 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9665 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9666 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9667 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9668 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9670 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9669 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9671 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9672 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9673 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9674 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9675 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9676 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9677 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9678 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9679 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9680 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9681 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9682 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9683 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9684 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9685 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9686 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9687 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9688 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9689 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9690 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9691 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9692 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9693 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9694 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9695 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9696 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9697 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9698 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9699 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9700 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9701 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9702 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9703 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9704 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9705 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9706 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9707 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9708 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9709 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9710 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9711 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9712 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9713 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9714 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9715 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9716 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9717 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9718 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9719 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9720 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9721 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9722 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9723 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9724 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9725 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9726 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9727 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9728 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9729 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9730 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9731 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9732 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9733 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9734 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9735 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9736 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9737 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9738 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9739 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9740 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9741 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9742 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9743 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9744 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9745 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9746 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9747 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9748 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9749 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9750 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9751 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9752 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9753 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9754 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9755 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9756 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9757 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9758 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9760 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9759 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9761 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9762 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9763 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9764 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9765 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9766 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 9767 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9768 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9769 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9770 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 9771 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9772 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 9773 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 9774 8:53:10 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 9775 8:53:10 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13575 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13576 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13577 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13578 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13579 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13580 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13581 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13582 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13583 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13584 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13585 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13586 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13587 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13588 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13589 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13590 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13591 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13592 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13593 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13594 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13595 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13596 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13597 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13598 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13599 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13600 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13601 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13602 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13603 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13604 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13605 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13606 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13607 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13608 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13609 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13610 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13611 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13612 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13613 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13614 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13615 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13616 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13617 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13618 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13619 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13620 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13621 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13622 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13623 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13624 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13625 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13626 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13627 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13628 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13629 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13631 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13630 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13632 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13633 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13634 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13635 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13636 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13637 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13638 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13639 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13640 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13641 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13642 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13643 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13644 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13645 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13646 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13647 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13648 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13649 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13650 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13651 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13652 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13653 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13654 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13655 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13656 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13657 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13658 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13659 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13660 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13661 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13662 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13663 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13664 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13665 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13667 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13666 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13668 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13669 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13670 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13671 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13672 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13673 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13674 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13675 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13676 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13677 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13678 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13679 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13680 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13681 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13682 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13683 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13684 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13685 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13686 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13687 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13688 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13689 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13691 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13690 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13692 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13693 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13694 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13695 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13696 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13697 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13698 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13699 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13700 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13701 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13702 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13703 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13704 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13705 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13706 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13707 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13708 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13709 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13710 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13711 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13712 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13713 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13714 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13715 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13716 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13717 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13718 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13719 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13720 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13721 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13722 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13723 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13724 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13725 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13727 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13726 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13728 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13729 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13730 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13731 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13732 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13733 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13734 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13735 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13736 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13737 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13738 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13739 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13740 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13741 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13742 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13743 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13744 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13745 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13746 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13747 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13748 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13749 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13750 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13751 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13752 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13753 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13754 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13755 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13756 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13757 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13758 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13759 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13760 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13761 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13762 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13763 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13764 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13765 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13766 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13767 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13768 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13769 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13770 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13771 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13772 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13773 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13774 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13775 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13776 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13777 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13778 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13779 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13780 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13781 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13782 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13783 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13784 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13785 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13786 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13787 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13788 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13789 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13790 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13791 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13792 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13793 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13794 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13795 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13796 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13797 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13798 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13799 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13800 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13801 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13802 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13803 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13804 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13805 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13806 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13807 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13808 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13809 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13810 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13811 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13812 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13813 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13814 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13815 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13816 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13817 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13818 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13819 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13820 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13821 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13822 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13823 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13824 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13825 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13826 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13827 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13828 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13829 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13830 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13831 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13832 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13833 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13834 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13835 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13836 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13837 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13838 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13839 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13840 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13841 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13842 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13843 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13844 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13845 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13846 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13847 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13848 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13849 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13850 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13851 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13852 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13853 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13854 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13855 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13856 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13857 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13858 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13859 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13860 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13861 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13862 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13863 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13864 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13865 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13866 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13867 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13868 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13869 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13870 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13871 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13872 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13873 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13874 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13875 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13876 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13877 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13878 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13879 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13880 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13881 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13882 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13883 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13884 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13885 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13886 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13887 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13888 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13889 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13890 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13891 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13892 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13893 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 13894 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13895 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 13896 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13897 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 13898 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13899 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 13900 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13901 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 12 13902 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13903 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: C0 13904 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13905 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 13906 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13907 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13908 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13909 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13910 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13911 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13912 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13913 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13914 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13915 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13916 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13917 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13918 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13919 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13920 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13921 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13922 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13923 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13924 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13925 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13926 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13927 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13928 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13929 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13930 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13931 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13932 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13933 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13934 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13935 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13936 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13937 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13938 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13939 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13940 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13941 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13942 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13943 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13944 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13945 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13946 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13947 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13948 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13949 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13950 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13951 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13952 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13953 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13954 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13955 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13956 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13957 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13958 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13959 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13960 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13961 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13962 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13963 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13964 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13965 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13966 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13967 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13968 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13969 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13970 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13971 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13972 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13973 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13974 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13975 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13976 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13977 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13978 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13979 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13980 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13981 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13982 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13983 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13984 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13985 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13986 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13987 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13988 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13989 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13990 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13991 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13992 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13993 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13994 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13995 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13996 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13997 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 13998 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 13999 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14000 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14001 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14002 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14003 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14004 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14005 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14006 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14007 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14008 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14009 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14010 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14011 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14012 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14013 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14014 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14015 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14016 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14017 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14018 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14019 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14020 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14021 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14022 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14023 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14024 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14025 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14026 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14027 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14028 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14029 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14030 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14031 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14032 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14033 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 14034 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14035 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 14036 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14037 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14038 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 14039 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 14040 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14041 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14042 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14043 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14044 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14045 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14046 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14047 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14048 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14049 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14050 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14051 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14052 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14053 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 14054 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 14055 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14056 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14057 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14058 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14059 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 14060 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 03 14061 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14062 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14063 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14064 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14065 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 14066 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 14067 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14068 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14069 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14070 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14071 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 14072 8:53:11 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 14073 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14074 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14075 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14076 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14077 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14078 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14079 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14080 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14081 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14082 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14083 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14084 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14085 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14086 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14087 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14088 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14089 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14090 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14091 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14092 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14093 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14094 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14095 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14096 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14097 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14098 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14099 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14100 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14101 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14102 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14103 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14104 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14105 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14106 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14107 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14108 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14109 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14110 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14112 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14111 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14113 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14114 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14115 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14116 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14117 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14118 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14119 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14120 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14121 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14122 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14123 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14124 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14125 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14126 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14127 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14128 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14129 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14130 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14131 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14132 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14133 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14134 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14135 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14136 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14137 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14138 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14139 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14140 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14141 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14142 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14143 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14144 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14145 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14146 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14147 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14148 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14149 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14150 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14151 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14152 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14153 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14154 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14155 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14156 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14157 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14158 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14159 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14160 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14161 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14162 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14163 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14164 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14165 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14166 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14167 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14168 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14169 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14170 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14171 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14172 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 14173 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14174 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14175 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14176 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 14177 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 14178 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14179 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14180 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 14181 8:53:11 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 24411 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24412 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24413 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24414 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24415 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24416 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24417 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24418 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24419 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24420 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24421 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24422 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24423 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24424 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24425 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24426 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24427 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24428 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24429 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24430 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24431 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24432 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24433 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24434 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24435 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24436 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24437 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24438 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24439 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24440 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24441 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24442 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24443 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24444 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24445 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24446 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24447 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24448 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24449 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24450 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24451 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24452 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24453 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24454 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24455 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24456 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24457 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24458 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24459 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24460 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24461 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24462 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24463 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24464 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24465 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24466 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24467 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24468 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24469 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24470 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24471 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24472 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24473 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24474 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24475 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24476 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24477 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24478 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24479 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24480 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24481 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24482 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24483 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24484 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24485 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24486 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24487 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24488 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24489 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24490 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24491 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24492 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24493 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24494 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24495 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24496 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24497 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24498 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24499 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 24500 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24501 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 24502 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24503 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 15 24504 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24505 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 24506 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24507 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 24508 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24509 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24510 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24511 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24512 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24513 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24514 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24515 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24516 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24517 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24518 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24519 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24520 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24521 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24522 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24523 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24524 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24525 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24526 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24527 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24528 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24529 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24530 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24531 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24532 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24533 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24534 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24535 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24536 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24537 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24538 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24539 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24540 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24541 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24542 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24543 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24544 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24545 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24546 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24547 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24548 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24549 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24550 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24551 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24552 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24553 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24554 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24555 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24556 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24557 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24558 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24559 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24560 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24561 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24562 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24563 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24564 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24565 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24566 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24567 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24568 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24569 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24570 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24571 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24572 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24573 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24574 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24575 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24576 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24577 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24578 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24579 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24580 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24581 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24582 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24583 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24584 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24585 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24586 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24587 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24588 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24589 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24590 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24591 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24592 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24593 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24594 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24595 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24596 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24597 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24598 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24599 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24600 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24601 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24602 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24603 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24604 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24605 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24606 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24607 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24608 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24609 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24610 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24611 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24612 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24613 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24614 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24615 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24616 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24617 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24618 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24619 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24620 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24621 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24622 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24623 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24624 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24625 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24626 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24627 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24628 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24629 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24630 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24631 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24632 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24633 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24634 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24635 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 24636 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24637 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 24638 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24639 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24640 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 24641 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 24642 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24643 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24644 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24645 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24646 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24647 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24648 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24649 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24650 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24651 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24652 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24653 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24654 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24655 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 24656 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 24657 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24658 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24659 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24660 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24661 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 24662 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 05 24663 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24664 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24665 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24666 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24667 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 24668 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 24669 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24670 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24671 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24672 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24673 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 24674 8:53:13 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 24675 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24676 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24677 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24678 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24679 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24680 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24681 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24682 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24683 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24684 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24685 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24686 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24687 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24688 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24689 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24690 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24691 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24692 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24693 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24694 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24695 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24696 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24697 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24698 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24699 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24700 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24701 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24702 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24703 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24704 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24705 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24706 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24707 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24708 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24709 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24710 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24711 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24712 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24713 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24714 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24715 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24716 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24717 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24718 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24719 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24720 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24721 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24722 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24723 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24724 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24725 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24726 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24727 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24728 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24729 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24730 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24731 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24732 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24733 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24734 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24735 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24736 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24737 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24738 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24739 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24740 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24741 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24742 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24743 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24744 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24745 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24746 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24747 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24748 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24749 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24750 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24751 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24752 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24753 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24754 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24755 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24756 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24757 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24758 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24759 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24760 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24761 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24762 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24763 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24764 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24765 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24766 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24768 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24767 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24769 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24770 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24771 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24772 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24773 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24774 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24775 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24776 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24777 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24778 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24779 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24780 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24781 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24782 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24783 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24784 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24785 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24786 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24787 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24788 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24789 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24790 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24791 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24792 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24793 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24794 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24795 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24796 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24797 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24798 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24799 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24800 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24801 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24802 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24803 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24804 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24805 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24806 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24807 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24808 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24809 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24810 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24811 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24812 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24813 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24814 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24815 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24816 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24817 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24818 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24819 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24820 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24821 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24822 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24823 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24824 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24825 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24826 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24827 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24828 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24829 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24830 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24831 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24832 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24833 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24834 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24835 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24836 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24837 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24838 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24839 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24840 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24841 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24842 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24843 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24844 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24845 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24846 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24847 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24848 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24849 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24850 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24851 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24852 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24853 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24854 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24855 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24856 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24857 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24858 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24859 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24860 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24861 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24862 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24863 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24864 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24865 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24866 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24867 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24868 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24869 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24870 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24871 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24872 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24873 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24874 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24875 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24876 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24877 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24878 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24879 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24880 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24881 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24882 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24883 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24884 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24885 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24886 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24887 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24888 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24889 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24890 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24891 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24892 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24893 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24894 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24895 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24896 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24897 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24898 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24899 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24900 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24901 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24902 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24903 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24904 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24905 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24906 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24907 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24908 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24909 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24910 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24911 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24912 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24913 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24914 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24915 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24916 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24917 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24918 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24919 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24920 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24921 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24922 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24923 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24924 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24925 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24926 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24927 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24928 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24929 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24930 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24931 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24932 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24933 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24934 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24935 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24936 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24937 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24938 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24939 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24940 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24941 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24942 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24943 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24944 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24945 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24946 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24947 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24948 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24949 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24950 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24951 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24952 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24953 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24954 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24955 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24956 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24957 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24958 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24959 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24960 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24961 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24962 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24963 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24964 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24965 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24966 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24967 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24968 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24969 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24970 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24971 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24972 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24973 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24974 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24975 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24976 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24977 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24978 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24979 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24980 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24981 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24982 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24983 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24984 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24985 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24986 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24987 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24988 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24989 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24990 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24991 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24992 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24993 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24994 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 24995 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 24996 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24997 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24998 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 24999 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25000 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 25001 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 25002 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25003 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25004 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25005 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25006 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 25007 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25008 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 25009 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25010 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25011 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25012 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 25013 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25014 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 25015 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25016 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 25017 8:53:13 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 34667 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34668 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 34669 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 34670 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34671 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34672 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34673 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34674 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 34675 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 17 34676 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34677 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34678 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34679 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 34680 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34681 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 34682 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34683 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34684 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34685 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34686 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 34687 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 34688 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34689 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34690 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34691 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34692 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34693 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34694 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34695 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34697 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34696 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34698 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34699 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34700 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34701 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34702 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34703 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34704 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34705 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34706 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34707 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34708 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34709 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34710 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34711 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34712 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34713 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34714 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34715 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34716 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34717 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34718 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34719 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34720 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34721 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34722 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34723 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34724 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34725 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34726 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34727 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34728 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34729 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34730 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34731 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34732 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34733 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34734 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34735 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34736 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34737 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34738 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34739 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34740 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34741 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34742 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34743 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34744 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34745 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34746 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34747 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34748 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34749 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34750 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34751 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34752 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34753 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34754 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34755 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34756 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34757 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34758 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34759 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34760 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34761 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34762 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34763 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34764 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34765 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34766 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34767 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34768 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34769 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34770 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34771 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34772 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34773 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34774 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34775 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34776 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34777 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34778 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34779 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34780 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34781 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34782 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34783 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34784 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34785 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34787 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34786 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34788 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34789 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34790 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34791 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34792 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34793 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34794 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34795 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34796 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34797 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34798 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34799 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34800 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34801 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34802 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34803 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34804 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34805 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34806 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34807 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34808 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34809 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34810 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34811 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34812 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34813 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34814 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34815 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34816 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34817 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34818 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34819 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34820 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34821 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34823 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34822 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34824 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34825 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34826 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34827 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34828 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34829 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34830 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34831 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34832 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34833 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34834 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34835 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34836 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34837 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34838 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34839 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34840 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34841 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34842 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34843 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34844 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34845 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34846 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34847 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34848 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34849 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34850 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34851 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34852 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34853 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34854 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34855 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34856 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34857 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34858 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34859 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34860 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34861 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34862 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34863 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34864 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34865 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34866 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34867 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34868 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34869 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34870 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34871 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34872 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34873 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34874 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34875 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34876 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34877 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34878 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34879 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34880 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34881 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34882 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34883 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34884 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34885 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34886 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34887 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34888 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34889 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34890 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34891 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34892 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34893 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34894 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34895 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34896 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34897 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34898 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34899 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34900 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34901 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34902 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34903 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34904 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34905 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34906 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34907 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34908 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34909 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34910 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34911 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34912 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34913 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34914 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34915 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34916 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34917 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34918 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34919 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34920 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34921 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34922 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34923 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34924 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34925 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34926 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34927 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34928 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34929 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34930 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34931 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34932 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34933 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34934 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34935 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34936 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34937 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34938 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34939 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34940 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34941 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34942 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34943 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34944 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34945 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34946 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34947 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34948 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34949 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34950 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34951 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34952 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34953 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34954 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34955 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34956 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34957 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34958 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34959 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34961 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34960 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34962 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34963 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34964 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34965 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34966 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34967 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34968 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34969 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34970 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34971 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34972 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34973 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34974 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34975 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34976 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34977 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34978 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34979 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34980 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34981 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34982 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34983 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34984 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34985 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34986 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34987 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34988 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34989 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34990 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34991 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34992 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34993 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34994 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34995 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 34996 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 34997 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34998 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 34999 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35000 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35001 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35002 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35003 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35004 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35005 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35006 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35007 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35008 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35009 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35010 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35011 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35012 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35013 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35014 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35015 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35016 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35017 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35018 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35019 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35020 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35021 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35022 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35023 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35024 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35025 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35026 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35027 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35028 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35029 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35030 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35031 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35032 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35033 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35034 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35035 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35036 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35037 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35038 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35039 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35040 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35041 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35042 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35043 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35044 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35045 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35046 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35047 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35048 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35049 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35050 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35051 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35052 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35053 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35054 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35055 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35056 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35057 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35058 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35059 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35060 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35061 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35062 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35063 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35064 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35065 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35066 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35067 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35068 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35069 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35070 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35071 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35072 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35073 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35074 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35075 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35076 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35077 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35078 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35079 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35080 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35081 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35082 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35083 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35084 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35085 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35086 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35087 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35088 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35089 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35090 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35091 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35092 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35093 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35094 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35095 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35096 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35097 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35098 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35099 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35100 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35101 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 35102 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35103 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 35104 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35105 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 17 35106 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35107 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 35108 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35109 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 35110 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35111 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35112 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35113 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35114 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35115 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35116 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35117 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35118 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35119 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35120 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35121 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35122 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35123 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35124 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35125 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35126 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35127 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35128 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35129 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35130 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35131 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35132 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35133 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35134 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35135 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35136 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35137 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35138 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35139 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35140 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35141 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35142 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35143 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35144 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35145 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35146 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35147 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35148 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35149 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35150 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35151 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35152 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35153 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35154 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35155 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35156 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35157 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35158 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35159 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35160 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35161 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35162 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35163 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35164 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35165 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35166 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35167 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35168 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35169 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35170 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35171 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35172 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35173 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35174 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35175 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35176 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35177 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35178 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35179 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35180 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35181 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35182 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35183 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35184 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35185 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35186 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35187 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35188 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35189 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35190 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35191 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35192 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35193 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35194 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35195 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35196 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35197 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35198 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35199 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35200 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35201 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35202 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35203 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35204 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35205 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35206 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35207 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35208 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35209 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35210 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35211 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35212 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35213 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35214 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35215 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35216 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35217 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35218 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35219 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35220 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35221 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35222 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35223 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35224 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35225 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35226 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35227 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35228 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35229 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35230 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35231 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35232 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35233 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35234 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35235 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35236 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35237 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 35238 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35239 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 35240 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35241 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35242 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 35243 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 35244 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35245 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35246 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35247 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35248 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35249 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35250 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35251 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35252 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35253 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35254 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35255 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35256 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35257 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 35258 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 35259 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35260 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35261 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35262 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35263 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 35264 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 07 35265 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35266 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35267 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 35268 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35269 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 35270 8:53:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 35271 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 35272 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 35273 8:53:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 45525 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45527 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45526 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45528 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45529 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45530 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45531 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45532 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45533 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45534 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45535 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45536 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45537 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45538 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45539 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45540 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45541 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45542 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45543 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45544 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45545 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45546 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45547 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45548 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45549 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45550 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45551 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45552 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45553 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45554 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45555 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45556 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45557 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45558 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45559 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45560 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45561 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45562 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45563 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45564 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45565 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45566 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45567 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45568 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45569 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45570 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45571 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45572 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45573 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45574 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45575 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45576 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45577 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45578 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45579 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45580 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45581 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45582 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45583 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45584 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45585 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45586 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45587 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45588 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45589 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45590 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45591 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45592 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45593 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45594 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45595 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45596 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45597 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45598 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45599 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45600 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45601 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45602 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45603 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45604 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45605 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45606 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45607 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45608 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45609 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45610 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45611 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45612 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45613 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45614 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45615 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45616 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45617 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45618 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45619 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45620 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45621 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45622 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45623 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45624 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45625 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45626 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45627 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45628 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45629 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45630 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45631 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45632 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45633 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45634 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45635 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45636 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45637 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45638 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45639 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45640 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45641 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45642 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45643 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45644 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45645 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45647 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45646 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45648 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45649 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45650 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45651 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45652 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45653 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45654 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45655 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45656 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45657 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45658 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45659 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45660 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45661 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45662 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45663 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45664 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45665 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45666 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45667 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45668 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45669 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45670 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45671 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45672 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45673 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45674 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45675 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45676 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45677 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45678 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45679 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45680 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45681 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45682 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45683 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45684 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45685 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45686 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45687 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45688 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45689 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45690 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45691 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45692 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45693 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45694 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45695 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45696 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45697 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45698 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45699 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45700 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45701 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45702 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45703 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 45704 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45705 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 45706 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45707 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 19 45708 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45709 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 80 45710 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45711 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 45712 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45713 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45714 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45715 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45716 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45717 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45718 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45719 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45720 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45721 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45722 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45723 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45724 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45725 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45726 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45727 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45728 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45729 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45730 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45731 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45732 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45733 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45734 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45735 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45736 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45737 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45738 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45739 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45740 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45741 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45742 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45743 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45744 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45745 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45746 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45747 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45748 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45749 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45750 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45751 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45752 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45753 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45754 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45755 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45756 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45757 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45758 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45759 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45760 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45761 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45762 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45763 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45764 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45765 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45766 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45767 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45768 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45769 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45770 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45771 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45772 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45773 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45774 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45775 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45776 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45777 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45778 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45779 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45780 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45781 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45782 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45783 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45784 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45785 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45786 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45787 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45788 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45789 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45790 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45791 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45792 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45793 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45794 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45795 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45796 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45797 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45798 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45799 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45800 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45801 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45802 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45803 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45804 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45805 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45806 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45807 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45808 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45809 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45810 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45811 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45812 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45813 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45814 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45815 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45816 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45817 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45818 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45819 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45820 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45821 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45822 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45823 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45824 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45825 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45826 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45827 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45828 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45829 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45830 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45831 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45832 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45833 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45834 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45835 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45836 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45837 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45838 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45839 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 45840 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45841 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 45842 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45843 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45844 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 45845 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 45846 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45847 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45848 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45849 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45850 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45851 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45852 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45853 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45854 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45855 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45856 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45857 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45858 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45859 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 45860 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 45861 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45862 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45863 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45864 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45865 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 45866 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 09 45867 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45868 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45869 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45870 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45871 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 45872 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 45873 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45874 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45875 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45876 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45877 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 45878 8:53:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 45879 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45880 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45881 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45882 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45883 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45884 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45885 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45886 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45887 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45888 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45889 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45890 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45891 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45892 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45893 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45894 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45895 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45896 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45897 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45898 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45899 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45900 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45901 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45902 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45903 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45904 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45905 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45906 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45907 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45908 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45909 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45910 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45911 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45912 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45913 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45914 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45915 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45916 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45917 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45918 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45919 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45920 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45921 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45922 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45923 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45924 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45925 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45926 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45927 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45928 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45929 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45930 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45931 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45932 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45933 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45934 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45935 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45936 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45937 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45938 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45939 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45940 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45941 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45942 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45943 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45944 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45945 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45946 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45947 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45948 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45949 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45950 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45951 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45952 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45953 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45954 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45955 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45956 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45957 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45958 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45959 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45960 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45961 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45962 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45963 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45964 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45965 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45966 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45967 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45968 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45969 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45970 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45971 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45972 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45973 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45974 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45975 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45976 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45977 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45978 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45979 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45980 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45981 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45982 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45983 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45984 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45985 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45986 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45987 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45988 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45989 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45990 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45991 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45992 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45993 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45994 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 45995 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 45996 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45997 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45998 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 45999 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46000 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46001 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46002 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46003 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46004 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46005 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46006 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46007 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46008 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46009 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46010 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46011 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46012 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46013 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46014 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46015 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46016 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46017 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46018 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46019 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46020 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46021 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46022 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46023 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46024 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46025 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46026 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46027 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46028 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46029 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46030 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46031 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46032 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46033 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46034 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46035 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46036 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46037 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46038 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46039 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46040 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46041 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46042 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46043 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46044 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46045 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46046 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46047 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46048 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46049 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46050 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46051 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46052 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46053 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46054 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46055 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46056 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46057 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46058 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46059 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46060 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46061 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46062 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46063 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46064 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46065 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46066 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46067 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46068 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46069 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46070 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46071 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46072 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46074 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46073 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46075 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46076 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46077 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46078 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46079 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46080 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46081 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46082 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46083 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46084 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46085 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46086 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46087 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46088 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46089 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46090 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46091 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46092 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46093 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46094 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46095 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46096 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46097 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46098 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46099 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46100 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46101 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46102 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46103 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46104 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46105 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46106 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46107 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46108 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46109 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46110 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46111 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46112 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46113 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46114 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46115 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46116 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46117 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46118 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46119 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46120 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46121 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46122 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 46123 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46124 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46125 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46126 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 46127 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46128 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 46129 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46130 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 46131 8:53:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 56460 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56461 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 56462 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 56463 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56464 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56465 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56466 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56467 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 56468 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 0C 56469 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56470 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56471 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56472 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56473 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 56474 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 56475 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56476 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56477 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56478 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56479 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 56480 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 56481 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56482 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56483 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56484 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56485 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56486 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56487 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56488 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56489 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56490 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56491 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56492 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56493 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56494 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56495 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56496 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56497 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56498 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56499 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56500 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56501 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56502 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56503 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56504 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56505 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56506 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56507 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56508 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56509 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56510 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56511 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56512 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56513 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56514 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56515 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56516 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56517 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56518 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56519 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56520 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56521 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56522 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56523 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56524 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56525 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56526 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56527 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56528 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56529 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56530 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56531 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56532 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56533 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56534 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56535 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56536 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56537 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56538 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56539 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56540 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56541 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56542 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56544 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56543 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56545 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56546 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56547 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56548 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56549 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56550 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56551 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56552 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56553 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56554 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56555 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56556 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56557 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56558 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56559 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56560 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56561 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56562 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56563 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56564 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56565 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56566 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56567 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56568 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56569 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56570 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56571 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56572 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56573 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56574 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56575 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56576 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56577 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56578 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56579 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56580 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56581 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56582 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56583 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56584 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56585 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56586 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56587 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56588 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56589 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56590 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56591 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56592 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56593 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56594 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56595 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56596 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56597 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56598 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56599 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56600 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56601 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56602 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56603 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56604 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56605 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56606 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56607 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56608 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56609 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56610 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56611 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56612 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56613 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56614 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56615 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56616 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56617 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56618 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56619 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56620 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56621 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56622 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56623 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56624 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56625 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56626 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56627 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56628 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56629 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56630 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56631 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56632 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56633 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56634 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56635 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56636 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56637 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56638 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56639 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56640 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56641 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56642 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56643 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56644 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56645 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56646 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56647 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56648 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56649 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56650 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56651 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56652 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56653 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56654 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56655 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56656 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56657 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56658 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56659 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56660 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56661 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56662 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56663 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56664 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56665 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56666 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56668 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56667 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56669 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56670 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56671 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56672 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56673 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56674 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56675 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56676 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56677 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56678 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56679 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56680 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56681 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56682 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56683 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56684 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56685 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56686 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56687 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56688 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56689 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56690 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56691 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56692 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56693 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56694 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56695 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56696 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56697 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56698 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56699 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56700 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56701 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56702 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56703 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56704 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56705 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56706 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56707 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56708 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56709 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56710 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56711 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56712 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56713 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56714 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56715 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56716 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56717 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56718 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56719 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56720 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56721 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56722 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56723 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56724 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56725 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56726 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56727 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56728 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56729 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56730 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56731 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56732 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56733 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56734 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56735 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56736 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56737 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56738 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56739 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56740 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56741 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56742 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56743 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56744 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56745 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56746 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56747 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56748 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56749 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56750 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56751 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56752 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56753 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56754 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56755 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56756 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56757 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56758 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56759 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56760 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56761 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56762 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56763 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56764 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56765 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56766 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56767 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56768 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56769 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56770 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56771 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56772 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56773 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56774 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56775 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56776 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56777 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56778 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56779 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56780 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56781 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56782 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56783 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56784 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56785 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56786 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56787 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56788 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56789 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56790 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56791 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56792 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56793 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56794 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56795 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56796 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56797 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56798 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56799 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56800 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56801 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56802 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56803 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56804 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56805 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56806 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56807 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56808 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56809 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56810 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56811 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56812 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56813 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56814 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56815 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56816 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56817 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56818 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56819 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56820 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56821 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56822 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56823 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56824 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56825 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56826 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56827 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56828 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56829 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56830 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56831 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56832 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56833 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56834 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56835 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56836 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56837 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56838 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56839 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56840 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56841 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56842 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56843 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56844 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56845 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56846 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56847 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56848 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56849 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56850 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56851 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56852 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56853 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56854 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56855 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56856 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56857 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56858 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56859 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56860 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56861 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56862 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56863 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56864 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56865 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56866 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56867 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56868 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56869 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56870 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56871 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56872 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56873 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56874 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56875 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56876 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56877 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56878 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56879 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56880 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56881 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56882 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56883 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56884 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56885 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56886 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56887 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56888 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56889 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56890 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 56891 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56892 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 56893 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56894 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 56895 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56896 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 56897 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56898 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 0C 56899 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56900 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 56901 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56902 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 40 56903 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56904 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56905 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56906 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56907 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56908 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56909 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56910 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56911 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56912 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56913 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56914 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56915 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56916 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56917 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56918 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56919 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56920 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56921 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56922 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56923 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56924 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56925 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56926 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56927 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56928 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56929 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56930 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56931 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56932 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56933 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56934 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56935 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56936 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56937 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56938 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56939 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56940 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56941 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56942 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56943 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56944 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56945 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56946 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56947 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56948 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56949 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56950 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56951 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56952 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56953 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56954 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56955 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56956 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56957 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56958 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56959 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56960 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56961 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56962 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56963 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56964 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56965 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56966 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56967 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56968 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56969 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56970 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56971 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56972 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56973 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56974 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56975 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56976 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56977 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56978 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56979 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56980 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56981 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56982 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56983 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56984 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56985 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56986 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56987 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56988 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56989 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56990 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56991 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56992 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56993 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56994 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56995 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56996 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56997 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 56998 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 56999 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57000 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57001 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57002 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57003 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57004 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57005 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57006 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57007 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57008 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57009 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57010 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57011 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57012 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57013 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57014 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57015 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57016 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57017 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57018 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57019 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57020 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57021 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57022 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57023 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57024 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57025 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57026 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57027 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57028 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57029 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57030 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 57031 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57032 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 57033 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57034 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57035 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 57036 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 57037 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57038 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 57039 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 57040 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57041 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57042 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57043 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 57044 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57045 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 57046 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57047 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57048 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57049 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57050 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 57051 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 57052 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57053 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 57054 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 57055 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57056 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 57057 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 1C 57058 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57059 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 57060 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 57061 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57062 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 57063 8:53:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 57064 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 57065 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 57066 8:53:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 59990 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_CREATE ProlificSerial0 SUCCESS Options: Open 59991 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 59992 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_QUEUE_SIZE ProlificSerial0 SUCCESS InSize: 1024 OutSize: 512 59993 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 59994 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_TIMEOUTS ProlificSerial0 SUCCESS RI:-1 RM:0 RC:0 WM:0 WC:5000 59995 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 59996 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 59997 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 59998 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 59999 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 60000 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60001 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_BAUD_RATE ProlificSerial0 SUCCESS 60002 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60003 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_LINE_CONTROL ProlificSerial0 SUCCESS 60004 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_CHARS ProlificSerial0 SUCCESS 60005 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_HANDFLOW ProlificSerial0 SUCCESS 60006 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_BAUD_RATE ProlificSerial0 SUCCESS Rate: 9600 60007 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_CLR_RTS ProlificSerial0 SUCCESS 60008 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_DTR ProlificSerial0 SUCCESS 60009 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_LINE_CONTROL ProlificSerial0 SUCCESS StopBits: 1 Parity: NONE WordLength: 8 60010 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_CHAR ProlificSerial0 SUCCESS EOF:1a ERR:0 BRK:0 EVT:0 XON:11 XOFF:13 60011 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_HANDFLOW ProlificSerial0 SUCCESS Shake:1 Replace:0 XonLimit:256 XoffLimit:256 60012 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 60013 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60014 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 60015 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60016 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60017 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60018 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 55 60019 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60020 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60021 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60022 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60023 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60024 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 60025 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60026 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60027 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60028 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60029 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60030 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 15 60031 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60032 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60033 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60034 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60035 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60036 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 09 60037 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60038 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60039 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60040 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60041 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60042 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 25 60043 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60044 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60045 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60046 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60047 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60048 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 60049 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60050 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60051 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60052 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60053 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60054 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 4D 60055 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60056 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60057 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60058 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60059 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60060 8:54:14 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 02 60061 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60062 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60063 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60064 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60065 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60066 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60067 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60068 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60069 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60070 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60071 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60072 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60073 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60074 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60075 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60076 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60077 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60078 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60079 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60080 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60081 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60082 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60083 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60084 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60085 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60086 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60087 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60088 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60089 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60090 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60091 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60092 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60093 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60094 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60095 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60096 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60097 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60098 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60099 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60100 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60101 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60102 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60103 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60104 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60105 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60106 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60107 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60108 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60109 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60110 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60111 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60112 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60113 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60114 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60115 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60116 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60117 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60118 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60119 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60120 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60121 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60122 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60123 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60124 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60125 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60126 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60127 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60128 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60129 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60130 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60131 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60132 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60133 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60134 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60135 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60136 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60137 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60138 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60139 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60140 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60141 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60142 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60143 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60144 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60145 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60146 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60147 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60148 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60149 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60150 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60151 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60152 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60153 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60154 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60155 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60156 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60157 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60158 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60159 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60160 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60161 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60162 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60163 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60164 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60165 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60166 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60167 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60168 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60169 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60170 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60171 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60172 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60173 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60174 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60175 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60176 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60177 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60178 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60179 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60180 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60181 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60182 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60183 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60184 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60185 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60186 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60187 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60188 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60189 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60190 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60191 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60192 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60193 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60194 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60195 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60196 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60197 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60198 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60199 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60200 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60201 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60202 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60203 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60204 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60205 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60206 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60207 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60208 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60209 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60210 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60211 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60212 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60213 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60214 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60215 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60216 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60217 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60218 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60219 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60220 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60221 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60222 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60223 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60224 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60225 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60226 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60227 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60228 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60229 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60230 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60231 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60232 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60233 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60234 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60235 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60236 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60237 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60238 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60239 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60240 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60241 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60242 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60243 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60244 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60245 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60246 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60247 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60248 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60249 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60250 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60251 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60252 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60253 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60254 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60255 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60256 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60257 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60258 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60259 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60260 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60261 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60262 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60263 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60264 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60265 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60266 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60267 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60268 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60269 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60270 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60271 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60272 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60273 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60274 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60275 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60276 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60277 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60278 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60279 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60280 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60281 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60282 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60283 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60284 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60285 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60286 8:54:14 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60287 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60288 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60289 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60290 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60291 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60292 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60293 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60294 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60295 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60296 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60297 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60298 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60299 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60300 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60301 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60302 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60303 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60304 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60305 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60306 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60307 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60308 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60309 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60310 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60311 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60312 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60313 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60314 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60315 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60316 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60317 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60318 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60319 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60320 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60321 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 60322 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60323 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 60324 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60325 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 03 60326 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60327 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 60328 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60329 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 01 60330 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60331 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 07 60332 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60333 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 60334 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60335 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60336 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60337 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60338 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60339 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60340 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60341 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60342 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60343 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 48 60344 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60345 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 54 60346 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60347 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 59 60348 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60349 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 33 60350 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60351 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 60352 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60353 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 60354 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60355 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 02 60356 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60357 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 60358 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60359 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60360 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60361 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 02 60362 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60363 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 07 60364 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60365 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60366 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60367 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60368 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60369 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60370 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60371 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60372 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60373 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60374 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60375 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 4D 60376 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60377 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 33 60378 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60379 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 47 60380 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60381 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 32 60382 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60383 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 31 60384 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60385 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 34 60386 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60387 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 60388 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60389 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60390 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60391 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60392 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60393 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 04 60394 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60395 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 08 60396 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60397 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60398 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60399 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60400 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60401 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60402 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60403 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60404 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60405 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60406 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60407 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60408 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60409 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60410 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60411 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60412 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60413 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60414 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60415 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60416 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60417 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60418 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60419 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 00 60420 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60421 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 55 60422 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60423 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 60424 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60425 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60426 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60427 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 60428 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60429 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60430 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60431 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 60432 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60433 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60434 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60435 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60436 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60437 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60438 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 53 60439 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60440 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60441 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60442 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60443 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60444 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 3D 60445 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60446 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60447 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60448 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60449 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60450 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 60451 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60452 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60453 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60454 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60455 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60456 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 60457 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60458 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60459 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60460 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60461 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60462 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60463 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60464 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60465 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60466 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60467 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60468 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60469 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60471 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60470 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60472 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60473 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60474 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60476 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60475 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60477 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60478 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60479 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60480 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60481 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60482 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60483 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60484 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60485 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60486 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60487 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60488 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60489 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60490 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60491 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60492 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60493 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60494 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60495 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60496 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60497 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60498 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60499 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60500 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60501 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60502 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60503 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60504 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60505 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60506 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60507 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60508 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60509 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60510 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60511 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60512 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60513 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60514 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60515 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60516 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60517 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60518 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60519 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60520 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60521 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60522 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60523 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60524 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60525 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60526 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60527 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60528 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60529 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60530 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60531 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60532 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60533 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60534 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60535 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60536 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60537 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60538 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60539 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60540 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60541 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60542 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60543 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60544 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60545 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60546 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60547 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60548 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60549 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60550 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60551 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60552 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60553 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60554 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60555 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60556 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60557 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60558 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60559 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60560 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60561 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60562 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60563 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 58 60564 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60565 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 3D 60566 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60567 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: F0 60568 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60569 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 10 60570 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60571 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 60572 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60573 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 60574 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60575 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 60576 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60577 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 60578 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60579 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 60580 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60581 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 20 60582 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60583 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 32 60584 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60585 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 60586 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60587 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 30 60588 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60589 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 35 60590 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60591 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 32 60592 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60593 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 38 60594 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60595 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 60596 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60597 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 60598 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60599 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 60600 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60601 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: FF 60602 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60603 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_PURGE ProlificSerial0 SUCCESS Purge: RXABORT RXCLEAR 60604 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60605 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60606 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60607 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 60608 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60609 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60610 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60611 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60612 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60613 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60614 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60615 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60616 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 60617 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60618 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60619 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60620 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60621 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60622 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 60623 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60624 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60625 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60626 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60627 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60628 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60629 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60630 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60631 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60632 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60633 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60634 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60635 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60636 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60637 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60638 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60639 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60640 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 60641 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60642 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60643 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60644 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60645 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60646 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 25 60647 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60648 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60649 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60650 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60651 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60652 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60653 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60654 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60655 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60656 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60657 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60658 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60659 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60660 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60661 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60662 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60663 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60664 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60665 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60666 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60667 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60668 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60669 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60670 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60671 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60672 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60673 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60674 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60675 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60676 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60677 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60678 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60679 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60680 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60681 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60682 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60683 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60684 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60685 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60686 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60687 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60688 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60689 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60690 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60691 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60692 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60693 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60694 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60695 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60696 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60697 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60698 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60699 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60700 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60701 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60702 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60703 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60704 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60705 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60706 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60707 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60708 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60709 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60710 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60711 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60712 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60713 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60714 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60715 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60716 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60717 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60718 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60719 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60720 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60721 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60722 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60723 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60724 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60725 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60726 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60727 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60728 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60729 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60730 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60731 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60732 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60733 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60734 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60735 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60736 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60737 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60738 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60739 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60740 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60741 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60742 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60743 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60744 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60745 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60746 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60747 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60748 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60749 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60750 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60751 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60752 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60753 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60754 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60755 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60756 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60757 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60758 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60759 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60760 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60761 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60762 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60763 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60764 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60765 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60766 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60767 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60768 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60769 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60770 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 60771 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60772 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60773 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60774 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60775 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60776 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 60777 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60778 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60779 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60780 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60781 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60782 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 60783 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60784 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60785 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60786 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60787 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60788 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 60789 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60790 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60791 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60792 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60793 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60794 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60795 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60796 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60797 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60798 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60799 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60800 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 60801 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60802 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60803 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60804 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60805 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60806 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60807 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60808 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60809 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60810 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60811 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60812 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60813 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60814 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60815 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60816 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60817 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60818 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60819 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60820 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60821 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60822 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60823 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60824 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60825 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60826 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60827 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60828 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60829 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60830 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60831 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60832 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60833 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60834 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60835 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60836 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60837 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60838 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60839 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60840 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60841 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60842 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60843 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60844 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60845 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60846 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60847 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60848 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60849 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60850 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60851 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60852 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60853 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60854 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60855 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60856 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60857 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60858 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60859 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60860 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60861 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60862 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60863 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60864 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60865 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60866 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60867 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60868 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60869 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60870 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60871 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60872 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60873 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60874 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60876 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60875 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60877 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60878 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60879 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60880 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60881 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60882 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60883 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60884 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60885 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60886 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60887 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60888 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60889 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60890 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60891 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60892 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60893 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60894 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60895 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60896 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60897 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60898 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60899 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60900 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60901 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60902 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60903 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60904 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60905 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60906 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60907 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60908 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60909 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60910 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60911 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60912 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60913 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60914 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60915 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60916 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60917 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60918 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60919 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60920 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60921 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60922 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60923 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60924 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 60925 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60926 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60927 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60928 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60929 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60930 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 60931 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60932 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60933 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60934 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60935 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60936 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 60937 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60938 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60939 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60940 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60941 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60942 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60943 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60944 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60946 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60945 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60947 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60948 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 60949 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60950 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60951 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60952 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60953 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60954 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 60955 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60956 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60957 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60958 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60959 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60960 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60961 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60962 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60963 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60964 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60965 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60966 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60967 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60968 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60969 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60970 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60971 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60972 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60973 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60974 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60975 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60976 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60977 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60978 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60979 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60980 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60981 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60982 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60983 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60984 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60985 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60986 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60987 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60988 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60989 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60990 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60991 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60992 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60993 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 60994 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60995 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 60996 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 60997 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 60998 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 60999 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61000 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61001 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61002 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61003 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61004 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61005 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61006 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61007 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61008 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61009 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61010 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61011 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61012 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61013 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61014 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61015 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61016 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61017 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61018 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61019 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61020 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61021 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61022 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61023 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61024 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61025 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61026 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61027 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61028 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61029 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61030 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61031 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61032 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61033 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61034 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61035 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61036 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61037 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61038 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61039 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61040 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61041 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61042 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61043 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61044 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61045 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61046 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61047 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61048 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61049 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61050 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61051 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61052 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61053 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61054 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61055 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61056 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61057 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61058 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61059 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61060 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61061 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61062 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61063 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61064 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61065 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61066 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61067 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61068 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61069 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61070 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61071 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61072 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61073 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61074 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61075 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61076 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61077 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61078 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 61079 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61080 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61081 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61082 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61083 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61084 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 61085 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61086 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61087 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61088 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61089 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61090 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 61091 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61092 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61093 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61094 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61095 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61096 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61097 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61098 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61099 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61100 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61101 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61102 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61103 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61104 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61105 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61106 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61107 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61108 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61109 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61110 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61111 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61112 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61113 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61114 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61115 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61116 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61117 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61118 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61119 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61120 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61121 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61122 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61123 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61124 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61125 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61126 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61127 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61128 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61129 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61130 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61131 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61132 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61133 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61134 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61135 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61136 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61137 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61138 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61139 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61140 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61141 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61142 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61143 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61144 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61145 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61146 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61147 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61148 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61149 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61150 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61151 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61152 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61153 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61154 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61155 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61156 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61157 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61158 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61159 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61160 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61161 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61162 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61163 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61164 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61165 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61166 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61167 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61168 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61169 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61170 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61171 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61172 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61173 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61174 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61175 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61176 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61177 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61178 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61179 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61180 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61181 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61182 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61183 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61184 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61185 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61186 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61187 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61188 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61189 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61190 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61191 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61192 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61193 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61194 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61195 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61196 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61197 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61198 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61199 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61200 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61201 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61202 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61203 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61204 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61205 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61206 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61207 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61208 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61209 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61210 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61211 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61212 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61213 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61214 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61215 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61216 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61217 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61218 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61219 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61220 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61221 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61222 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61223 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61224 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61225 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61226 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61227 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61228 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61229 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61230 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61231 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61232 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 61233 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61234 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61235 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61236 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61237 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61238 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 61239 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61240 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61241 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61242 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61243 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61244 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 61245 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61246 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61247 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61248 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61249 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61250 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61251 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61252 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61253 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61254 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61255 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61256 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 61257 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61258 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61259 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61260 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61261 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61262 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61263 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61264 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61265 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61266 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61267 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61268 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61269 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61270 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61271 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61272 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61273 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61274 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61275 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61276 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61277 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61278 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61279 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61280 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61281 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61282 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61283 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61284 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61285 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61286 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61287 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61288 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61289 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61290 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61291 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61292 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61293 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61294 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61295 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61296 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61297 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61298 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61299 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61300 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61302 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61301 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61303 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61304 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61305 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61306 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61307 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61308 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61309 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61310 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61311 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61312 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61313 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61314 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61315 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61316 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61317 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61318 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61319 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61320 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61321 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61322 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61323 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61324 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61325 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61326 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61327 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61328 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61329 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61330 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61331 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61332 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61333 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61334 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61335 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61336 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61337 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61338 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61339 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61340 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61341 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61342 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61343 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61344 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61345 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61346 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61347 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61348 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61349 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61350 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61351 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61352 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61353 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61354 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61355 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61356 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61357 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61358 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61359 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61360 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61361 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61362 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61363 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61364 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61365 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61366 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61367 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61368 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61369 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61370 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61371 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61372 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61373 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61374 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61375 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61376 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61377 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61378 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61379 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61380 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61381 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61382 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61383 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61384 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61385 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61386 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 61387 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61388 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61389 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61390 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61391 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61392 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 61393 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61394 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61395 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61396 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61397 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61398 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 61399 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61400 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61401 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61402 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61403 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61404 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61405 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61406 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61407 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61408 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61409 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61410 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 61411 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61412 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61413 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61414 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61415 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61416 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61417 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61418 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61419 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61420 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61421 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61422 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61423 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61424 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61425 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61426 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61427 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61428 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61429 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61430 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61431 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61432 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61433 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61434 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61435 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61436 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61438 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61437 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61439 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61440 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61441 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61442 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61443 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61444 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61445 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61446 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61447 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61448 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61449 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61450 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61451 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61452 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61453 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61454 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61455 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61456 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61457 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61458 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61459 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61460 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61461 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61462 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61463 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61464 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61465 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61466 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61467 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61468 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61469 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61470 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61471 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61472 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61473 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61474 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61475 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61476 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61477 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61478 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61479 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61480 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61481 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61482 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61483 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61484 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61485 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61486 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61487 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61488 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61489 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61490 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61491 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61492 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61493 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61494 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61495 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61496 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61497 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61498 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61499 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61500 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61501 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61502 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61503 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61504 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61505 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61506 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61507 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61508 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61509 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61510 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61511 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61512 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61513 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61514 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61515 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61516 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61517 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61518 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61519 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61520 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61521 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61522 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61523 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61524 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61525 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61526 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61527 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61528 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61529 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61530 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61531 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61532 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61533 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61534 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61535 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61536 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61537 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61538 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61539 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61540 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 61541 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61542 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61543 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61544 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61545 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61546 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 61547 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61549 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61548 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61550 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61551 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61552 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 61553 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61554 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61555 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61556 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61557 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61558 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61559 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61560 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61561 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61562 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61563 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61564 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 61565 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61566 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61567 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61568 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61569 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61570 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61571 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61572 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61573 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61574 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61575 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61576 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61577 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61578 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61579 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61580 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61581 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61582 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61583 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61584 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61585 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61586 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61587 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61588 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61589 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61590 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61591 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61592 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61593 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61594 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61595 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61596 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61597 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61598 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61599 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61600 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61601 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61602 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61603 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61604 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61605 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61606 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61607 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61608 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61609 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61610 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61611 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61612 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61613 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61614 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61615 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61616 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61617 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61618 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61619 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61620 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61621 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61622 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61623 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61624 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61625 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61626 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61627 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61628 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61629 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61630 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61631 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61632 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61633 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61634 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61635 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61636 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61637 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61638 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61639 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61640 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61641 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61642 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61643 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61644 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61645 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61646 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61647 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61648 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61649 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61650 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61651 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61652 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61653 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61654 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61655 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61656 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61657 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61658 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61659 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61660 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61661 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61662 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61663 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61664 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61665 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61666 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61667 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61668 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61669 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61670 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61671 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61672 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61673 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61674 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61675 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61676 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61677 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61678 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61679 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61680 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61681 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61682 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61683 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61684 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61685 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61686 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61687 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61688 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61689 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61690 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61691 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61692 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61693 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61694 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 61695 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61696 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61697 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61698 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61699 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61700 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 61701 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61702 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61703 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61704 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 61705 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61706 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61707 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61708 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61709 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61710 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61711 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61712 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61713 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61714 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61715 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61716 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61717 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61718 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 61719 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61720 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61721 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61722 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61723 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61724 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61725 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61726 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61727 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61728 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61729 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61730 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61731 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61732 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61733 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61734 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61735 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61736 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61737 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61738 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61739 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61740 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61741 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61742 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61743 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61744 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61745 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61746 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61747 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61748 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61749 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61750 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61751 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61752 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61753 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61754 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61755 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61756 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61757 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61758 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61759 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61760 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61761 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61762 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61763 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61764 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61765 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61766 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61767 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61768 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61769 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61770 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61771 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61772 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61773 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61774 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61775 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61776 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61777 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61778 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61779 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61781 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61780 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61782 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61783 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61784 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61785 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61786 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61787 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61788 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61789 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61790 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61791 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61792 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61793 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61794 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61795 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61796 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61797 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61798 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61800 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61799 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61801 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61802 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61803 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61804 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61805 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61806 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61807 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61808 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61809 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61810 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61811 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61812 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61813 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61814 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61815 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61816 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61817 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61818 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61819 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61820 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61821 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61822 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61823 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61824 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61825 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61826 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61827 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61828 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61829 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61830 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61831 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61832 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61833 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61834 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61835 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61836 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61837 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61838 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61839 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61840 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61841 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61842 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61843 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61844 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61845 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61846 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61847 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61848 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 61849 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61850 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61851 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61852 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61853 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61854 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 61855 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61856 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61857 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61858 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 61859 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61860 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61861 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61862 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61863 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61864 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61865 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61866 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61867 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61868 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61869 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61870 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61871 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61872 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 61873 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61874 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61875 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61876 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61877 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61878 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 61879 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61880 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61881 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61882 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61883 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61884 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61885 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61886 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61887 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61888 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61889 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61890 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 25 61891 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61892 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61893 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61894 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61895 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61896 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 46 61897 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61898 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61899 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61900 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61901 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61902 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 14 61903 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61904 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61905 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61906 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61907 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61908 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61909 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61910 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61911 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61912 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61913 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61914 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 25 61915 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61916 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61917 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61918 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61919 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61920 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 46 61921 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61922 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61923 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61924 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61925 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61926 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 14 61927 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61928 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61929 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61930 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61931 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61932 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61933 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61934 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61935 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61936 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61937 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61938 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61939 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61940 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61941 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61942 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61943 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61944 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61945 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61946 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61947 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61948 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61949 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61950 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61951 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61952 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61953 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61954 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61955 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61956 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61957 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61958 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61959 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61960 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61961 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61962 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61963 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61964 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61965 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61966 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61967 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61968 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 61969 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61970 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61971 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61972 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61973 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 61974 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 04 61975 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61976 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 61977 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 61978 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61979 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61980 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61981 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61982 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61983 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61984 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61985 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61986 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61987 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61988 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61989 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61990 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61991 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61992 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61993 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61994 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61995 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61996 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61997 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61998 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 61999 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62000 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62001 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62002 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 62003 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62004 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62005 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62006 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62007 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62008 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 62009 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62010 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62011 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62012 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62013 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62014 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 62015 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62016 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62017 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62018 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62019 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62020 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62021 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62022 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62023 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62024 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62025 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62026 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 62027 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62028 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62029 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62030 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62031 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62032 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62033 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62034 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62035 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62036 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62037 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62038 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62039 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62040 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62041 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62042 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62043 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62044 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62045 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62046 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62047 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62048 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62049 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62050 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62051 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62052 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62053 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62054 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62055 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62056 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62057 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62058 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62059 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62060 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62061 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62062 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62063 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62064 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62065 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62066 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62067 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62068 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62069 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62070 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62071 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62072 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62073 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62074 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 46 62075 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62076 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62077 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62078 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62079 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62080 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 14 62081 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62082 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62083 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62084 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62085 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62086 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62087 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62088 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62089 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62090 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62091 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62092 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62093 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62094 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62095 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62096 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62097 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62098 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62099 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62100 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62101 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62102 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62103 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62104 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62105 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62106 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62107 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62108 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62109 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62110 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62111 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62112 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62113 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62114 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62115 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62116 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62117 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62118 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62119 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62120 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62121 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62122 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62123 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62124 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62125 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62126 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62127 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62128 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 04 62129 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62130 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62131 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62132 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62133 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62134 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62135 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62136 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62137 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62138 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62139 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62140 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62141 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62142 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62143 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62144 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62145 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62146 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62147 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62148 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62149 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62150 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62151 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62152 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62153 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62154 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62155 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62156 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 62157 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62158 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62159 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62160 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62161 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62162 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 62163 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62164 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62165 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62166 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62167 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62168 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 62169 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62170 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62171 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62172 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62173 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62174 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62175 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62176 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62177 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62178 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62179 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62180 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 50 62181 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62182 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62183 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62184 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62185 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62186 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62187 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62188 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62189 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62190 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62191 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62192 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62193 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62194 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62195 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62196 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62197 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62198 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62199 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62200 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62201 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62202 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62203 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62204 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62205 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62206 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62207 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62208 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62209 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62210 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62211 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62212 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62213 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62214 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62215 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62216 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62217 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62218 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62219 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62220 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62221 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62222 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62223 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62224 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62225 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62226 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62227 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62228 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62229 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62230 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62231 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62232 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62233 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62234 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62235 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62236 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62237 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62238 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62239 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62240 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62241 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62242 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62243 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62244 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62245 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62246 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62247 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62248 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62249 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62250 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62251 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62252 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62253 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62254 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62255 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62256 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62257 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62258 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62259 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62260 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62261 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62262 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62263 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62264 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62265 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62266 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62267 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62268 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62269 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62270 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62271 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62272 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62273 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62274 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62275 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62276 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62277 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62278 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62279 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62280 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62281 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62282 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62283 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62284 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62285 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62286 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62287 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62288 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62289 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62290 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62291 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62292 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62293 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62294 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62295 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62296 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62297 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62298 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62299 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62300 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62301 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62302 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62303 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62304 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62305 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62306 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62307 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62308 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62309 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62310 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 62311 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62312 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62313 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62314 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62315 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62316 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 62317 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62318 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62319 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62320 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62321 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62322 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 62323 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62324 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62325 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62326 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62327 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62328 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62329 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62330 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62331 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62332 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62333 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62334 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 50 62335 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62336 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62337 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62338 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62339 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62340 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62341 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62342 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62343 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62344 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62345 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62346 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62347 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62348 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62349 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62350 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62351 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62352 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62353 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62354 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62355 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62356 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62357 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62358 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62359 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62360 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62361 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62362 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62363 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62364 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62365 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62366 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62367 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62368 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62369 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62370 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62371 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62372 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62374 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62373 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62375 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62376 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62377 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62378 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62379 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62380 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62381 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62382 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62383 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62384 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62385 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62386 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62387 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62388 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62389 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62390 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62391 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62392 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62393 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62394 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62395 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62396 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62397 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62398 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62399 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62400 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62401 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62402 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62403 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62404 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62405 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62406 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62407 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62408 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62409 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62410 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62411 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62412 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62413 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62414 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62415 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62416 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62417 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62418 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62419 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62420 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62421 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62422 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62423 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62424 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62425 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62426 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62428 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62427 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62429 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62430 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62431 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62432 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62434 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62433 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62435 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62436 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62437 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62438 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62439 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62440 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62441 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62442 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62443 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62444 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62445 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62446 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62447 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62448 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62449 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62450 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62451 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62452 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62453 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62454 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62455 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62456 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62457 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62458 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62459 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62460 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62461 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62462 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62463 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62464 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 62465 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62466 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62467 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62468 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62469 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62470 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 62471 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62472 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62473 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62474 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62475 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62476 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 62477 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62478 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62479 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62480 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62481 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62482 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62483 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62484 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62485 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62486 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62487 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62488 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 62489 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62490 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62491 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62492 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62493 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62494 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62495 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62496 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62497 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62498 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62499 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62500 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62501 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62502 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62503 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62504 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62505 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62506 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62507 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62508 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62509 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62510 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62511 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62512 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62513 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62514 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62515 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62516 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62517 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62518 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62519 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62520 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62521 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62522 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62523 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62524 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62525 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62526 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62527 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62528 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62529 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62530 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62531 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62532 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62533 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62534 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62535 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62536 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62537 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62538 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62539 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62540 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62541 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62542 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62543 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62544 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62545 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62546 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62547 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62548 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62549 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62550 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62551 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62552 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62553 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62554 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62555 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62556 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62557 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62558 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62559 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62560 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62561 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62562 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62563 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62564 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62565 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62566 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62567 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62568 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62569 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62570 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62571 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62572 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62573 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62574 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62575 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62576 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62577 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62578 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62579 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62580 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62581 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62582 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62583 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62584 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62585 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62586 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62587 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62588 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62589 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62590 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62591 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62592 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62593 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62594 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62595 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62596 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62597 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62598 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62599 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62600 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62601 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62602 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62603 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62604 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62605 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62606 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62607 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62608 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62609 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62610 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62611 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62612 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62613 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62614 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62615 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62616 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62617 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62618 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 62619 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62620 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62621 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62622 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62623 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62624 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 62625 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62626 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62627 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62628 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62629 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62630 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 62631 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62632 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62633 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62634 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62635 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62636 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62637 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62638 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62639 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62640 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62641 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 62642 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62643 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62644 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62645 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62646 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62647 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62648 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62649 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62650 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62651 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62652 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62653 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62654 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62655 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62656 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62657 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62658 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62659 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62660 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62661 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62662 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62663 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62664 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62665 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62666 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62667 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62668 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62669 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62670 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62671 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62672 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62673 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62674 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62675 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62676 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62677 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62678 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62679 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62680 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62681 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62682 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62683 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62684 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62685 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62686 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62687 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62688 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62689 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62690 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62691 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62692 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62693 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62694 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62695 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62696 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62697 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62698 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62699 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62700 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62701 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62702 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62703 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62704 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62705 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62706 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62707 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62708 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62709 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62710 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62711 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62712 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62713 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62714 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62715 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62716 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62717 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62718 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62719 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62720 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62721 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62722 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62723 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62724 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62725 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62726 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62727 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62728 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62729 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62730 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62731 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62732 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62733 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62734 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62735 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62736 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62737 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62738 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62739 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62740 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62741 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62742 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62743 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62744 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62745 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62746 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62747 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62748 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62749 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62750 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62751 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62752 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62753 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62754 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62755 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62756 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62757 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62758 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62759 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62760 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62761 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62762 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62763 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62764 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62765 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62766 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62767 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62768 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62769 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62771 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62770 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62772 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 62773 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62774 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62775 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62776 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62777 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62778 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 62779 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62780 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62781 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62782 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62783 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62784 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 62785 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62786 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62787 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62788 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62789 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62790 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 62791 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62792 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62793 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62794 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62795 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62796 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 70 62797 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62798 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62799 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62800 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62801 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62802 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62803 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62804 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62805 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62806 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62807 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62808 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62809 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62810 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62811 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62812 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62813 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62814 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62815 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62816 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62817 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62818 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62819 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62820 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62821 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62822 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62823 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62824 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62825 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62826 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62827 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62828 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62829 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62830 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62831 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62832 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62833 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62834 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62835 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62836 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62837 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62838 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62839 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62840 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62841 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62842 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62843 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62844 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62845 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62846 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62847 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62848 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62849 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62850 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62851 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62852 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62853 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62854 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62855 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62856 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62857 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62858 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62859 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62860 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62861 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62862 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62863 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62864 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62865 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62866 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62867 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62868 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62869 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62870 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62871 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62872 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62873 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62874 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62875 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62876 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62877 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62878 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62879 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62880 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62881 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62882 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62883 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62884 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62885 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62886 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62887 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62888 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62889 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62890 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62891 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62892 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62893 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62894 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62895 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62896 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62897 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62898 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62899 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62900 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62901 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62902 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62903 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62904 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62905 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62906 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62907 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62908 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62909 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62910 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62911 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62912 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62913 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62914 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62915 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62916 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62917 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62918 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62919 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62920 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62921 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62922 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62923 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62924 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62925 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62926 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 62927 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62928 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62929 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62930 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62931 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62932 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 62933 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62934 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62935 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62936 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62937 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62938 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 62939 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62940 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62941 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62942 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62943 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62944 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62945 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62946 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62947 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62948 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62949 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62950 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 70 62951 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62952 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62953 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62954 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62955 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62956 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 62957 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62958 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62959 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62960 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62961 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62962 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62963 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62964 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62965 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62966 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62967 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62968 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62969 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62970 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62971 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62972 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62973 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62974 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62975 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62976 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62977 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62978 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62979 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62980 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62981 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62982 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62983 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62984 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62985 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62986 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62987 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62988 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62989 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62990 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62991 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62992 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62993 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62994 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 62995 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 62996 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 62997 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 62998 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 62999 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63000 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63001 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63002 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63003 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63004 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63005 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63006 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63007 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63008 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63009 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63010 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63011 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63012 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63013 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63014 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63015 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63016 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63017 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63018 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63019 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63020 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63021 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63022 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63023 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63024 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63025 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63026 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63027 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63028 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63029 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63030 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63031 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63032 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63033 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63034 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63035 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63036 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63037 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63038 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63039 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63040 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63041 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63042 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63043 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63044 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63045 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63046 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63047 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63048 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63049 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63050 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63051 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63052 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63053 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63054 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63055 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63056 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63057 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63058 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63059 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63060 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63061 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63062 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63063 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63064 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63065 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63066 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63067 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63068 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63069 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63070 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63071 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63072 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63073 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63074 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63075 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63076 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63077 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63078 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63079 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63080 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 63081 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63082 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63083 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63084 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63085 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63086 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 63087 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63088 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63089 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63090 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63091 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63092 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 63093 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63094 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63095 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63096 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63097 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63098 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 63099 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63100 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63101 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63102 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63103 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63104 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 63105 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63106 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63107 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63108 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63109 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63110 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63111 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63112 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63113 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63114 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63115 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63116 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63117 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63118 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63119 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63120 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63121 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63122 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63123 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63124 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63125 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63126 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63127 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63128 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63129 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63130 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63131 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63132 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63133 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63134 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63135 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63136 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63137 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63138 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63139 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63140 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63141 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63142 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63143 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63144 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63145 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63146 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63147 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63148 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63149 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63150 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63151 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63152 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63153 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63154 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63155 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63156 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63157 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63158 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63159 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63160 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63161 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63162 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63163 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63164 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63165 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63166 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63167 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63168 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63169 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63170 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63171 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63172 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63173 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63174 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63175 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63176 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63177 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63178 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63179 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63180 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63181 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63182 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63183 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63184 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63185 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63186 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63187 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63188 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63189 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63190 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63191 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63192 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63193 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63194 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63195 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63196 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63197 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63198 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63199 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63200 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63201 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63202 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63203 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63204 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63205 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63206 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63207 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63208 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63209 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63210 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63211 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63212 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63213 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63214 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63215 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63216 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63217 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63218 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63219 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63220 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63221 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63222 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63223 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63224 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63225 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63226 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63227 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63228 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63229 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63230 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63231 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63232 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63233 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63234 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 63235 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63236 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63237 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63238 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63239 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63240 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 63241 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63242 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63243 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63244 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 63245 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63246 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63247 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63248 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63249 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63250 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63251 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63252 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63253 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63254 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63255 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63256 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63257 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63258 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 63259 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63260 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63261 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63262 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63263 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63264 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63265 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63266 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63267 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63268 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63269 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63270 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63271 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63272 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63273 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63274 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63275 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63276 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63277 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63278 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63280 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63279 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63281 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63282 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63283 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63284 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63285 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63286 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63287 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63288 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63289 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63290 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63291 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63292 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63293 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63294 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63295 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63296 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63297 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63298 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63299 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63300 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63301 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63302 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63303 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63304 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63305 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63306 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63307 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63308 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63309 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63310 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63311 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63312 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63313 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63314 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63315 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63316 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63317 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63318 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63319 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63320 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63321 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63322 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63323 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63324 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63325 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63326 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63327 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63328 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63329 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63330 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63331 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63332 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63333 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63334 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63335 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63336 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63337 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63338 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63339 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63340 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63341 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63342 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63343 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63344 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63346 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63345 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63347 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63348 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63349 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63350 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63351 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63352 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63353 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63354 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63355 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63356 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63357 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63358 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63359 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63360 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63361 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63362 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63363 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63364 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63365 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63366 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63367 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63368 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63369 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63370 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63371 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63372 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63373 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63374 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63375 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63376 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63377 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63378 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63379 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63380 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63381 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63382 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63383 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63384 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63385 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63386 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63387 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63388 8:54:15 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 63389 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63390 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63391 8:54:15 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63392 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63393 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63394 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 63395 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63396 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63397 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63398 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 63399 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63400 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63401 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63402 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63403 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63404 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63405 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63406 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 63407 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63408 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63409 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63410 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63411 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63412 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 90 63413 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63414 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63415 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63416 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63417 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63418 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63419 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63420 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63421 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63422 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63423 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63424 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63425 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63426 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63427 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63428 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63429 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63430 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63431 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63432 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63433 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63434 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63435 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63436 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63437 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63438 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63439 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63440 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63441 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63442 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63443 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63444 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63445 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63446 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63447 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63448 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63449 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63450 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63451 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63452 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63453 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63454 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63455 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63456 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63457 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63458 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63459 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63460 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63461 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63462 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63463 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63464 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63465 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63466 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63467 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63468 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63469 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63470 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63471 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63472 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63473 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63474 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63475 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63476 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63477 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63478 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63479 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63480 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63481 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63482 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63483 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63484 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63485 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63486 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63487 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63488 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63489 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63490 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63491 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63492 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63493 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63494 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63495 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63496 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63497 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63498 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63499 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63500 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63501 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63502 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63503 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63504 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63505 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63506 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63507 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63508 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63509 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63510 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63511 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63512 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63513 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63514 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63515 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63516 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63517 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63518 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63519 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63520 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63521 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63522 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63523 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63524 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63525 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63526 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63527 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63528 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63529 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63530 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63531 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63532 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63533 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63534 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63535 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63536 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63537 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63538 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63539 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63540 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63541 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63542 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 63543 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63544 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63545 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63546 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63547 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63548 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 63549 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63550 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63551 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63552 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63553 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63554 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 63555 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63556 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63557 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63558 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63559 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63560 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63561 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63562 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63563 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63564 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63565 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63566 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 90 63567 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63568 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63569 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63570 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63571 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63572 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63573 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63574 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63575 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63576 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63577 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63578 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63579 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63580 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63581 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63582 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63583 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63584 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63585 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63586 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63587 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63588 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63589 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63590 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63591 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63592 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63593 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63594 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63595 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63596 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63597 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63598 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63599 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63600 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63601 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63602 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63603 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63604 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63605 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63606 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63607 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63608 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63609 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63610 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63611 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63612 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63613 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63614 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63615 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63616 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63617 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63618 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63619 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63620 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63621 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63622 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63623 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63624 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63625 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63626 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63627 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63628 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63629 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63630 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63631 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63632 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63633 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63634 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63635 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63636 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63637 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63638 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63639 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63640 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63641 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63642 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63643 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63644 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63645 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63646 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63647 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63648 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63649 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63650 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63651 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63652 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63653 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63654 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63655 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63656 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63657 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63658 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63659 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63660 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63661 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63662 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63663 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63664 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63665 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63666 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63667 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63668 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63669 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63670 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63671 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63672 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63673 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63674 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63675 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63676 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63677 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63678 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63679 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63680 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63681 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63682 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63683 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63684 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63685 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63686 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63687 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63688 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63689 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63690 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63691 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63692 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63693 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63694 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63695 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63696 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 63697 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63698 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63699 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63700 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63701 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63702 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 63703 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63704 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63705 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63706 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63707 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63708 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 63709 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63710 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63711 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63712 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63713 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63714 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 63715 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63716 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63718 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63717 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63719 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63720 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: A0 63721 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63722 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63723 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63724 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63725 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63726 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63727 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63728 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63729 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63730 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63731 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63732 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63733 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63734 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63735 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63736 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63737 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63738 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63739 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63740 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63741 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63742 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63743 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63744 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63745 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63746 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63747 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63748 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63749 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63750 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63751 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63752 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63753 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63754 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63755 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63756 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63757 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63758 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63759 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63760 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63761 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63762 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63763 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63764 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63765 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63766 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63767 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63768 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63769 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63770 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63771 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63772 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63773 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63774 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63775 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63776 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63777 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63778 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63779 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63780 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63781 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63782 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63783 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63784 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63785 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63786 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63787 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63788 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63789 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63790 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63791 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63792 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63793 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63794 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63795 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63796 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63797 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63798 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63799 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63800 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63801 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63802 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63803 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63804 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63805 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63806 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63807 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63808 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63809 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63810 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63811 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63812 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63813 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63814 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63815 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63816 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63817 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63818 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63819 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63820 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63821 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63822 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63823 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63824 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63825 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63826 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63827 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63828 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63829 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63830 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63831 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63832 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63833 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63834 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63835 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63836 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63837 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63838 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63839 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63840 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63841 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63842 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63843 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63844 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63845 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63846 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63847 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63849 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63848 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63850 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 63851 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63852 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63853 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63854 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63855 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63856 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 63857 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63858 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63859 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63860 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63861 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63862 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 63863 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63864 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63865 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63866 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63867 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63868 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63869 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63870 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63871 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63872 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63873 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63874 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: A0 63875 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63876 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63877 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63878 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63879 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63880 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 63881 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63882 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63883 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63884 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63885 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63886 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63887 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63888 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63889 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63890 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63891 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63892 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63893 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63894 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63895 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63896 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63897 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63898 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63899 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63900 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63901 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63902 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63903 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63904 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63905 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63906 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63907 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63908 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63909 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63910 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63911 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63912 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63913 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63914 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63915 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63916 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63917 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63918 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63919 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63920 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63921 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63922 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63923 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63924 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63925 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63926 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63927 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63928 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63929 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63930 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63931 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63932 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63933 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63934 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63935 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63936 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63937 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63938 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63939 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63940 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63941 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63942 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63943 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63944 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63945 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63946 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63947 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63948 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63949 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63950 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63951 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63952 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63953 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63954 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63955 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63956 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63957 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63958 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63959 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63960 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63961 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63962 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63963 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63964 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63965 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63966 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63967 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63968 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63969 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63970 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63971 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63972 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63973 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63974 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63975 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 63976 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 63977 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63978 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 63979 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 63980 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63981 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63982 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63983 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63984 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63985 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63986 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63987 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63988 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63989 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63990 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63991 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63992 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63993 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63994 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63995 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63996 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63997 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63998 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 63999 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64000 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64001 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64002 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64003 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64004 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 64005 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64006 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64007 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64008 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64009 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64010 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 64011 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64012 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64013 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64014 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64015 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64016 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 64017 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64018 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64019 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64020 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64021 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64022 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 64023 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64024 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64025 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64026 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64027 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64028 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: B0 64029 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64030 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64031 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64032 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64033 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64034 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64035 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64036 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64037 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64038 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64039 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64040 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64041 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64042 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64043 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64044 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64045 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64046 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64047 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64048 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64049 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64050 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64051 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64052 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64053 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64054 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64055 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64056 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64057 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64058 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64059 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64060 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64061 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64062 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64063 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64064 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64065 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64066 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64067 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64068 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64069 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64070 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64071 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64072 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64073 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64074 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64075 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64076 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64077 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64078 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64079 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64080 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64081 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64082 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64083 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64084 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64085 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64086 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64087 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64088 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64089 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64090 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64091 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64092 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64093 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64094 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64095 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64096 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64097 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64098 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64099 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64100 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64101 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64102 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64103 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64104 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64105 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64106 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64107 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64108 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64109 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64110 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64111 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64112 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64113 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64114 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64115 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64116 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64117 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64118 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64119 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64120 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64121 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64122 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64123 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64124 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64125 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64126 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64127 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64128 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64129 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64130 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64131 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64132 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64133 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64134 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64135 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64136 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64137 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64138 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64139 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64140 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64141 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64142 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64143 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64144 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64145 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64146 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64147 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64148 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64149 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64150 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64151 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64152 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64153 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64154 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64155 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64156 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64157 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64158 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 64159 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64160 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64161 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64162 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64163 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64164 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 64165 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64166 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64167 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64168 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 64169 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64170 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64171 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64172 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64173 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64174 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64175 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64176 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64178 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64179 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64177 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64180 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64181 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64182 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: B0 64183 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64184 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64185 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64186 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64187 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64188 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64189 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64190 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64191 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64192 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64193 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64194 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64195 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64196 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64197 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64198 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64199 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64200 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64201 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64202 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64203 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64204 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64205 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64206 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64207 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64208 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64209 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64210 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64211 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64212 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64213 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64214 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64215 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64216 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64217 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64218 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64219 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64220 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64222 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64221 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64223 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64224 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64225 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64226 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64227 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64228 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64229 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64230 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64231 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64232 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64233 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64234 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64235 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64236 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64237 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64238 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64239 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64240 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64241 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64242 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64243 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64244 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64245 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64246 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64247 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64248 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64249 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64250 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64251 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64252 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64253 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64254 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64255 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64256 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64257 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64258 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64259 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64260 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64261 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64262 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64263 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64264 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64265 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64266 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64267 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64268 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64269 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64270 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64271 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64272 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64273 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64274 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64275 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64276 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64277 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64278 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64279 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64280 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64281 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64282 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64283 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64284 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64285 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64286 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64287 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64288 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64289 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64290 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64291 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64292 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64293 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64294 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64295 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64296 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64297 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64298 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64299 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64300 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64301 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64302 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64303 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64304 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64305 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64306 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64307 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64308 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64309 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64310 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64311 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64312 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 64313 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64314 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64315 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64316 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64317 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64318 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 64319 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64320 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64321 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64322 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 64323 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64324 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64325 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64326 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64328 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64327 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64329 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 64330 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64331 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64332 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64333 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64334 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64335 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64336 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 64337 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64338 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64339 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64340 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64341 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64342 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64343 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64344 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64345 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64346 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64347 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64348 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64349 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64350 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64351 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64352 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64353 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64354 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64355 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64356 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64357 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64358 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64359 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64360 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64361 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64362 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64363 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64364 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64365 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64366 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64367 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64368 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64369 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64370 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64371 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64372 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64373 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64374 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64375 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64376 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64377 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64378 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64379 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64380 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64381 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64382 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64383 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64384 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64385 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64386 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64388 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64387 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64389 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64390 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64391 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64392 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64393 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64394 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64395 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64396 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64397 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64398 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64399 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64400 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64401 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64402 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64403 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64404 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64405 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64406 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64407 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64408 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64409 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64411 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64410 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64412 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64413 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64414 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64415 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64416 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64418 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64417 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64419 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64420 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64421 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64422 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64423 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64424 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64425 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64426 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64427 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64428 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64429 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64430 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64431 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64432 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64433 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64434 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64435 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64436 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64437 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64438 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64439 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64440 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64441 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64442 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64443 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64444 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64445 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64446 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64447 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64448 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64449 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64450 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64451 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64452 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64453 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64454 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64455 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64456 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64457 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64458 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64459 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64460 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64461 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64462 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64463 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64464 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64465 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64466 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 64467 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64468 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64469 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64470 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64471 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64472 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 64473 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64474 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64475 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64476 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 64477 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64478 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64479 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64480 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64481 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64482 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64483 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64484 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64485 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64486 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64487 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64488 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64489 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64490 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 64491 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64492 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64493 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64494 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64495 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64496 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64497 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64498 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64499 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64500 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64501 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64502 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64503 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64504 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64505 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64506 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64507 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64508 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64509 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64510 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64511 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64512 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64513 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64514 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64515 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64516 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64517 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64518 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64519 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64520 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64521 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64522 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64523 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64524 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64525 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64526 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64527 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64528 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64529 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64530 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64531 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64532 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64533 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64534 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64535 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64536 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64537 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64538 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64539 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64540 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64541 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64542 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64543 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64544 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64545 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64546 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64547 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64548 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64549 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64550 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64551 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64552 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64553 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64554 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64555 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64556 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64557 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64558 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64559 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64560 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64561 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64562 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64563 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64564 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64565 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64566 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64567 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64568 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64569 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64570 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64571 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64572 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64573 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64574 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64575 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64576 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64577 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64578 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64579 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64580 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64581 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64582 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64583 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64584 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64585 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64586 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64587 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64588 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64589 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64590 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64591 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64592 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64593 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64594 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64595 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64596 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64597 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64598 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64599 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64600 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64601 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64602 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64603 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64604 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64605 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64606 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64607 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64608 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64609 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64610 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64611 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64612 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64613 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64614 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64615 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64616 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64617 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 64618 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64619 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64620 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64621 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64622 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64623 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 64624 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64625 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64626 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64627 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 64628 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64629 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64630 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64631 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64632 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64633 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64634 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64635 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 64636 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64637 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64638 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64639 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64640 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64641 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: D0 64642 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64643 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64644 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64645 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64646 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64647 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64648 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64649 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64650 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64651 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64652 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64653 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64654 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64655 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64656 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64657 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64658 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64659 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64660 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64661 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64662 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64663 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64664 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64665 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64666 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64667 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64668 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64669 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64670 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64671 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64672 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64673 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64674 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64675 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64676 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64677 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64678 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64679 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64680 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64681 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64682 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64683 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64685 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64684 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64686 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64687 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64688 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64689 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64690 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64691 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64692 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64693 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64694 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64695 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64696 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64697 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64698 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64699 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64700 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64701 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64702 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64703 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64704 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64705 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64706 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64707 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64708 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64709 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64710 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64711 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64712 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64713 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64714 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64715 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64716 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64717 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64718 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64719 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64720 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64721 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64722 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64723 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64724 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64725 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64726 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64727 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64728 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64729 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64730 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64731 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64732 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64733 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64734 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64735 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64736 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64737 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64738 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64739 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64740 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64741 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64742 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64743 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64744 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64745 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64746 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64747 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64748 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64749 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64750 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64751 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64752 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64753 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64754 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64755 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64756 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64757 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64758 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64759 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64760 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64761 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64762 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64763 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64764 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64765 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64766 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64767 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64768 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64769 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64770 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64771 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 64772 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64773 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64774 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64775 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64776 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64777 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 64778 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64779 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64780 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64781 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64782 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64783 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 64784 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64785 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64786 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64787 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64788 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64789 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64790 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64791 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64792 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64793 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64794 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64795 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: D0 64796 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64797 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64798 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64799 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64800 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64801 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64802 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64803 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64804 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64805 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64806 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64807 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64808 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64809 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64810 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64811 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64812 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64813 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64814 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64815 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64816 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64817 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64818 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64819 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64820 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64821 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64822 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64823 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64824 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64825 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64826 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64827 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64828 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64829 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64830 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64831 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64832 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64833 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64834 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64835 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64836 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64837 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64838 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64839 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64840 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64841 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64842 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64843 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64844 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64845 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64846 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64847 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64848 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64849 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64850 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64851 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64852 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64853 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64854 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64855 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64856 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64857 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64858 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64859 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64860 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64861 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64862 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64863 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64864 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64865 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64866 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64867 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64868 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64869 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64870 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64871 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64872 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64873 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64874 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64875 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64876 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64877 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64878 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64879 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64880 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64881 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64882 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64883 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64884 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64885 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64886 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64887 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64888 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64889 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64890 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64891 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64892 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64893 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64894 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64895 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64896 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64897 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64898 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64899 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64900 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64901 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64902 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64903 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64904 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64905 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64906 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64907 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64908 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64909 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64910 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64911 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64912 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64913 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64914 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64915 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64916 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64917 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64918 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64919 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64920 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64921 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64922 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64923 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64924 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64925 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 64926 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64927 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64928 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64929 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64930 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64931 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 64932 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64933 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64934 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64935 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64936 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64937 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 64938 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64939 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64940 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64941 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64942 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64943 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 64944 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64945 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64946 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64947 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64948 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64949 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: E0 64950 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64951 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64952 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64953 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64954 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64955 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 64956 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64957 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64958 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64959 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64960 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64961 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64962 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64963 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64964 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64965 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64966 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64967 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64968 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64969 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64970 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64971 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64972 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64973 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64974 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64975 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64976 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64977 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64978 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64979 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64980 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64981 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64982 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64983 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64984 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64985 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64986 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64987 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64988 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64989 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64990 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64991 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64992 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64993 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 64994 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 64995 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64996 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 64997 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 64998 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 64999 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65000 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65001 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65002 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65003 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65004 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65005 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65006 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65007 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65008 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65009 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65010 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65011 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65012 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65013 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65014 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65015 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65016 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65017 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65019 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65018 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65020 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65021 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65022 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65023 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65024 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65025 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65026 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65027 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65028 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65029 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65030 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65031 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65032 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65033 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65034 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65035 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65036 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65037 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65038 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65039 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65040 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65041 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65042 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65043 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65044 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65045 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65046 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65047 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65048 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65049 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65050 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65051 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65052 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65053 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65054 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65055 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65056 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65057 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65058 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65059 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65060 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65061 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65062 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65063 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65064 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65065 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65066 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65067 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65068 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65069 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65070 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65071 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65072 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65073 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65074 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65075 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65076 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65077 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65078 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65079 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 65080 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65081 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65082 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65083 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65084 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65085 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 65086 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65087 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65088 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65089 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65090 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65091 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 65092 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65093 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65094 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65095 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65096 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65097 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65098 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65099 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65100 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65101 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65102 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65103 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: E0 65104 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65105 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65106 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65107 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65108 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65109 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65110 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65111 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65112 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65113 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65114 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65115 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65116 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65117 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65118 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65119 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65120 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65121 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65122 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65123 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65124 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65125 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65126 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65127 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65128 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65129 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65130 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65131 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65132 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65133 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65134 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65135 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65136 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65137 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65138 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65139 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65140 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65141 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65142 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65143 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65144 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65145 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65146 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65147 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65148 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65149 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65150 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65151 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65152 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65153 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65154 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65155 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65156 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65157 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65158 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65159 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65160 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65161 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65162 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65163 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65164 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65165 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65166 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65167 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65168 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65169 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65170 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65172 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65171 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65173 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65174 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65175 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65176 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65177 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65178 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65179 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65180 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65181 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65182 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65183 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65184 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65185 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65186 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65187 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65188 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65189 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65190 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65191 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65192 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65193 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65194 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65195 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65196 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65197 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65198 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65199 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65200 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65201 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65202 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65203 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65204 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65205 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65206 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65207 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65208 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65209 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65210 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65211 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65212 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65213 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65214 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65215 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65216 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65217 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65218 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65219 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65220 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65221 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65222 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65223 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65224 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65225 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65226 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65227 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65228 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65229 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65230 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65231 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65232 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65233 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 65234 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65235 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65236 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65237 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65238 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65239 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 65240 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65241 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65242 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65243 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65244 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65245 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 65246 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65247 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65248 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65249 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65250 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65251 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 65252 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65253 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65254 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65255 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65256 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65257 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 65258 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65259 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65260 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65261 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65262 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65263 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65264 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65265 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65266 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65267 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65268 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65269 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65270 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65271 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65272 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65273 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65274 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65275 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65276 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65277 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65278 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65279 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65280 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65281 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65282 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65283 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65284 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65285 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65286 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65287 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65288 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65289 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65290 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65291 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65292 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65293 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65294 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65295 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65296 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65297 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65298 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65299 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65300 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65301 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65302 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65303 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65304 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65305 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65306 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65307 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65308 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65309 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65310 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65311 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65312 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65313 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65314 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65315 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65316 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65317 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65318 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65319 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65320 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65321 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65322 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65323 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65324 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65325 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65326 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65327 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65328 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65329 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65330 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65331 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65332 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65333 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65334 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65335 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65336 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65337 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65338 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65339 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65340 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65341 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65342 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65343 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65344 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65345 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65346 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65347 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65348 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65349 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65350 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65351 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65352 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65353 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65354 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65355 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65356 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65357 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65358 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65359 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65360 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65361 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65362 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65363 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65364 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65365 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65366 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65367 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65368 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65369 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65370 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65371 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65372 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65373 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65374 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65375 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65376 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65377 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65378 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65379 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65380 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65381 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65382 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65383 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65384 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65385 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65386 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65387 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 65388 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65389 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65390 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65391 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65392 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65393 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 65394 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65395 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65396 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65397 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65398 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65399 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 65400 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65401 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65402 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65403 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65404 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65405 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65406 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65407 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65408 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65409 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65410 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65411 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 65412 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65413 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65414 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65415 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65416 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65417 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65418 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65419 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65420 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65421 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65422 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65423 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65424 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65425 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65426 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65427 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65428 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65429 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65430 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65431 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65432 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65433 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65434 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65435 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65436 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65437 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65438 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65439 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65440 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65441 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65442 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65443 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65444 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65445 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65446 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65447 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65448 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65449 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65450 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65451 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65452 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65453 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65454 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65455 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65456 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65457 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65458 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65459 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65460 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65461 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65462 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65463 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65464 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65465 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65466 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65467 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65468 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65469 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65470 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65471 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65472 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65473 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65474 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65475 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65476 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65477 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65478 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65479 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65480 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65481 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65482 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65483 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65484 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65485 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65486 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65487 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65488 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65489 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65490 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65491 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65492 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65493 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65494 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65495 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65496 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65497 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65498 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65499 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65500 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65501 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65502 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65503 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65504 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65505 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65506 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65507 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65508 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65509 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65510 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65511 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65512 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65513 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65514 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65515 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65516 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65517 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65518 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65519 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65520 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65521 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65522 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65523 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65524 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65525 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65526 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65527 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65528 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65529 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65530 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65531 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65532 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65533 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65534 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65535 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65536 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65537 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65538 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65539 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65540 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65541 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 65542 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65543 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65544 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65545 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65546 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65547 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 65548 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65549 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65550 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65551 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65552 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65553 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 65554 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65555 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65556 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65557 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65558 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65559 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 65560 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65561 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65562 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65563 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65564 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65565 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 65566 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65567 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65568 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65569 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65570 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65571 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65572 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65573 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65574 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65575 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65576 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65577 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65578 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65579 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65580 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65581 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65582 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65583 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65584 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65585 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65586 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65587 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65588 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65589 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65590 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65591 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65592 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65593 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65594 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65595 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65596 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65597 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65598 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65599 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65600 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65601 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65602 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65603 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65604 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65605 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65606 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65607 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65608 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65609 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65610 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65611 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65612 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65613 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65614 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65615 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65616 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65617 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65618 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65619 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65620 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65621 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65622 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65623 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65624 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65625 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65626 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65627 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65628 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65629 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65630 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65631 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65632 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65633 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65634 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65635 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65636 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65637 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65638 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65639 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65640 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65641 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65642 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65643 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65644 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65645 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65646 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65647 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65648 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65649 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65650 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65651 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65652 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65653 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65654 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65655 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65656 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65657 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65658 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65659 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65660 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65661 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65662 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65663 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65664 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65665 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65666 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65667 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65668 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65669 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65670 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65671 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65672 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65673 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65674 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65675 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65676 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65677 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65678 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65679 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65680 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65681 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65682 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65683 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65684 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65685 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65686 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65687 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65688 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65689 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65690 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65691 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65692 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65693 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65694 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65695 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 65696 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65697 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65698 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65699 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65700 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65701 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 65702 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65703 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65704 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65705 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65706 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65707 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 65708 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65709 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65710 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65711 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65712 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65713 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 65714 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65715 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65716 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65717 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65718 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65719 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 65720 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65721 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65722 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65723 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65724 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65725 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65726 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65727 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65728 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65729 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65730 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65731 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65732 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65733 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65734 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65735 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65736 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65737 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65738 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65739 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65740 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65741 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65742 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65743 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65744 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65745 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65746 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65747 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65748 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65749 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65750 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65751 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65752 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65753 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65754 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65755 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65756 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65757 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65758 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65759 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65760 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65761 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65762 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65763 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65764 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65765 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65766 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65767 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65768 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65769 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65771 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65770 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65772 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65773 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65774 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65775 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65776 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65777 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65778 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65779 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65780 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65781 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65782 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65783 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65784 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65785 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65786 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65787 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65788 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65789 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65790 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65791 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65792 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65793 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65794 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65795 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65796 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65797 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65798 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65799 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65800 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65801 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65802 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65803 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65804 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65805 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65806 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65807 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65808 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65809 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65810 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65811 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65812 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65813 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65814 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65815 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65816 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65817 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65818 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65819 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65820 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65821 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65822 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65823 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65824 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65825 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65826 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65827 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65828 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65829 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65830 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65831 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65832 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65833 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65834 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65835 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65836 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65837 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65838 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65839 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65840 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65841 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65842 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65843 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65844 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65845 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65846 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65847 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65848 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65849 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 65850 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65851 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65852 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65853 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65854 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65855 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 65856 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65857 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65858 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65859 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 65860 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65861 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65862 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65863 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65864 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65865 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65866 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65867 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 65868 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65869 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65870 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65871 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65872 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65873 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65874 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65875 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65876 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65877 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65878 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65879 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 65880 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65881 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65882 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65883 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65884 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65885 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65886 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65887 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65888 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65889 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65890 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65891 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65892 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65893 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65894 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65895 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65896 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65897 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65898 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65899 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65900 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65901 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65902 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65903 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65904 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65905 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65906 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65907 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65908 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65909 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65910 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65911 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65912 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65913 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65914 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65915 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65916 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65917 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65918 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65919 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65920 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65921 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65922 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65923 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65924 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65925 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65926 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65927 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65928 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65929 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65930 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65931 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65932 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65933 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65934 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65935 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65936 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65937 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65938 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65939 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65940 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65941 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65943 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65942 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65944 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65945 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65946 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65947 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65948 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65949 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65950 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65951 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65952 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65953 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65954 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65955 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65956 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65957 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65958 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65959 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65960 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65961 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65962 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65963 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65964 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65965 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65966 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65967 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65968 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65969 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65970 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65971 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65972 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65973 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65974 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 65975 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 65976 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65977 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 65978 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 65979 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65980 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65981 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65982 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65983 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65984 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65985 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65986 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65987 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65988 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65989 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65990 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65991 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65992 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65993 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65994 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65995 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65996 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65997 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65998 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 65999 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66000 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66001 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66002 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66003 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 66004 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66005 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66006 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66007 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66008 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66009 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 66010 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66011 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66012 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66013 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66014 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66015 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 66016 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66017 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66018 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66019 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66020 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66021 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 66022 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66023 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66024 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66025 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66026 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66027 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66028 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66029 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66030 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66031 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66032 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66033 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66034 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66035 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66036 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66037 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66038 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66039 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66040 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66041 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66042 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66043 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66044 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66045 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66046 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66047 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66048 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66049 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66050 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66051 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66052 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66053 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66054 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66055 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66056 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66057 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66058 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66059 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66060 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66061 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66062 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66063 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66064 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66065 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66066 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66067 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66068 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66069 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66070 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66071 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66072 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66073 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66074 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66075 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66076 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66077 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66078 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66079 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66080 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66081 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66082 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66083 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66084 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66085 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66086 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66087 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66088 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66089 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66090 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66091 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66092 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66093 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66094 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66095 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66096 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66097 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66098 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66099 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66100 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66101 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66102 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66103 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66104 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66105 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66106 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66107 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66108 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66109 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66110 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66111 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66112 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66113 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66114 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66115 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66116 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66117 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66118 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66119 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66120 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66121 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66122 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66123 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66124 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66125 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66126 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66127 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66128 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66129 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66130 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66131 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66132 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66133 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66134 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66135 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66136 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66137 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66138 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66139 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66140 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66141 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66142 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66143 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66144 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66145 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66146 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66147 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66148 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66149 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66150 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66151 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66152 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66153 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66154 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66155 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66156 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66157 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 66158 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66159 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66160 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66161 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66162 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66163 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 66164 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66165 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66166 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66167 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66168 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66169 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 66170 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66171 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66172 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66173 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66174 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66175 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 66176 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66177 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66178 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66179 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66180 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66181 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 66182 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66183 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66184 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66185 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66186 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66187 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66188 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66189 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66190 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66191 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66192 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66193 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66194 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66195 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66197 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66196 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66198 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66199 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66200 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66201 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66202 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66203 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66204 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66205 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66206 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66207 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66208 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66209 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66210 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66211 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66212 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66213 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66214 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66215 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66216 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66217 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66218 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66219 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66220 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66221 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66222 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66223 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66224 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66225 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66226 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66227 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66228 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66229 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66230 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66231 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66232 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66233 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66234 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66235 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66236 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66237 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66238 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66239 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66240 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66241 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66242 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66243 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66244 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66245 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66246 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66247 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66248 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66249 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66250 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66251 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66252 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66253 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66254 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66255 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66256 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66257 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66258 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66259 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66260 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66261 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66262 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66263 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66264 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66265 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66266 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66267 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66268 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66269 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66270 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66271 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66272 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66273 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66274 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66275 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66276 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66277 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66278 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66279 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66280 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66281 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66282 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66283 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66284 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66285 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66286 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66287 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66288 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66289 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66290 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66291 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66292 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66293 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66294 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66295 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66296 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66297 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66298 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66299 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66300 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66301 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66302 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66303 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66304 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66305 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66306 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66307 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66308 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66309 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66310 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66311 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 66312 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66313 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66314 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66315 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66316 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66317 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 66318 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66319 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66320 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66321 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66322 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66323 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 66324 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66325 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66326 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66327 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66328 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 66329 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66330 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66331 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66332 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66333 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66334 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66335 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 66336 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66337 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66338 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66339 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66340 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66341 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66342 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66343 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66344 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66345 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66346 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66347 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66348 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66349 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66350 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66351 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66352 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66353 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66354 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66355 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66356 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66357 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66358 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66359 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66360 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66361 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66362 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66363 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66364 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66365 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66366 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66367 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66368 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66369 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66370 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66371 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66372 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66373 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66374 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66375 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66376 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66377 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66378 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66379 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66380 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66381 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66382 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66383 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66384 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66385 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66386 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66387 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66388 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66389 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66390 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66391 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66392 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66393 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66394 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66395 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66396 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66397 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66398 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66399 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66400 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66401 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66402 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66403 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66404 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66405 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66406 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66407 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66408 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66409 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66410 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66411 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66412 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66413 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66414 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66415 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66416 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66417 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66418 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66419 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66420 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66421 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66422 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66423 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66424 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66425 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66426 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66427 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66428 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66429 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66430 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66431 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66432 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66433 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66434 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66435 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66436 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66437 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66438 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66439 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66440 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66441 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66442 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66443 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66444 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66445 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66446 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66447 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66448 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66449 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66450 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66451 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66452 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66453 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66454 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66455 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66456 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66457 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66458 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66459 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66460 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66461 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66462 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66463 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66464 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66465 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 66466 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66467 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66468 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66469 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66470 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66471 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 66472 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66473 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66474 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66475 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66476 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66477 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 66478 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66479 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66480 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66481 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66482 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66483 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 66484 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66485 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66486 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66487 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66488 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66489 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 66490 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66491 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66492 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66493 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66494 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66495 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66496 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66497 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66498 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66499 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66500 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66501 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66502 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66503 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66504 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66505 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66506 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66507 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66508 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66509 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66510 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66511 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66512 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66513 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66514 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66515 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66516 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66517 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66518 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66519 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66520 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66521 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66522 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66523 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66524 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66525 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66526 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66527 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66528 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66529 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66530 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66531 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66532 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66533 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66534 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66535 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66536 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66537 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66538 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66539 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66540 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66541 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66542 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66543 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66544 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66545 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66546 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66547 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66548 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66549 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66550 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66551 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66552 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66553 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66554 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66555 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66556 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66557 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66558 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66559 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66560 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66561 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66562 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66563 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66564 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66565 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66566 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66567 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66568 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66569 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66570 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66571 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66572 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66573 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66574 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66575 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66576 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66577 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66578 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66579 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66580 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66581 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66582 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66583 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66584 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66585 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66586 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66587 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66588 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66589 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66590 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66591 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66592 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66593 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66594 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66595 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66596 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66597 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66598 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66599 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66600 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66601 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66602 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66603 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66604 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66605 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66606 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66607 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66608 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66609 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66610 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66611 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66612 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66613 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66614 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66615 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66616 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66618 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66617 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66619 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 66620 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66621 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66622 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66623 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66624 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66625 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 66626 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66627 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66628 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66629 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 66630 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66631 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66632 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66633 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66634 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66635 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66636 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66637 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 66638 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66639 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66640 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66641 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66642 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66643 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 66644 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66645 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66646 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66647 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66648 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66649 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66650 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66651 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66652 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66653 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66654 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66655 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66656 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66657 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66658 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66659 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66660 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66661 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66662 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66663 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66664 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66665 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66666 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66667 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66668 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66669 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66670 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66671 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66672 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66673 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66674 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66675 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66676 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66677 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66678 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66679 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66680 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66681 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66682 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66683 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66684 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66685 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66686 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66687 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66688 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66689 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66690 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66691 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66692 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66693 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66694 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66695 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66696 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66697 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66698 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66699 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66700 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66701 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66702 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66703 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66704 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66705 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66706 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66707 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66708 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66709 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66710 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66711 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66712 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66713 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66714 8:54:16 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66715 8:54:16 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66716 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66717 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66718 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66719 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66720 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66721 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66722 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66723 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66724 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66725 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66726 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66727 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66728 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66729 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66730 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66731 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66732 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66733 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66734 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66735 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66736 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66737 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66738 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66739 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66740 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66741 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66742 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66743 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66744 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66745 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66746 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66747 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66748 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66749 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66750 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66751 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66752 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66753 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66754 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66755 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66756 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66757 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66758 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66759 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66760 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66761 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66762 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66763 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66764 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66765 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66766 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66767 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66768 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66769 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66770 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66771 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66772 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66773 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 66774 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66775 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66776 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66777 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66778 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66779 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 66780 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66781 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66782 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66783 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66784 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66785 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 66786 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66787 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66788 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66789 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66790 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66791 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 66792 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66793 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66794 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66795 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66796 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66797 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 66798 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66799 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66800 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66801 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66802 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66803 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66804 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66805 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66806 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66807 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66808 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66809 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66810 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66811 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66812 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66813 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66814 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66815 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66816 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66817 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66818 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66819 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66820 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66821 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66822 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66823 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66824 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66825 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66826 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66827 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66828 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66829 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66830 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66831 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66832 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66833 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66834 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66835 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66836 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66837 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66838 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66839 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66840 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66841 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66842 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66843 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66844 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66845 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66846 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66847 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66848 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66849 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66850 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66851 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66852 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66853 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66854 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66855 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66856 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66857 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66858 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66859 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66860 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66861 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66862 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66863 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66864 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66865 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66866 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66867 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66868 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66869 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66870 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66871 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66872 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66873 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66874 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66875 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66876 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66877 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66878 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66879 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66880 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66881 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66882 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66883 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66884 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66885 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66886 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66887 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66888 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66889 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66890 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66891 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66892 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66893 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66894 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66895 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66896 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66897 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66898 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66899 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66900 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66901 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66902 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66903 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66904 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66905 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66906 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66907 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66908 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66909 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66910 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66911 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66912 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66913 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66914 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66915 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66916 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66917 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66918 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66919 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66920 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66921 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66922 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66923 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66924 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66925 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66926 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66927 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 66928 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66929 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66930 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66931 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66932 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66933 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 66934 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66935 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66936 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66937 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66938 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66939 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 66940 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66941 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66942 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66943 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66944 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66945 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 66946 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66947 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66948 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66949 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66950 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66951 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 66952 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66953 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66954 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66955 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66956 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66957 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 66958 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66959 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66960 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66961 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66962 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66963 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66964 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66965 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66966 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66967 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66968 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66969 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66970 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66971 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66972 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66973 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66974 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66975 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66976 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66977 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66978 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66979 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66980 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66981 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66982 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66983 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66984 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66985 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66986 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66987 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66988 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66989 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66990 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66991 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66992 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66993 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 66994 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66995 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 66996 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 66997 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 66998 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 66999 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67000 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67001 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67002 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67003 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67004 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67005 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67006 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67007 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67008 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67009 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67010 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67011 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67012 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67013 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67014 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67015 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67016 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67017 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67018 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67019 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67020 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67021 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67022 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67023 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67024 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67025 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67026 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67027 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67028 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67029 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67030 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67031 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67032 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67033 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67034 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67035 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67036 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67037 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67038 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67039 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67040 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67041 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67042 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67043 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67044 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67045 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67046 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67047 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67048 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67049 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67050 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67051 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67052 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67053 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67054 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67055 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67056 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67057 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67058 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67059 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67060 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67061 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67062 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67063 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67064 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67065 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67066 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67067 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67068 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67069 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67070 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67071 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67072 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67073 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67074 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67075 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67076 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67077 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67078 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67079 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67080 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67081 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 67082 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67083 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67084 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67085 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67086 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67087 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 67088 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67089 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67090 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67091 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 67092 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67093 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67094 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67095 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67096 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67097 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67098 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67099 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 67100 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67101 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67102 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67103 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67104 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67105 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 50 67106 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67107 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67108 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67109 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67110 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67111 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 67112 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67113 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67114 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67115 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67116 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67117 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67118 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67119 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67120 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67121 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67122 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67123 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67124 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67125 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67126 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67127 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67128 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67129 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67130 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67131 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67132 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67133 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67134 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67135 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67136 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67137 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67138 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67139 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67140 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67141 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67142 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67143 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67144 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67145 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67146 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67147 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67148 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67149 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67150 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67151 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67152 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67153 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67154 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67155 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67156 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67157 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67158 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67159 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67160 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67161 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67162 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67163 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67164 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67165 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67166 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67167 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67168 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67169 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67170 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67171 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67172 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67173 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67174 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67175 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67176 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67177 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67178 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67179 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67180 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67181 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67182 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67183 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67184 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67185 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67186 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67187 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67188 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67189 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67190 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67191 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67192 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67193 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67194 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67195 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67196 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67197 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67198 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67199 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67200 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67201 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67202 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67203 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67204 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67205 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67206 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67207 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67208 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67209 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67210 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67211 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67212 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67213 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67214 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67215 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67216 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67217 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67218 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67219 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67220 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67221 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67222 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67223 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67224 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67225 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67226 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67227 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67228 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67229 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67230 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67231 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67232 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67233 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67234 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67235 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 67236 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67237 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67238 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67239 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67240 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67241 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 67242 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67243 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67244 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67245 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67246 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67247 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 67248 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67249 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67250 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67251 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67252 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67253 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 67254 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67255 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67256 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67257 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67258 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67259 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 50 67260 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67261 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67262 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67263 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67264 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67265 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 67266 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67267 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67268 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67269 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67270 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67271 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67272 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67273 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67274 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67275 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67276 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67277 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67278 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67279 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67280 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67281 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67282 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67283 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67284 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67285 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67286 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67287 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67288 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67289 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67290 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67291 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67292 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67293 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67294 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67295 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67296 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67297 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67298 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67299 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67300 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67301 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67302 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67303 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67304 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67305 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67306 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67307 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67308 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67309 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67310 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67311 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67312 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67313 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67314 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67315 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67316 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67317 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67318 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67319 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67320 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67321 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67322 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67323 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67324 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67325 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67326 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67327 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67328 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67329 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67330 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67331 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67332 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67333 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67334 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67335 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67336 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67337 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67338 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67339 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67340 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67341 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67342 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67343 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67344 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67345 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67346 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67347 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67348 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67349 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67350 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67351 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67352 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67353 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67354 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67355 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67356 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67357 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67358 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67359 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67360 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67361 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67362 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67363 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67364 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67365 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67366 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67367 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67368 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67369 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67370 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67371 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67372 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67373 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67374 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67375 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67376 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67377 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67378 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67379 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67380 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67381 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67382 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67383 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67384 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67385 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67386 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67387 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67388 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67389 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 67390 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67391 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67392 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67393 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67394 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67395 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 67396 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67397 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67398 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67399 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67400 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67401 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 67402 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67403 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67404 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67405 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67406 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67407 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 67408 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67409 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67410 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67411 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67412 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67413 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 67414 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67415 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67416 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67417 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67418 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67419 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 67420 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67421 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67422 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67423 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67424 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67425 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67426 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67427 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67428 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67429 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67430 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67431 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67432 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67433 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67434 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67435 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67436 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67437 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67438 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67439 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67440 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67441 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67442 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67443 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67444 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67445 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67446 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67447 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67448 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67449 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67450 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67451 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67452 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67453 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67454 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67455 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67456 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67457 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67458 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67459 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67460 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67461 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67462 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67463 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67465 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67464 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67466 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67467 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67468 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67469 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67470 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67471 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67472 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67473 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67474 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67475 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67476 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67477 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67478 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67479 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67480 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67481 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67482 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67483 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67484 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67485 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67486 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67487 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67488 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67489 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67490 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67491 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67492 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67493 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67494 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67495 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67496 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67497 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67498 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67499 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67500 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67501 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67502 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67503 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67504 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67505 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67506 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67507 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67508 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67509 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67510 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67511 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67512 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67513 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67514 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67515 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67516 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67517 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67518 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67519 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67520 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67521 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67522 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67523 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67524 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67525 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67526 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67527 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67528 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67529 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67530 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67531 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67532 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67533 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67534 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67535 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67536 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67537 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67538 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67539 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67540 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67541 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67542 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67543 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 67544 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67545 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67546 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67547 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67548 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67549 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 67550 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67551 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67552 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67553 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67554 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67555 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 67556 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67557 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67558 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67559 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67560 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67561 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 67562 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67563 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67564 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67565 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67566 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67567 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 67568 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67569 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67570 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67571 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67572 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67573 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 67574 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67575 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67576 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67577 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67578 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67579 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67580 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67581 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67582 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67583 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67584 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67585 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67586 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67587 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67588 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67589 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67590 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67591 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67592 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67593 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67594 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67595 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67596 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67597 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67598 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67599 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67600 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67601 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67602 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67603 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67604 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67605 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67606 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67607 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67608 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67609 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67610 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67611 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67612 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67613 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67614 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67615 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67616 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67617 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67618 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67619 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67620 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67621 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67622 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67623 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67625 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67624 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67626 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67627 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67628 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67629 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67630 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67631 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67632 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67633 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67634 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67635 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67636 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67637 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67638 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67639 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67640 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67641 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67642 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67643 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67644 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67645 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67646 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67647 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67648 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67649 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67650 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67651 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67652 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67653 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67654 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67655 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67656 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67657 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67658 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67659 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67660 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67661 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67662 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67663 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67664 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67665 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67666 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67667 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67668 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67669 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67670 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67671 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67672 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67673 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67674 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67675 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67676 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67677 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67678 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67679 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67680 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67681 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67682 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67683 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67684 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67685 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67686 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67687 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67688 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67689 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67690 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67691 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67692 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67693 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67694 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67695 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67696 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67697 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 67698 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67699 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67700 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67701 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67702 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67703 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 67704 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67706 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67705 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67707 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67708 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67709 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 67710 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67711 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67712 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67713 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67714 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67715 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 67716 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67717 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67718 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67719 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67720 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67721 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 70 67722 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67723 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67724 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67725 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67726 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67727 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 67728 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67729 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67730 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67731 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67732 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67733 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67734 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67735 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67736 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67737 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67738 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67739 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67740 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67741 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67742 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67743 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67744 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67745 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67746 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67747 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67748 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67749 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67750 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67751 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67752 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67753 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67754 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67755 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67756 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67757 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67758 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67759 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67760 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67761 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67762 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67763 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67764 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67765 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67766 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67767 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67768 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67769 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67770 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67771 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67772 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67773 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67774 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67775 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67776 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67777 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67778 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67779 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67780 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67781 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67782 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67783 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67784 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67785 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67786 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67787 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67788 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67789 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67790 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67791 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67792 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67793 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67794 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67795 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67796 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67797 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67798 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67799 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67800 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67801 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67802 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67803 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67804 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67805 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67806 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67807 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67808 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67809 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67810 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67811 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67812 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67813 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67814 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67815 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67816 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67817 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67818 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67819 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67820 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67821 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67822 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67823 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67824 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67825 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67826 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67827 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67828 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67829 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67830 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67831 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67832 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67833 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67834 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67835 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67836 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67837 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67838 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67839 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67840 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67841 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67842 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67843 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67844 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67845 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67846 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67847 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67848 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67849 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67850 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67851 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 67852 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67853 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67854 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67855 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67856 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67857 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 67858 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67859 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67860 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67861 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67862 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67863 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 67864 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67865 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67866 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67867 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67868 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67869 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 67870 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67871 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67872 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67873 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67874 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67875 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 70 67876 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67877 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67878 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67879 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67880 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67881 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 67882 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67883 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67884 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67885 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67886 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67887 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67888 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67889 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67890 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67891 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67892 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67893 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67894 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67895 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67896 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67897 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67898 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67899 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67900 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67901 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67902 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67903 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67904 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67905 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67906 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67907 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67908 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67909 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67910 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67911 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67912 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67913 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67914 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67915 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67916 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67917 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67918 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67919 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67920 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67921 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67922 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67923 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67924 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67925 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67926 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67927 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67928 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67929 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67930 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67931 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67932 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67933 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67934 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67935 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67936 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67937 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67938 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67939 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67940 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67941 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67942 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67943 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67944 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67945 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67946 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67947 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67948 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67949 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67950 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67951 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67952 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67953 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67954 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67955 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67956 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67957 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67958 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67959 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67960 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67961 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67962 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67963 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67964 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67965 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67966 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67967 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67968 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67969 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67970 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67971 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67972 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67973 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67974 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67975 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67976 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 67977 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 67978 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67979 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 67980 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 67981 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67982 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67983 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67984 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67985 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67986 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67987 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67988 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67989 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67990 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67991 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67992 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67993 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67994 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67995 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67996 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67997 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67998 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 67999 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68000 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68001 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68002 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68003 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68004 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68005 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 68006 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68007 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68008 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68009 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68010 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68011 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 68012 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68013 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68014 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68015 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 68016 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68017 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68018 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68019 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68020 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68021 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 68022 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68023 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68024 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68025 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68026 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68027 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68028 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68029 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 68030 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68031 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68032 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68033 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68034 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68035 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 68036 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68037 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68038 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68039 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68040 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68041 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68042 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68043 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68044 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68045 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68046 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68047 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68048 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68049 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68050 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68051 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68052 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68053 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68054 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68055 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68056 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68057 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68058 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68059 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68060 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68061 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68062 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68063 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68064 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68065 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68066 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68067 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68068 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68069 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68070 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68071 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68072 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68073 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68074 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68075 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68076 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68077 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68078 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68079 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68080 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68081 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68082 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68083 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68084 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68085 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68086 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68087 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68088 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68089 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68090 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68091 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68092 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68093 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68094 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68095 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68096 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68097 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68098 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68099 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68100 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68101 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68102 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68103 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68104 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68105 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68106 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68107 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68108 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68109 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68110 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68111 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68112 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68113 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68114 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68115 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68116 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68117 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68118 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68119 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68121 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68122 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68120 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68123 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68124 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68125 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68126 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68127 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68128 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68129 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68130 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68131 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68132 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68133 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68134 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68135 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68136 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68137 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68138 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68139 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68140 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68141 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68142 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68143 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68144 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68145 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68146 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68147 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68148 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68149 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68150 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68151 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68152 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68153 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68154 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68155 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68156 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68157 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68158 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68159 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 68160 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68161 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68162 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68163 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68164 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68165 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 68166 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68167 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68168 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68169 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 68170 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68171 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68172 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68173 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68174 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68175 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68176 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68177 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 68178 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68179 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68180 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68181 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68182 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68183 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 80 68184 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68185 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68186 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68187 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68188 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68189 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 68190 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68191 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68192 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68193 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68194 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68195 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68196 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68197 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68198 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68199 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68200 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68201 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68202 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68203 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68204 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68205 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68206 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68207 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68208 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68209 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68210 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68211 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68212 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68213 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68214 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68215 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68216 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68217 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68218 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68219 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68220 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68221 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68222 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68223 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68224 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68225 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68226 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68227 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68228 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68229 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68230 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68231 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68232 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68233 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68234 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68235 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68236 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68237 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68238 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68239 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68240 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68241 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68242 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68243 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68244 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68245 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68246 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68247 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68248 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68249 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68250 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68251 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68252 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68253 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68254 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68255 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68256 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68257 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68258 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68259 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68260 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68261 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68262 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68263 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68264 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68265 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68266 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68267 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68268 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68269 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68270 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68271 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68272 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68273 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68274 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68275 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68276 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68277 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68278 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68279 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68280 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68281 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68282 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68283 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68284 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68285 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68286 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68287 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68288 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68289 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68290 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68291 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68292 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68293 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68294 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68295 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68296 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68297 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68298 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68299 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68300 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68301 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68302 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68303 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68304 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68305 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68306 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68307 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68308 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68309 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68310 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68311 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68312 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68313 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 68314 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68315 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68316 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68317 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68318 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68319 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 68320 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68321 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68322 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68323 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68324 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68325 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 68326 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68327 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68328 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68329 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68330 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68331 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 68332 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68333 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68334 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68335 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68336 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68337 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 90 68338 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68339 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68340 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68341 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68342 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68343 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 68344 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68345 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68346 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68347 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68348 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68349 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68350 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68351 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68352 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68353 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68354 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68355 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68356 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68357 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68358 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68359 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68360 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68361 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68362 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68363 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68364 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68365 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68366 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68367 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68368 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68369 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68370 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68371 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68372 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68373 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68374 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68375 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68376 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68377 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68378 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68379 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68380 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68381 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68382 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68383 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68384 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68385 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68386 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68387 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68388 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68389 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68390 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68391 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68392 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68393 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68394 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68395 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68396 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68397 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68398 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68399 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68400 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68401 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68402 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68403 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68404 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68405 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68406 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68407 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68408 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68409 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68410 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68411 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68412 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68413 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68414 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68415 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68416 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68417 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68418 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68419 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68420 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68421 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68422 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68423 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68424 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68425 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68426 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68427 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68428 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68429 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68430 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68431 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68432 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68433 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68434 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68435 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68436 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68437 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68438 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68439 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68440 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68441 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68442 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68443 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68444 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68445 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68446 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68447 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68448 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68449 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68450 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68451 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68452 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68453 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68454 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68455 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68456 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68457 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68458 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68459 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68460 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68461 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68462 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68463 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68464 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68465 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68466 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68467 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 68468 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68469 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68470 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68471 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68472 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68473 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 68474 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68475 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68476 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68477 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68478 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68479 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 68480 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68481 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68482 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68483 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68484 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68485 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 68486 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68487 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68488 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68489 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68490 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68491 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 90 68492 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68493 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68494 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68495 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68496 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68497 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 68498 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68499 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68500 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68501 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68502 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68503 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68504 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68505 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68506 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68507 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68508 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68509 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68510 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68511 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68513 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68512 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68514 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68515 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68516 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68517 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68518 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68519 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68520 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68521 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68522 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68523 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68524 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68525 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68526 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68527 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68528 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68529 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68530 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68531 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68532 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68533 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68534 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68535 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68536 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68537 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68538 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68539 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68540 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68541 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68542 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68543 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68544 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68545 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68546 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68547 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68548 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68549 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68550 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68551 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68552 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68553 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68554 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68555 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68556 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68557 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68558 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68559 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68560 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68561 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68562 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68563 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68564 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68565 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68566 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68567 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68568 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68570 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68569 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68571 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68572 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68573 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68574 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68575 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68576 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68577 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68578 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68579 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68580 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68581 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68582 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68583 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68584 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68585 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68586 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68587 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68588 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68589 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68590 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68591 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68592 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68593 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68594 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68595 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68596 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68597 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68598 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68599 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68600 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68601 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68602 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68603 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68604 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68605 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68606 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68607 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68608 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68609 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68610 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68611 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68612 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68613 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68614 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68615 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68616 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68617 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68618 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68619 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68620 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68621 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 68622 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68623 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68624 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68625 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68626 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68627 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 68628 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68629 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68630 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68631 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68632 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68633 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 68634 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68635 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68636 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68637 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68638 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68639 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 68640 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68641 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68642 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68643 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68644 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68645 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: A0 68646 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68647 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68648 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68649 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68650 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68651 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 68652 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68653 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68654 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68655 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68656 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68657 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68658 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68659 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68660 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68661 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68662 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68663 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68664 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68665 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68666 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68667 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68668 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68669 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68670 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68671 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68672 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68673 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68674 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68675 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68676 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68677 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68678 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68679 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68680 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68681 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68682 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68683 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68684 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68685 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68686 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68687 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68688 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68689 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68690 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68691 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68692 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68693 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68694 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68695 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68696 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68697 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68698 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68699 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68700 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68701 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68702 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68703 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68704 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68705 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68706 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68707 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68708 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68709 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68710 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68711 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68712 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68713 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68714 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68715 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68716 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68717 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68718 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68719 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68720 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68721 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68722 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68723 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68724 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68725 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68726 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68727 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68728 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68729 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68730 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68731 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68732 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68733 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68734 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68735 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68736 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68737 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68738 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68739 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68740 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68741 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68742 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68743 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68744 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68745 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68746 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68747 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68748 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68749 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68750 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68751 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68752 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68753 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68754 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68755 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68756 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68757 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68758 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68759 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68760 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68761 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68762 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68763 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68764 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68765 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68766 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68767 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68768 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68769 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68770 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68771 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68772 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68773 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68774 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68775 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 68776 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68777 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68778 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68779 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68780 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68781 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 68782 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68783 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68784 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68785 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68786 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68787 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 68788 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68789 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68790 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68791 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68792 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68793 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 68794 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68795 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68796 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68797 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68798 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68799 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: A0 68800 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68801 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68802 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68803 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68804 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68805 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 68806 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68807 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68808 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68809 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68810 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68811 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68812 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68813 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68814 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68815 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68816 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68817 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68818 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68819 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68820 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68821 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68822 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68823 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68824 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68825 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68826 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68827 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68828 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68829 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68830 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68831 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68832 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68833 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68834 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68835 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68836 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68837 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68838 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68839 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68840 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68841 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68842 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68843 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68844 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68845 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68846 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68847 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68848 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68849 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68850 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68851 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68852 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68853 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68854 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68855 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68856 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68857 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68858 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68859 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68860 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68861 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68862 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68863 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68864 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68865 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68866 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68867 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68868 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68869 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68870 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68871 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68872 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68873 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68874 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68875 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68876 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68877 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68878 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68879 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68880 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68881 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68882 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68883 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68884 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68885 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68886 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68887 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68888 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68889 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68890 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68891 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68892 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68893 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68894 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68895 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68896 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68897 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68898 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68899 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68900 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68901 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68902 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68903 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68904 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68905 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68906 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68907 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68908 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68909 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68910 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68911 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68912 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68913 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68914 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68915 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68916 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68917 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68918 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68919 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68920 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68921 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68922 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68923 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68924 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68925 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68926 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68927 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68928 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68929 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 68930 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68931 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68932 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68933 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68934 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68935 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 68936 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68937 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68938 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68939 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68940 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68941 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 68942 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68943 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68944 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68945 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68946 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68947 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 68948 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68949 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68950 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68951 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68952 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68953 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: B0 68954 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68955 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68956 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68957 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68958 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68959 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 68960 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68961 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68962 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68963 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68964 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68965 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68966 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68967 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68968 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68969 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68970 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68971 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68972 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68973 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68974 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68975 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68976 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68977 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68978 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68979 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68980 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68981 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68982 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68983 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68984 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68985 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68986 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68987 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68988 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68989 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68990 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68991 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68992 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68993 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68994 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 68995 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 68996 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 68997 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 68998 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 68999 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69000 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69001 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69002 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69003 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69005 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69004 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69006 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69007 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69008 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69009 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69010 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69011 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69012 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69013 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69014 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69015 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69016 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69017 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69018 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69019 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69020 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69021 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69022 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69023 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69024 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69025 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69026 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69027 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69028 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69029 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69030 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69031 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69032 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69033 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69034 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69035 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69036 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69037 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69038 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69039 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69040 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69041 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69042 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69043 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69044 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69045 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69046 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69047 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69048 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69049 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69050 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69051 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69052 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69053 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69054 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69055 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 69056 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69057 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69058 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69059 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69060 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69061 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69062 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69063 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69064 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69065 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69066 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69067 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69068 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69069 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69070 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69071 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69072 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69073 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69074 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69075 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69076 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69077 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69078 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69079 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69080 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69081 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69082 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69083 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 69084 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69085 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69086 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69087 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69088 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69089 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 69090 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69091 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69092 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69093 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69094 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69095 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 69096 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69097 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69098 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69099 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69100 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69101 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 69102 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69103 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69104 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69105 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69106 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69107 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: B0 69108 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69109 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69110 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 69111 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69112 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 69113 8:54:17 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 69114 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69115 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 69116 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 69117 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69991 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69992 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69993 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69994 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69995 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69996 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69997 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69998 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 69999 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70000 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70001 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70002 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70003 8:54:17 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70004 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70005 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70006 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70007 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 70008 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70009 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70010 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70011 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70012 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70013 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 70014 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70015 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70016 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70017 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70018 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70019 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 70020 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70021 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70022 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70023 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70024 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70025 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 70026 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70027 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70028 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70029 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70030 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70031 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: E0 70032 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70033 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70034 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70035 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70036 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70037 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 70038 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70039 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70040 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70041 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70042 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70043 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70044 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70045 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70046 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70047 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70048 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70049 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70050 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70051 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70052 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70053 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70054 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70055 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70056 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70057 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70058 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70059 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70060 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70061 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70062 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70063 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70064 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70065 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70066 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70067 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70068 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70069 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70070 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70071 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70072 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70073 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70074 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70075 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70076 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70077 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70078 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70079 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70080 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70081 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70082 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70083 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70084 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70085 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70086 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70087 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70088 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70089 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70090 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70091 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70092 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70093 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70094 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70095 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70096 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70097 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70098 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70099 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70100 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70101 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70102 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70103 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70104 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70105 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70106 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70107 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70108 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70109 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70110 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70111 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70112 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70113 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70114 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70115 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70116 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70117 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70118 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70119 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70120 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70121 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70123 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70122 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70124 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70125 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70126 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70127 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70128 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70129 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70130 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70131 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70132 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70133 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70134 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70135 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70136 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70137 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70138 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70139 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70140 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70141 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70142 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70143 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70144 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70145 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70146 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70147 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70148 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70149 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70150 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70151 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70152 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70153 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70154 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70155 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70156 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70157 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70158 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70159 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70160 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70161 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 70162 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70163 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70164 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70165 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70166 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70167 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 70168 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70169 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70170 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70171 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 70172 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70173 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70174 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70175 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70176 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70177 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70178 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70179 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 01 70180 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70181 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70182 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70183 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70184 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70185 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 70186 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70187 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70188 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70189 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70190 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70191 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 70192 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70193 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70194 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70195 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70196 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70197 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70198 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70199 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70200 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70201 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70202 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70203 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70204 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70205 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70206 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70207 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70208 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70209 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70210 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70211 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70212 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70213 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70214 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70215 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70216 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70217 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70218 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70219 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70220 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70221 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70222 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70223 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70224 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70225 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70226 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70227 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70228 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70229 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70230 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70231 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70232 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70233 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70234 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70235 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70236 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70237 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70238 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70239 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70240 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70241 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70242 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70243 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70244 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70245 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70246 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70247 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70248 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70249 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70250 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70251 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70252 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70253 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70254 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70255 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70256 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70257 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70258 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70259 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70260 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70261 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70262 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70263 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70264 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70265 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70266 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70267 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70268 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70269 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70270 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70271 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70272 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70273 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70274 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70275 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70276 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70277 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70278 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70279 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70280 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70281 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70282 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70283 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70284 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70285 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70286 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70287 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70288 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70289 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70290 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70291 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70292 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70293 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70294 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70295 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70296 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70297 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70298 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70299 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70300 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70301 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70302 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70303 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70304 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70305 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70306 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70307 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70308 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70309 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70310 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70311 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70312 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70313 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70314 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70315 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 70316 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70317 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70318 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70319 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70320 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70321 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 70322 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70323 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70324 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70325 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70326 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70327 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 70328 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70329 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70330 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70331 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70332 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70333 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 11 70334 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70335 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70336 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70337 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70338 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70339 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 70340 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70341 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70342 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70343 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70344 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70345 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 70346 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70347 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70348 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70349 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70350 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70351 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70352 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70353 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70354 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70355 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70356 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70357 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70358 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70359 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70360 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70361 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70362 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70363 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70364 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70365 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70366 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70367 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70368 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70369 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70370 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70371 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70372 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70373 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70374 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70375 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70376 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70377 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70378 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70379 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70380 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70381 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70382 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70383 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70384 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70385 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70386 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70387 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70388 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70389 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70390 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70391 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70392 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70393 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70394 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70395 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70396 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70397 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70398 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70399 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70400 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70401 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70402 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70403 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70404 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70405 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70406 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70407 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70408 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70409 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70410 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70411 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70412 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70413 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70414 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70415 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70416 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70417 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70418 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70419 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70420 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70421 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70422 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70423 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70424 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70425 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70426 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70427 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70428 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70429 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70430 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70431 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70432 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70433 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70434 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70435 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70436 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70437 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70438 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70439 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70440 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70441 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70442 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70443 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70444 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70445 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70446 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70447 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70448 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70449 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70450 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70451 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70452 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70453 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70454 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70455 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70456 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70457 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70458 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70459 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70460 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70461 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70462 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70463 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70464 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70465 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70466 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70467 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70468 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70469 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 70470 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70471 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70472 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70473 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70474 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70475 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 70476 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70477 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70478 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70479 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 70480 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70481 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70482 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70483 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70484 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70485 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70486 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70487 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 02 70488 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70489 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70490 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70491 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70492 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70493 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 70494 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70495 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70496 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70497 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70498 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70499 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 70500 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70501 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70502 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70503 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70504 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70505 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70506 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70507 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70508 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70509 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70510 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70511 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70512 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70513 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70514 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70515 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70516 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70517 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70518 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70519 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70520 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70521 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70522 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70523 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70524 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70525 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70526 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70527 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70528 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70529 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70530 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70531 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70532 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70533 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70534 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70535 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70536 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70537 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70538 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70539 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70540 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70541 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70542 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70543 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70544 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70545 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70546 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70547 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70548 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70549 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70550 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70551 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70552 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70553 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70554 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70555 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70556 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70557 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70558 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70559 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70560 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70561 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70562 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70563 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70564 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70565 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70566 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70567 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70568 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70569 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70570 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70571 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70572 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70573 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70574 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70575 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70576 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70577 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70578 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70579 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70580 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70581 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70582 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70583 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70584 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70585 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70586 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70587 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70588 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70589 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70590 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70591 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70592 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 70593 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70594 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 70595 8:54:18 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 70596 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70597 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 70598 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 70599 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70600 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 70601 8:54:18 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 76941 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76942 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76943 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 76944 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76945 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76946 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76947 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76948 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76949 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 76950 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76951 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76952 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76953 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76954 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76955 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 03 76956 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76957 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76958 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76959 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76960 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76961 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 50 76962 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76963 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76964 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76965 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76966 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76967 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 76968 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76969 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76970 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76971 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76972 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76973 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 76974 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76975 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76976 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76977 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76978 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76979 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 76980 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76981 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76982 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76983 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76984 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76985 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 76986 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76987 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76988 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76989 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76990 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76991 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 76992 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76993 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 76994 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 76995 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76996 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 76997 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 76998 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 76999 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77000 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77001 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77002 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77003 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77004 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77005 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77006 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77007 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77008 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77009 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77010 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77011 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77012 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77013 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77014 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77015 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77016 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77017 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77018 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77019 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77020 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77021 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77022 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77023 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77024 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77025 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77026 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77027 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77028 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77029 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77030 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77031 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77032 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77033 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77034 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77035 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77036 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77037 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77038 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77039 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77040 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77042 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77043 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77041 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77044 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77045 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77046 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77047 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77048 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77049 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77050 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77051 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77052 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77053 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77054 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77055 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77056 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77057 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77058 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77059 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77060 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77061 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77062 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77063 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77064 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77065 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77066 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77067 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77068 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77069 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77070 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77071 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77072 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77073 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77074 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77075 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77076 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77077 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77078 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77079 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77080 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77081 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77082 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77083 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77084 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77085 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77086 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77087 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77088 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77089 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77090 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77091 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 77092 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77093 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77094 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77095 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77096 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77097 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 77098 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77099 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77100 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77101 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77102 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77103 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 77104 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77105 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77106 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77107 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77108 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77109 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 13 77110 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77112 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77111 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77113 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77114 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77115 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 50 77116 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77117 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77118 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77119 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77120 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77121 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 77122 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77123 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77124 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77125 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77126 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77127 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77128 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77129 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77130 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77131 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77132 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77133 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77134 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77135 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77136 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77137 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77138 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77139 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77140 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77141 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77142 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77143 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77144 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77145 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77146 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77147 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77148 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77149 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77150 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77151 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77152 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77153 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77154 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77155 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77156 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77157 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77158 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77159 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77160 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77161 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77162 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77163 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77164 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77165 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77166 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77167 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77168 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77169 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77170 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77171 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77172 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77173 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77174 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77175 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77176 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77177 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77178 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77179 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77180 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77181 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77182 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77183 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77184 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77185 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77186 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77187 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77188 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77189 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77190 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77191 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77192 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77193 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77194 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77195 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77196 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77197 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77198 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77199 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77200 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77201 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77202 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77203 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77204 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77205 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77206 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77207 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77208 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77209 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77210 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77211 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77212 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77213 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77215 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77214 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77216 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77217 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77218 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77219 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77220 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77221 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77222 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77223 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77224 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77225 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77226 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77227 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77228 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77229 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77230 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77231 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77232 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77233 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77234 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77235 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77236 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77237 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77238 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77239 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77240 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77241 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77242 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77243 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77244 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77245 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 77246 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77247 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77248 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77249 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77250 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77251 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 77252 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77253 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77254 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77255 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77256 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77257 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 77258 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77259 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77260 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77261 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77262 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77263 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 03 77264 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77265 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77266 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77267 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77268 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77269 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 77270 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77271 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77272 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77273 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77274 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77275 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 77276 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77277 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77278 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77279 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77280 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77281 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77282 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77283 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77284 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77285 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77286 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77287 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77288 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77289 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77290 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77291 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77292 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77293 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77294 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77295 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77296 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77297 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77298 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77299 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77300 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77301 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77302 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77303 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77304 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77305 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77306 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77307 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77308 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77309 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77310 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77311 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77312 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77313 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77315 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77314 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77316 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77317 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77318 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77319 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77320 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77321 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77322 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77323 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77324 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77325 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77326 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77327 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77328 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77329 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77330 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77331 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77332 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77333 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77334 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77335 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77336 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77337 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77338 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77339 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77340 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77341 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77342 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77343 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77344 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77345 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77346 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77347 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77348 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77349 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77350 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77351 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77352 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77353 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77354 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77355 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77356 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77357 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77358 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77359 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77360 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77361 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77362 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77363 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77364 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77365 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77366 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77367 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77368 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77369 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77370 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77371 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77372 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77373 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77374 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77375 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77376 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77377 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77378 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77379 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77380 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77381 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77382 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77383 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77384 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77385 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77386 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77387 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77388 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77389 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77390 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77391 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77392 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77393 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77394 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77395 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77396 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77397 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77398 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77399 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 77400 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77401 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77402 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77403 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77404 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77405 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 77406 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77407 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77408 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77409 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77410 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77411 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 77412 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77413 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77414 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77415 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77416 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77417 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 13 77418 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77419 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77420 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77421 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77422 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77423 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 77424 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77425 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77426 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77427 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77428 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77429 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 77430 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77431 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77432 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77433 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77434 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77435 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77436 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77437 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77439 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77438 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77440 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77441 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77442 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77443 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77444 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77445 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77446 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77447 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77448 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77449 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77450 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77451 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77452 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77453 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77454 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77455 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77456 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77457 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77458 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77459 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77460 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77461 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77462 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77463 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77464 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77465 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77466 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77467 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77468 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77469 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77470 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77471 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77472 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77473 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77474 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77475 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77476 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77477 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77478 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77479 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77481 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77480 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77482 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77483 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77484 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77485 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77486 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77487 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77488 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77489 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77490 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77491 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77492 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77493 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77494 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77495 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77496 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77497 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77498 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77499 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77500 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77501 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77502 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77503 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77504 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77505 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77506 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77507 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77508 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77509 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77510 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77511 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77512 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77513 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77514 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77515 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77516 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77517 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77518 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77519 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77520 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77521 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77522 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77523 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77524 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 77525 8:54:20 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 77526 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77527 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 77528 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 77529 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77530 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77531 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77532 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77533 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77534 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77535 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77536 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77537 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77538 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77539 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77540 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77541 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77542 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77543 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77544 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77545 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77546 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77547 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77548 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77549 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 77550 8:54:20 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84022 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84023 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84024 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 84025 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84026 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84027 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84028 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84029 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84030 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 84031 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84032 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84033 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84034 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84035 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84036 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 04 84037 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84038 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84039 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84040 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84041 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84042 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 84043 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84044 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84046 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84045 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84047 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 84048 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84049 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84050 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84051 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84052 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84053 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84054 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84055 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84056 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84057 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84058 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84059 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84060 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84061 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84062 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84063 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84064 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84065 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84066 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84067 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84068 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84069 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84070 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84071 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84072 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84073 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84074 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84075 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84076 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84077 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84078 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84079 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84080 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84081 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84082 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84083 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84084 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84085 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84086 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84087 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84088 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84089 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84090 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84091 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84092 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84093 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84094 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84095 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84096 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84097 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84098 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84099 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84100 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84101 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84102 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84103 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84104 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84105 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84106 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84107 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84108 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84109 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84110 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84111 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84112 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84113 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84114 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84115 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84116 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84117 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84118 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84119 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84120 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84121 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84122 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84123 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84124 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84125 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84126 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84127 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84128 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84129 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84130 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84131 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84132 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84133 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84134 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84135 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84136 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84137 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84138 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84139 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84140 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84141 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84142 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84143 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84144 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84145 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84146 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84147 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84148 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84149 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84150 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84151 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84152 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84153 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84154 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84155 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84156 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84157 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84158 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84159 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84160 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84161 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84162 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84163 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84164 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84165 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84166 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84167 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84168 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84169 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84170 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84171 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84172 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 84173 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84174 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84175 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84176 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84177 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84178 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 84179 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84180 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84181 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84182 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 84183 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84184 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84185 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84186 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84187 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84188 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84189 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84190 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 14 84191 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84192 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84193 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84194 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84195 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84196 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 84197 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84198 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84199 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84200 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84201 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84202 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 84203 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84204 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84205 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84206 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84207 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84208 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84209 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84210 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84211 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84212 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84213 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84214 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84215 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84216 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84217 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84218 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84219 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84220 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84221 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84222 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84223 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84224 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84225 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84226 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84227 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84228 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84229 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84230 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84231 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84232 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84233 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84234 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84235 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84236 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84237 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84238 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84240 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84239 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84241 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84242 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84243 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84244 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84245 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84246 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84247 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84248 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84249 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84250 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84251 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84252 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84253 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84254 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84255 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84256 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84257 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84258 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84259 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84260 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84261 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84262 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84263 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84264 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84265 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84266 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84267 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84268 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84269 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84270 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84272 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84271 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84273 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84274 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84275 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84276 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84277 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84278 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84279 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84280 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84281 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84282 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84283 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84284 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84285 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84286 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84287 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84288 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84290 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84289 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84291 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84292 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84293 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84294 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84295 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84296 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84297 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84298 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84299 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84300 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84301 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84302 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84303 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84304 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84305 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84306 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84307 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84308 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84309 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84310 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84311 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84312 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84313 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84314 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84315 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84316 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84317 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84318 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84319 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84320 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84321 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84322 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84323 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84324 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84325 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84326 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 84327 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84328 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84329 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84330 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84331 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84332 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 84333 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84334 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84335 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84336 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84337 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84338 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 84339 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84340 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84341 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84342 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84343 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84344 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 04 84345 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84346 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84347 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84348 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84349 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84350 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: D0 84351 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84352 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84354 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84353 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84355 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84356 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 84357 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84358 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84359 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84360 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84361 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84362 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84363 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84364 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84365 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84366 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84367 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84368 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84369 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84370 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84371 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84372 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84373 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84374 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84375 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84376 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84377 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84378 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84379 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84380 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84381 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84382 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84383 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84384 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84385 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84386 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84387 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84388 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84389 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84390 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84391 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84392 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84393 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84394 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84395 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84396 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84397 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84398 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84399 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84400 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84401 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84402 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84403 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84404 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84405 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84406 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84407 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84408 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84409 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84410 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84411 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84412 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84413 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84414 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84415 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84416 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84417 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84418 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84419 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84420 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84421 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84422 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84423 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84424 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84425 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84426 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84427 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84428 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84429 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84430 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84431 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84432 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84433 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84434 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84435 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84436 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84437 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84438 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84439 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84440 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84441 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84442 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84443 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84444 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84445 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84446 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84448 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84447 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84449 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84450 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84451 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84452 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84453 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84454 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84455 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84456 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84457 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84458 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84459 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84460 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84461 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84462 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84463 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84464 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84465 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84466 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84467 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84468 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84469 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84470 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84471 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84472 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84473 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84474 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84475 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84476 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84477 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84478 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84479 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84480 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 84481 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84482 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84483 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84484 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84485 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84486 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 84487 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84488 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84489 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84490 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84491 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84492 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 84493 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84494 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84495 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84496 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84497 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84498 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 14 84499 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84500 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84501 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84502 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84503 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84504 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: D0 84505 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84506 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84507 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84508 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84509 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84510 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 84511 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84512 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84513 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84514 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84515 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84516 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84517 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84518 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84519 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84520 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84521 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84522 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84523 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84524 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84525 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84526 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84527 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84528 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84529 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84530 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84531 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84532 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84533 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84534 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84535 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84536 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84537 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84538 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84539 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84540 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84541 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84542 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84543 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84544 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84545 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84546 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84547 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84548 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84549 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84550 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84551 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84552 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84553 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84554 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84555 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84556 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84557 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84558 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84559 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84560 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84561 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84562 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84563 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84564 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84565 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84566 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84567 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84568 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84569 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84570 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84571 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84572 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84573 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84574 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84575 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84576 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84577 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84578 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84579 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84580 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84581 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84582 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84583 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84584 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84585 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84586 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84587 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84588 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84589 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84590 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84591 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84592 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84593 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84594 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84595 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84596 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84597 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84598 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84599 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84600 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84601 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84602 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84603 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84604 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84605 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 84606 8:54:22 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 84607 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84608 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 84609 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 84610 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84611 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84612 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84613 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84614 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84615 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84616 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84617 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84618 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84619 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84620 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84621 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84622 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84623 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84624 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84625 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84626 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84627 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84628 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84629 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84630 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 84631 8:54:22 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90952 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90953 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90954 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 90955 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90956 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90957 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90958 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 90959 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90960 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 90961 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90962 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90963 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 90964 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90965 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90966 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 16 90967 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90968 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90969 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 90970 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90971 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90972 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 90973 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90974 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90975 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 90976 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90977 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90978 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 90979 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90980 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90981 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 90982 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90983 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90984 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 90985 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90986 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90987 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 90988 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90989 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90990 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 90991 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90992 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90993 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 90994 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90995 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 90996 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 90997 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 90998 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 90999 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91000 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91001 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91002 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91003 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91004 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91005 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91006 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91007 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91008 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91009 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91010 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91011 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91012 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91013 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91014 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91015 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91016 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91017 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91018 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91019 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91020 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91021 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91022 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91023 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91024 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91025 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91026 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91027 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91028 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91029 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91030 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91031 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91032 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91033 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91034 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91035 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91036 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91037 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91038 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91039 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91040 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91041 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91042 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91043 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91044 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91045 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91046 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91047 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91048 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91049 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91050 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91051 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91052 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91053 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91054 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91055 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91056 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91057 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91058 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91059 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91060 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91061 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91062 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91063 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91064 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91065 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91066 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91067 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91068 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91069 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91070 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91071 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91072 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91073 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91074 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91075 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91076 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91077 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91078 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91079 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91080 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91081 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91082 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91083 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91084 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91085 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91086 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91087 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91088 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91089 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91090 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91091 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91092 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91093 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91094 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91095 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91096 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91097 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91098 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91099 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91100 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91101 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91102 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 91103 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91104 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91105 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91106 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91107 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91108 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 91109 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91110 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91111 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91112 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91113 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91114 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 91115 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91116 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91117 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91118 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91119 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91120 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 91121 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91122 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91123 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91124 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91125 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91126 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 91127 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91128 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91129 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91130 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91131 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91132 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 91133 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91134 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91135 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91136 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91137 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91138 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91139 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91140 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91141 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91142 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91143 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91144 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91145 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91146 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91147 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91148 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91149 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91150 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91151 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91152 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91153 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91154 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91155 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91156 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91157 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91158 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91159 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91160 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91161 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91162 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91163 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91164 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91165 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91166 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91167 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91168 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91169 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91170 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91171 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91172 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91173 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91174 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91175 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91176 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91177 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91178 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91179 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91180 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91181 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91182 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91183 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91184 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91185 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91186 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91187 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91188 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91189 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91190 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91191 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91192 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91193 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91194 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91195 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91196 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91197 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91198 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91199 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91200 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91201 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91202 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91203 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91204 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91205 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91206 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91207 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91208 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91209 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91210 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91211 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91212 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91213 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91214 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91215 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91216 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91217 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91218 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91219 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91220 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91221 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91222 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91223 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91224 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91225 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91226 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91227 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91228 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91229 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91230 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91231 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91232 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91233 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91234 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91235 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91236 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91237 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91238 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91239 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91240 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91241 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91242 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91243 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91244 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91245 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91246 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91247 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91248 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91249 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91250 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91251 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91252 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91253 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91254 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91255 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91256 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 91257 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91258 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91259 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91260 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91261 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91262 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 91263 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91264 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91265 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91266 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91267 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 91268 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91269 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91270 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91271 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91272 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91273 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91274 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 16 91275 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91276 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91277 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91278 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91279 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91280 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 91281 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91282 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91283 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91284 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91285 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91286 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 91287 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91288 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91289 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91290 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91291 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91292 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91293 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91294 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91295 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91296 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91297 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91298 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91299 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91300 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91301 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91302 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91303 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91304 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91305 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91306 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91307 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91308 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91309 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91310 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91311 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91312 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91313 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91314 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91315 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91316 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91317 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91318 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91319 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91320 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91321 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91322 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91323 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91324 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91325 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91326 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91327 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91328 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91329 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91330 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91331 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91332 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91333 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91334 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91335 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91336 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91337 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91338 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91339 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91340 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91341 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91342 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91343 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91344 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91345 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91346 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91347 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91348 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91349 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91350 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91351 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91352 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91353 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91354 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91355 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91356 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91357 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91358 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91359 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91360 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91361 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91362 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91363 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91364 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91365 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91366 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91367 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91368 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91369 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91370 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91371 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91372 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91373 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91374 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91375 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91376 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91377 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91378 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91379 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91380 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91381 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91382 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91383 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91384 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91385 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91386 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91387 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91388 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91389 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91390 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91391 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91392 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91393 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91394 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91395 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91396 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91397 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91398 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91399 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91400 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91401 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91402 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91403 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91404 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91405 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91406 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91407 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91408 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91409 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91410 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 91411 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91412 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91413 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91414 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91415 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91416 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 91417 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91418 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91419 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91420 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 91421 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91422 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91423 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91424 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91425 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91426 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 91427 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91428 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91429 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91430 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91431 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91432 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91433 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91434 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 91435 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91436 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91437 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91438 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91439 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91440 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 91441 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91442 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91443 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91444 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91445 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91446 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91447 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91448 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91449 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91450 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91451 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91452 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91453 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91454 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91455 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91456 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91457 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91458 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91459 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91460 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91461 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91462 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91463 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91464 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91465 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91466 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91467 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91468 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91469 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91470 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91472 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91471 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91473 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91474 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91475 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91476 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91477 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91478 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91479 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91480 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91481 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91482 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91483 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91484 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91485 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91486 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91487 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91488 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91489 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91490 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91491 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91492 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91493 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91494 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91495 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91496 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91497 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91498 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91499 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91500 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91501 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91502 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91503 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91504 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91505 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91506 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91507 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91508 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91509 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91510 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91511 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91512 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91513 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91514 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91515 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91516 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91517 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91518 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91519 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91520 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91521 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91522 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91523 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91524 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91525 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91526 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91528 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91527 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91529 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91530 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91531 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91532 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91533 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91534 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91535 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 91536 8:54:24 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 91537 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91538 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 91539 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 91540 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91541 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91542 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91543 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91544 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91545 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91546 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91547 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91548 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91549 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91550 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91551 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91552 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91553 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91554 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91555 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91556 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91557 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91558 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91559 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91560 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 91561 8:54:24 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94705 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94706 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94707 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94708 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94709 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94710 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94711 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94712 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94713 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94714 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94715 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94716 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94717 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94718 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94719 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94720 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94721 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94722 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94723 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94724 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94725 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94726 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94727 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94728 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94729 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94730 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94731 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94732 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94733 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94734 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94735 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94736 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94737 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94738 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94739 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94740 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94741 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94742 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94743 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94744 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94745 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94746 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94747 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94748 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94749 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94750 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94751 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94752 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94753 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94754 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94755 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94756 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94757 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94758 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94759 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94760 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94761 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94762 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94763 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94764 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94765 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94766 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94767 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94768 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94769 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94770 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94771 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94772 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94773 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94774 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94775 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94776 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94777 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94778 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94779 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94780 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94781 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94782 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94783 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94784 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94785 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94786 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94787 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94788 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94789 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94790 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94791 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94792 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94793 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94794 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94795 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94796 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94797 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94798 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 94799 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94800 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94801 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94802 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94803 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94804 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 94805 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94806 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94807 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94808 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94809 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94810 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 94811 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94812 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94813 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94814 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94815 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94816 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 94817 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94818 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94819 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94820 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94821 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94822 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 94823 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94824 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94825 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94826 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94827 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94828 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 94829 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94830 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94831 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94832 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94833 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94834 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94835 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94836 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94837 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94838 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94839 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94840 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94841 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94842 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94843 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94844 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94845 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94846 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94847 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94848 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94849 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94850 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94851 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94852 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94853 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94854 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94855 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94856 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94857 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94858 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94859 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94860 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94861 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94862 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94863 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94864 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94865 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94866 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94867 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94868 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94869 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94870 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94871 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94872 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94873 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94874 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94875 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94876 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94877 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94878 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94879 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94880 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94881 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94882 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94883 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94884 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94885 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94886 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94887 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94888 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94889 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94890 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94891 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94892 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94893 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94894 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94895 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94896 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94897 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94898 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94899 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94900 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94901 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94902 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94903 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94904 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94905 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94906 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94907 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94908 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94909 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94910 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94911 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94912 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94913 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94914 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94915 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94916 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94917 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94918 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94919 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94920 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94921 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94922 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94923 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94924 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94925 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94926 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94927 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94928 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94929 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94930 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94931 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94932 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94933 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94934 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94935 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94936 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94937 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94938 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94939 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94940 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94941 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94942 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94943 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94944 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94945 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94946 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94947 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94948 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94949 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94950 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94951 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94952 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 94953 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94954 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94955 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94956 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94957 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94958 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 94959 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94960 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94961 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94962 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94963 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94964 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 94965 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94966 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94967 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94968 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94969 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94970 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 16 94971 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94972 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94973 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94974 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94975 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94976 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: F0 94977 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94978 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94979 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94980 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94981 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94982 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 94983 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94984 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94985 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94986 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94987 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94988 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94989 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94990 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94991 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94992 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94993 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 94994 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 94995 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94996 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 94997 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 94998 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 94999 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95000 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95001 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95002 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95003 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95004 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95005 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95006 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95007 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95008 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95009 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95010 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95011 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95012 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95013 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95014 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95015 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95016 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95017 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95018 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95019 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95020 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95021 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95022 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95023 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95024 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95025 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95026 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95027 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95028 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95029 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95030 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95031 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95032 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95033 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95034 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95035 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95036 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95037 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95038 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95039 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95040 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95041 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95042 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95043 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95044 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95045 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95046 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95047 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95048 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95049 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95050 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95051 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95052 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95053 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95054 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95055 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95056 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95057 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95058 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95059 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95060 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95061 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95062 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95063 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95064 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95065 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95066 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95067 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95068 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95069 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95070 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95071 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95072 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95073 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95074 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95075 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95076 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95077 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95078 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95079 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95080 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95081 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95082 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95083 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95084 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95085 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95086 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95087 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95088 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95089 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95090 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95091 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95092 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95093 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95094 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95095 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95096 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95097 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95098 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95099 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95100 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95101 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95102 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95103 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95104 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95105 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95106 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 95107 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95108 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95109 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95110 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95111 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95112 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 95113 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95114 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95115 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95116 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 95117 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95118 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95119 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95120 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95121 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95122 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95123 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95124 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 07 95125 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95126 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95127 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95128 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95129 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95130 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 95131 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95132 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95133 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95134 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95135 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95136 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 95137 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95138 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95139 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95140 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95141 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95142 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95143 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95144 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95145 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95146 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95147 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95148 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95149 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95150 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95151 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95152 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95153 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95154 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95155 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95156 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95157 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95158 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95159 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95160 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95161 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95162 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95163 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95164 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95165 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95166 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95167 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95168 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95169 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95170 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95171 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95172 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95173 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95174 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95175 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95176 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95177 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95178 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95179 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95180 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95181 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95182 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95183 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95184 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95185 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95186 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95187 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95188 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95189 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95190 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95191 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95192 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95193 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95194 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95195 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95196 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95197 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95198 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95199 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95200 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95201 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95202 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95203 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95204 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95205 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95206 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95207 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95208 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95209 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95210 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95211 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95212 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95213 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95214 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95215 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95216 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95217 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95218 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95219 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95220 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95221 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95222 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95223 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95224 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95225 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95226 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95227 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95228 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95229 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95230 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95231 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95232 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95233 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95234 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95235 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95236 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95237 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95238 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95239 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95240 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95241 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95242 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95243 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95244 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95245 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95246 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95247 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95248 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95249 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95250 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95251 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95252 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95253 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95254 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95255 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95256 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95257 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95258 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95259 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95260 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 95261 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95262 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95263 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95264 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95265 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95266 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 95267 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95269 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95268 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95270 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95271 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95272 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 95273 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95274 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95275 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95276 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95277 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95278 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 17 95279 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95280 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95281 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95282 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95283 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95284 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 00 95285 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95286 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95287 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95288 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95289 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95290 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 95291 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95292 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95293 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95294 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95295 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95296 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95297 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95298 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95299 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95300 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95301 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95302 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95303 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95304 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95305 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95306 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95307 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95308 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 95309 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95310 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 95311 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 95312 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 95313 8:54:25 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 95314 8:54:25 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101665 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101666 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101667 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101668 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101669 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101670 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101671 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101672 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101673 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101674 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101675 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101676 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101677 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101678 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101679 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101680 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101681 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101682 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101683 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101684 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101685 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101686 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101687 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101688 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101689 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101690 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101691 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101692 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101693 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101694 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101695 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101696 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101697 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101698 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101699 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101700 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101701 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101702 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101703 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101704 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101705 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101706 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101707 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101708 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101709 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101710 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101711 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101712 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101713 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101714 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101715 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101716 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101717 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101718 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101719 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101720 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101721 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101722 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101723 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101724 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101725 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101726 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101727 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101728 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 101729 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101730 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101731 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101732 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101733 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101734 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 101735 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101736 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101737 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101738 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101739 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101740 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 101741 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101742 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101743 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101744 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101745 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101746 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 18 101747 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101748 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101749 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101750 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101751 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101752 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 50 101753 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101754 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101755 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101756 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101757 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101758 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 101759 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101760 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101761 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101762 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101763 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101764 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101765 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101766 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101767 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101768 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101769 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101770 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101771 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101772 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101773 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101774 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101775 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101776 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101777 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101778 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101779 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101780 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101781 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101782 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101783 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101784 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101785 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101786 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101787 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101788 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101789 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101790 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101791 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101792 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101793 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101794 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101795 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101796 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101797 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101798 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101799 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101800 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101801 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101802 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101803 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101804 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101805 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101806 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101807 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101808 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101809 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101810 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101811 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101812 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101813 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101814 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101815 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101816 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101817 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101818 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101819 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101820 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101821 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101822 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101823 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101824 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101825 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101826 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101827 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101828 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101829 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101830 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101831 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101832 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101833 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101834 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101835 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101836 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101837 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101838 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101839 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101840 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101841 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101842 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101843 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101844 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101845 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101846 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101847 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101848 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101849 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101850 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101851 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101852 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101853 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101854 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101855 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101856 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101857 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101858 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101859 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101860 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101861 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101862 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101863 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101864 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101865 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101866 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101867 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101868 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101869 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101870 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101871 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101872 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101873 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101874 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101875 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101876 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101877 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101878 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101879 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101881 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101880 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101882 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 101883 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101884 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101885 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101886 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101887 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101888 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 101889 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101890 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101891 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101892 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101893 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101894 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 101895 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101896 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101897 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101898 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101899 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101900 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 08 101901 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101902 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101903 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101904 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101905 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101906 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 101907 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101908 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101909 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101910 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101911 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101912 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 101913 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101914 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101915 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101916 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101917 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101918 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101919 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101920 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101921 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101922 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101923 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101924 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101925 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101926 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101927 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101928 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101929 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101930 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101931 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101932 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101933 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101934 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101935 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101936 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101937 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101938 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101939 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101940 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101941 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101942 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101943 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101944 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101945 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101946 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101947 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101948 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101949 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101950 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101951 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101952 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101953 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101954 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101955 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101956 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101957 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101958 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101959 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101960 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101961 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101962 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101963 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101964 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101965 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101966 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101967 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101968 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101969 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101970 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101971 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101972 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101973 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101974 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101975 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101976 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101977 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101978 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101979 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101980 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101981 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101982 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101983 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101984 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101985 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101986 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101987 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101988 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101989 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101990 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101991 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101992 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101993 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 101994 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101995 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 101996 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 101997 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 101998 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 101999 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102000 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102001 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102002 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102003 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102004 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102005 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102006 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102007 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102008 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102009 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102010 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102011 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102012 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102013 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102014 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102015 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102016 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102017 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102018 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102019 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102020 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102021 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102022 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102023 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102024 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102025 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102026 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102027 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102028 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102029 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102030 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102031 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102032 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102033 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102035 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102034 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102036 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 102037 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102038 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102039 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102040 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102041 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102042 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 102043 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102044 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102045 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102046 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102047 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102048 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 102049 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102050 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102051 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102052 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102053 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102054 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 18 102055 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102056 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102057 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102058 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102059 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102060 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 60 102061 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102062 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102063 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102064 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102065 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102066 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 102067 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102068 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102069 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102070 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102071 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102072 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102073 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102074 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102075 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102076 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102077 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102078 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102079 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102080 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102081 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102082 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102083 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102084 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102085 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102086 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102087 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102088 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102089 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102090 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102091 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102092 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102093 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102094 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102095 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102096 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102097 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102098 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102099 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102100 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102101 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102102 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102103 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102104 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102105 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102106 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102107 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102108 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102109 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102110 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102111 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102112 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102113 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102114 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102115 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102116 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102117 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102118 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102119 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102120 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102121 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102122 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102123 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102124 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102125 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102126 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102127 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102128 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102129 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102130 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102131 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102132 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102133 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102134 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102135 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102136 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102137 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102138 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102139 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102140 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102141 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102142 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102143 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102144 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102145 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102146 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102147 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102148 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102149 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102150 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102151 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102152 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102153 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102154 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102155 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102156 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102157 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102158 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102159 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102160 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102161 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102162 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102163 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102164 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102165 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102166 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102167 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102168 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102169 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102170 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102171 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102172 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102173 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102174 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102175 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102176 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102177 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102178 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102179 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102180 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102181 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102182 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102183 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102184 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102185 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102186 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102187 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102188 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102189 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102190 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 102191 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102192 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102193 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102194 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102195 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102196 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 102197 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102198 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102199 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102200 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102201 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102202 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 102203 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102204 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102205 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102206 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102207 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102208 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 08 102209 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102210 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102212 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102211 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102213 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102214 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 70 102215 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102216 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102217 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102218 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102219 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102220 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 102221 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102222 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102223 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102224 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102225 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102226 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102227 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102228 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102229 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102230 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102231 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102232 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102233 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102234 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102235 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102236 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102237 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102238 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102239 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102240 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102241 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102242 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102243 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102244 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102245 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102246 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102247 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102248 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102249 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102250 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102251 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102252 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102253 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102254 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102255 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102256 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102257 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102258 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102259 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102260 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102261 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102262 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102263 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102264 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102265 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102266 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102267 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102268 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 102269 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102270 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 102271 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 102272 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 102273 8:54:27 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 102274 8:54:27 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108655 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108657 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108656 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108658 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 108659 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108660 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108661 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108662 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108663 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108664 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 108665 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108666 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108667 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108668 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108669 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108670 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 108671 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108672 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108673 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108674 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108675 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108676 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 09 108677 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108678 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108679 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108680 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108681 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108682 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 108683 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108684 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108685 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108686 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108687 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108688 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 108689 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108690 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108692 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108691 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108693 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108694 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108695 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108696 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108697 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108698 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108699 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108700 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108701 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108702 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108703 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108704 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108705 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108706 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108707 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108708 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108709 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108710 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108711 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108712 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108713 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108714 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108715 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108716 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108717 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108718 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108719 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108720 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108721 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108722 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108723 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108724 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108725 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108726 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108727 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108728 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108729 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108730 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108731 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108732 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108733 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108734 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108735 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108736 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108737 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108738 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108739 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108740 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108741 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108742 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108743 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108744 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108745 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108746 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108747 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108748 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108749 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108750 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108751 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108752 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108753 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108754 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108755 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108756 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108757 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108758 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108759 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108760 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108761 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108762 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108763 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108764 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108765 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108766 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108767 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108768 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108769 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108770 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108771 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108772 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108773 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108774 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108775 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108776 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108777 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108778 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108779 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108780 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108781 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108782 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108783 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108784 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108785 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108786 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108787 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108788 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108789 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108790 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108791 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108792 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108793 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108794 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108795 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108796 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108797 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108798 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108799 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108800 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108801 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108802 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108803 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108804 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108805 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108806 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108807 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108808 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108809 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108810 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108811 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108812 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 108813 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108814 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108815 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108816 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108817 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108818 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 108819 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108820 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108821 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108822 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 108823 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108824 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108825 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108826 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108827 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108828 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108829 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108830 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 19 108831 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108832 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108833 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108834 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108835 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108836 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: C0 108837 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108838 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108839 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108840 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108841 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108842 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 108843 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108844 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108845 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108846 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108847 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108848 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108849 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108850 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108851 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108852 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108853 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108854 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108855 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108856 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108857 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108858 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108859 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108860 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108861 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108862 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108863 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108864 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108865 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108866 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108867 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108868 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108869 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108870 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108871 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108872 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108873 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108875 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108874 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108876 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108877 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108878 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108879 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108880 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108881 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108882 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108883 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108884 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108885 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108886 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108887 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108888 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108889 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108890 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108891 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108892 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108893 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108894 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108895 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108896 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108897 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108898 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108899 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108900 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108901 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108902 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108903 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108904 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108905 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108906 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108907 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108908 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108909 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108910 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108911 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108912 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108913 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108914 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108915 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108916 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108917 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108918 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108919 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108920 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108922 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108921 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108923 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108924 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108925 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108926 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108927 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108928 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108929 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108930 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108931 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108932 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108933 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108934 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108935 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108936 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108937 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108938 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 108939 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108940 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108941 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108942 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108943 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108944 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108945 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108946 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108947 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108948 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108949 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108950 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108951 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108952 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108953 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108954 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108955 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108956 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108957 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108958 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108959 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108960 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108961 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108962 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108963 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108964 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108965 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108966 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 108967 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108968 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108969 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108970 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108971 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108972 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 108973 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108974 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108975 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108976 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 108977 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108978 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108979 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108980 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108981 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108982 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108983 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108984 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 09 108985 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108986 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108987 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108988 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108989 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108990 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: D0 108991 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108992 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108993 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 108994 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108995 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 108996 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 108997 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 108998 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 108999 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109000 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109001 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109002 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109003 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109004 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109005 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109006 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109007 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109008 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109009 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109010 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109011 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109012 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109013 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109014 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109015 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109016 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109017 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109018 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109019 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109020 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109021 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109022 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109023 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109024 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109025 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109026 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109027 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109028 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109029 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109030 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109031 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109032 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109033 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109034 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109035 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109036 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109037 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109038 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109039 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109040 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109041 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109042 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109043 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109044 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109045 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109046 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109047 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109048 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109049 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109050 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109051 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109052 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109053 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109054 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109055 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109056 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109057 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109058 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109059 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109060 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109061 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109062 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109063 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109064 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109065 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109066 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109067 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109068 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109069 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109070 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109071 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109072 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109073 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109074 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109075 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109076 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109077 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109078 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109079 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109080 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109081 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109082 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109083 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109084 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109085 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109086 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109087 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109088 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109089 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109090 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109091 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109092 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109093 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109094 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109095 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109096 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109097 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109098 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109099 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109100 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109101 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109102 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109103 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109104 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109105 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109106 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109107 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109108 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109109 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109110 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109111 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109112 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109113 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109114 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109115 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109116 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109117 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109118 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109119 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109120 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 109121 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109122 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109123 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109124 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109125 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109126 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 109127 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109128 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109129 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109130 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109131 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109132 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 109133 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109134 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109135 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109136 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109137 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109138 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 19 109139 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109140 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109141 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109142 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109143 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109144 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: D0 109145 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109146 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109147 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109148 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109149 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109150 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 109151 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109152 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109153 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109154 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109155 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109156 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109157 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109158 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109159 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109160 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109161 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109162 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109163 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109164 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109165 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109166 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109167 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109168 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109169 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109170 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109171 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109172 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109173 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109174 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109175 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109176 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109177 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109178 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109179 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109180 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109181 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109182 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109183 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109184 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109185 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109186 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109187 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109188 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109189 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109190 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109191 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109192 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109193 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109194 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109196 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109195 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109197 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109198 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109199 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109200 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109201 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109202 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109203 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109204 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109205 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109206 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109207 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109208 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109209 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109210 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109211 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109212 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109213 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109214 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109215 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109216 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109217 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109218 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109219 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109220 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109221 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109222 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109223 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109224 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109225 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109226 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109227 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109228 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109229 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109230 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109231 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109232 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109233 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109234 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109235 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109236 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109237 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109238 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109239 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109240 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109241 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109242 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109243 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109244 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 109245 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 109246 8:54:29 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 109247 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109248 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 109249 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 109250 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109251 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109252 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109253 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109254 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109255 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109256 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109257 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109258 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109259 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109260 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109261 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109262 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109263 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109264 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 109265 8:54:29 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 115592 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115593 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115594 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 115595 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115596 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115597 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115598 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115599 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115600 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 115601 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115602 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115603 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115604 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115605 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115606 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 1B 115607 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115609 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115608 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115610 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115611 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115612 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 20 115613 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115614 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115615 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115616 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115617 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115618 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 115619 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115620 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115621 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115622 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115623 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115624 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115625 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115626 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115627 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115628 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115629 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115630 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115631 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115632 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115633 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115634 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115635 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115636 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115637 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115638 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115639 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115640 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115641 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115642 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115643 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115644 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115645 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115646 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115647 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115648 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115649 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115650 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115651 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115652 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115653 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115654 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115655 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115656 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115657 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115658 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115659 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115660 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115661 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115662 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115663 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115664 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115665 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115666 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115667 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115668 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115669 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115670 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115671 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115672 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115673 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115674 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115675 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115676 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115677 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115678 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115679 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115680 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115681 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115682 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115683 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115684 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115685 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115686 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115687 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115688 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115689 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115690 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115691 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115692 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115693 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115694 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115695 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115696 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115697 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115698 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115699 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115700 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115701 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115702 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115703 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115704 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115705 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115706 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115707 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115708 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115709 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115710 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115711 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115712 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115713 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115714 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115715 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115716 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115717 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115718 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115719 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115720 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115721 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115722 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115723 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115724 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115725 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115726 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115727 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115728 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115729 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115730 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115731 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115732 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115733 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115734 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115735 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115736 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115737 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115738 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115739 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115740 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115741 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115742 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 115743 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115744 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115745 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115746 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115747 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115748 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 115749 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115750 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115751 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115752 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 115753 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115754 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115755 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115756 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115757 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115758 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115759 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115760 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 0B 115761 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115762 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115763 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115764 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115765 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115766 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 115767 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115768 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115769 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115770 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115771 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115772 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 115773 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115774 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115775 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115776 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115777 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115778 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115779 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115780 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115781 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115782 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115783 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115784 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115785 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115786 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115787 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115788 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115789 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115790 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115791 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115792 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115793 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115794 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115795 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115796 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115797 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115798 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115799 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115800 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115801 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115802 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115803 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115804 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115805 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115806 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115807 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115808 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115809 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115810 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115811 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115812 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115813 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115814 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115815 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115816 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115818 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115817 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115819 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115820 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115821 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115822 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115823 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115824 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115825 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115826 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115827 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115828 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115829 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115830 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115831 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115832 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115833 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115834 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115835 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115836 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115837 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115838 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115839 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115840 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115841 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115842 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115843 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115844 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115845 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115846 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115847 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115848 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115849 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115850 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115851 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115852 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115853 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115854 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115855 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115856 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115857 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115858 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115859 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115860 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115861 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115862 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115863 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115864 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115865 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115866 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115867 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115868 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115869 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115870 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115871 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115872 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115873 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115874 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115875 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115876 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115877 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115878 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115879 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115880 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115881 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115882 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115883 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115884 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115885 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115886 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115887 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115888 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115889 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115890 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115891 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115892 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115893 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115894 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115895 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115896 8:54:31 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 115897 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115898 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115899 8:54:31 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115900 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115901 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115902 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 115903 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115904 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115905 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115906 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115907 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115908 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 115909 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115910 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115911 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115912 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115913 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115914 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 1B 115915 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115916 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115917 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115918 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115919 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115920 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 30 115921 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115922 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115923 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115924 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115925 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115926 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 115928 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115927 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115929 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115930 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115931 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115932 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115933 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115934 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115935 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115936 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115937 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115938 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115939 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115940 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115941 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115942 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115943 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115944 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115945 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115946 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115947 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115948 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115949 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115950 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115951 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115952 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115953 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115954 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115955 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115956 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115957 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115958 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115959 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115960 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115961 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115962 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115963 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115964 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115965 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115966 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115967 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115968 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115969 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115970 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115971 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115972 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115973 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115974 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115975 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115976 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115977 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115978 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115979 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115980 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115981 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115982 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115983 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115984 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115985 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115986 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115987 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115988 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115989 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115990 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115991 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115992 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115993 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115994 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 115995 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 115996 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 115997 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 115998 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 115999 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116000 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116001 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116002 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116003 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116004 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116005 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116006 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116007 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116008 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116009 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116010 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116011 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116012 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116013 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116014 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116015 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116016 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116017 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116018 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116019 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116020 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116021 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116022 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116023 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116024 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116025 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116026 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116027 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116028 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116029 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116030 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116031 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116032 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116033 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116034 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116035 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116036 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116037 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116038 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116039 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116040 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116041 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116042 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116043 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116044 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116045 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116046 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116047 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116048 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116049 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116050 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_READ ProlificSerial0 SUCCESS Length 1: 06 116051 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116052 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116053 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116054 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116055 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116056 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 06 116057 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116058 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116059 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116060 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116061 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116062 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 58 116063 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116064 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116065 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116066 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116067 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116068 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 0B 116069 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116070 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116071 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116072 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116073 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116074 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 40 116075 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116076 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116077 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116078 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116079 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116080 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: 10 116081 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116082 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116083 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116084 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116085 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116086 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116087 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116088 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116089 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116090 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116091 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116092 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116093 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116094 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116095 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116096 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116097 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116098 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116099 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116100 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116101 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116102 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116103 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116104 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116105 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116106 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116107 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116108 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116109 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116110 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116111 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116112 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116113 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116114 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116115 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116116 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116117 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116118 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116119 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116120 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116121 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116122 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116123 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116124 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116125 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116126 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116127 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116128 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116129 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116130 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116131 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116132 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116133 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116134 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116135 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116136 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116137 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116138 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116139 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116140 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116141 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116142 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116143 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116144 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116145 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116146 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116147 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116148 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116149 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116150 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116151 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116152 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116153 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116154 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116155 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116156 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116157 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116158 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116159 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116160 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116161 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116162 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116163 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116164 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116165 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116166 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116167 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116168 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116169 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116170 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116171 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116172 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116173 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116174 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116175 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_PROPERTIES ProlificSerial0 SUCCESS 116176 8:54:32 PM UV3BAND_E_CPS. IRP_MJ_WRITE ProlificSerial0 SUCCESS Length 1: FF 116177 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116178 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING 116179 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK ProlificSerial0 SUCCESS 116180 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116181 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116182 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116183 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116184 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116185 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116186 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116187 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116188 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116189 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116190 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116191 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116192 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116193 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116194 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116195 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116196 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116197 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116198 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116199 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116200 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_GET_COMMSTATUS ProlificSerial0 SUCCESS 116201 8:54:32 PM UV3BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK ProlificSerial0 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BRK ERR RING