SUDT ACCESSPORT LOG FILE - Monitor mode Monitor: COM1 Create Time: 2016-12-01, 21:46:23 Computer Name: ÐüB£µF System version: (Build 9200) # Time Duration (s) Process Request Port Result Data ( Hex ) 1 21:45:46.438 0.11645160 UV4BAND_E_CPS. IRP_MJ_CREATE COM1 SUCCESS Port Opened 2 21:45:46.563 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3 21:45:46.563 0.00012642 UV4BAND_E_CPS. IOCTL_SERIAL_SET_QUEUE_SIZE COM1 SUCCESS InSize: 1024, OutSize: 512 4 21:45:46.563 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 6 21:45:46.563 0.07577247 UV4BAND_E_CPS. IOCTL_SERIAL_SET_BAUD_RATE COM1 SUCCESS Baud Rate: 9600 7 21:45:46.563 0.07566107 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8 21:45:46.641 0.00044602 UV4BAND_E_CPS. IOCTL_SERIAL_CLR_RTS COM1 SUCCESS 10 21:45:46.641 0.00043536 UV4BAND_E_CPS. IOCTL_SERIAL_SET_DTR COM1 SUCCESS 11 21:45:46.641 0.01554410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12 21:45:46.641 0.00033699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_LINE_CONTROL COM1 SUCCESS StopBits: 1, Parity: No, DataBits: 8 13 21:45:46.641 0.00022202 UV4BAND_E_CPS. IOCTL_SERIAL_SET_CHARS COM1 SUCCESS EofChar: 0x1A, ErrorChar: 0x0, BreakChar: 0x0, EventChar: 0x0, XonChar: 0x11, XoffChar: 0x13 14 21:45:46.641 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_HANDFLOW COM1 SUCCESS ControlHandShake: 0x1, FlowReplace: 0x0, XonLimit: 256, XoffLimit: 256 15 21:45:46.641 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 16 21:45:46.641 0.00000158 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 17 21:45:46.656 0.00030025 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 55 18 21:45:46.656 0.00023427 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 20 19 21:45:46.656 0.00015170 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20 21:45:46.656 0.00006756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21 21:45:46.656 0.00007822 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22 21:45:46.656 0.00017383 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 16 23 21:45:46.656 0.00013353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 24 21:45:46.656 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 25 21:45:46.656 0.00009205 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 08 26 21:45:46.656 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 27 21:45:46.656 0.00014775 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 01 28 21:45:46.656 0.00010430 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 29 21:45:46.656 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 30 21:45:46.656 0.00020030 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: FF 31 21:45:46.656 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 32 21:45:46.656 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 33 21:45:46.656 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 34 21:45:46.656 0.00018765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 35 21:45:46.656 0.00010588 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: DC 36 21:45:46.656 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 37 21:45:46.656 0.00028563 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 02 38 21:45:46.656 0.00023230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 39 21:45:46.656 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 40 21:45:46.656 0.00881660 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 41 21:45:46.656 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 42 21:45:46.656 0.00910578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 43 21:45:46.672 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 44 21:45:46.672 0.00962450 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 45 21:45:46.672 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 46 21:45:46.672 0.01001837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 47 21:45:46.688 0.00009758 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 48 21:45:46.688 0.01009067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 49 21:45:46.703 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 50 21:45:46.703 0.00955971 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 51 21:45:46.703 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 52 21:45:46.703 0.01002232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 53 21:45:46.719 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 54 21:45:46.719 0.00994924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 55 21:45:46.735 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 56 21:45:46.735 0.00927882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 57 21:45:46.735 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 59 21:45:46.750 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 60 21:45:46.750 0.00988761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 61 21:45:46.766 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 62 21:45:46.766 0.01000178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 63 21:45:46.766 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 65 21:45:46.782 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 66 21:45:46.782 0.00955813 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 67 21:45:46.797 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 68 21:45:46.797 0.00985126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 69 21:45:46.797 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 70 21:45:46.797 0.01024474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 71 21:45:46.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 72 21:45:46.813 0.00936850 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 73 21:45:46.813 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 74 21:45:46.813 0.00984731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 75 21:45:46.828 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 76 21:45:46.828 0.00972168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 77 21:45:46.844 0.00018291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 78 21:45:46.844 0.00969719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 79 21:45:46.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 80 21:45:46.844 0.01003734 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 81 21:45:46.860 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 82 21:45:46.860 0.00957867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 83 21:45:46.876 0.00024810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 84 21:45:46.876 0.00931319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 85 21:45:46.876 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 86 21:45:46.876 0.01008356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 87 21:45:46.891 0.00012365 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 89 21:45:46.907 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 90 21:45:46.907 0.00968731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 91 21:45:46.907 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 92 21:45:46.907 0.01046440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 93 21:45:46.922 0.00009600 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 94 21:45:46.922 0.00909077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 95 21:45:46.922 0.00009956 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 96 21:45:46.922 0.00980030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 97 21:45:46.938 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 98 21:45:46.938 0.00950716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 99 21:45:46.954 0.00014578 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 100 21:45:46.954 0.00972524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 101 21:45:46.954 0.00010746 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 102 21:45:46.954 0.00997729 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 103 21:45:46.969 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 104 21:45:46.969 0.00961778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 105 21:45:46.985 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 106 21:45:46.985 0.01003260 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 107 21:45:46.985 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 108 21:45:46.985 0.01011358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 109 21:45:47.000 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 110 21:45:47.000 0.00937324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 111 21:45:47.016 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 112 21:45:47.016 0.00996741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 113 21:45:47.016 0.00018331 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 114 21:45:47.016 0.00946884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 115 21:45:47.031 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 116 21:45:47.031 0.00974973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 117 21:45:47.047 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 118 21:45:47.047 0.00999230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 120 21:45:47.047 0.00932346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 121 21:45:47.063 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 122 21:45:47.063 0.00976553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 123 21:45:47.063 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 124 21:45:47.063 0.01015704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 125 21:45:47.079 0.00025798 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 126 21:45:47.079 0.00914134 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 127 21:45:47.094 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 128 21:45:47.094 0.00976751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 129 21:45:47.094 0.00015407 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 130 21:45:47.094 0.01007961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 131 21:45:47.110 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 132 21:45:47.110 0.00928632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 133 21:45:47.126 0.00011694 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 134 21:45:47.126 0.00960553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 135 21:45:47.126 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 136 21:45:47.126 0.00975368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 137 21:45:47.141 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 138 21:45:47.141 0.00972998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 139 21:45:47.157 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 140 21:45:47.157 0.00115556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 141 21:45:47.157 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 142 21:45:47.157 0.00008889 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 143 21:45:47.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 144 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 145 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 146 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 07 147 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 04 148 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 149 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 150 21:45:47.157 0.00016948 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 151 21:45:47.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 152 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 153 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 154 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 155 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 156 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 157 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 158 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 02 159 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 160 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 161 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 02 162 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 07 163 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 164 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 165 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 166 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 167 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 168 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 56 169 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 170 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 171 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 172 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 173 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 174 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 04 175 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 176 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 177 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 04 178 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 08 179 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 180 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 181 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 182 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 183 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 184 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 185 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 186 21:45:47.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 09 187 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 188 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 189 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 190 21:45:47.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 191 21:45:47.157 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 192 21:45:47.157 0.00019437 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 193 21:45:47.157 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 194 21:45:47.157 0.00857561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 195 21:45:47.157 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 196 21:45:47.157 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 197 21:45:47.157 0.00505166 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 198 21:45:47.173 0.00029867 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 199 21:45:47.173 0.00014222 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 3D 200 21:45:47.173 0.00009719 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 201 21:45:47.173 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 202 21:45:47.173 0.00007230 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 203 21:45:47.173 0.00022321 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: F0 204 21:45:47.173 0.00012998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 205 21:45:47.173 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 206 21:45:47.173 0.00030380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 207 21:45:47.173 0.00036188 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 10 208 21:45:47.173 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 209 21:45:47.173 0.08903905 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 210 21:45:47.250 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 211 21:45:47.250 0.00069491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 212 21:45:47.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 213 21:45:47.250 0.00082291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 214 21:45:47.266 0.00008178 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 215 21:45:47.266 0.00091457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 216 21:45:47.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 217 21:45:47.266 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 218 21:45:47.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 219 21:45:47.266 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 220 21:45:47.266 0.00010746 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 221 21:45:47.266 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 222 21:45:47.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 223 21:45:47.266 0.00120336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 224 21:45:47.266 0.00008059 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 225 21:45:47.266 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 226 21:45:47.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 227 21:45:47.266 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 228 21:45:47.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 229 21:45:47.266 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 230 21:45:47.266 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 231 21:45:47.266 0.00141985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 232 21:45:47.266 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 233 21:45:47.266 0.00094499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 234 21:45:47.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 235 21:45:47.266 0.00127447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 236 21:45:47.281 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 237 21:45:47.281 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 238 21:45:47.281 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 239 21:45:47.281 0.00143170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 240 21:45:47.281 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 241 21:45:47.281 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 242 21:45:47.281 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 243 21:45:47.281 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 244 21:45:47.281 0.00003832 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 245 21:45:47.281 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 246 21:45:47.281 0.00007309 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 247 21:45:47.281 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 248 21:45:47.281 0.00002805 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 249 21:45:47.281 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 250 21:45:47.281 0.00010548 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 3D 251 21:45:47.281 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: F0 252 21:45:47.281 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 10 253 21:45:47.281 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 254 21:45:47.281 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 255 21:45:47.281 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 256 21:45:47.281 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 257 21:45:47.281 0.00009560 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 258 21:45:47.281 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 259 21:45:47.281 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 260 21:45:47.281 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 261 21:45:47.281 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 262 21:45:47.281 0.00003990 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 263 21:45:47.281 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 20 269 21:45:47.281 0.00013235 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 270 21:45:47.281 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 271 21:45:47.281 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 272 21:45:47.281 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 273 21:45:47.281 0.00000158 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 274 21:45:47.281 0.00189235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 275 21:45:47.281 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 276 21:45:47.281 0.00546845 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 277 21:45:47.297 0.00022874 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 278 21:45:47.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 279 21:45:47.297 0.00034370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 280 21:45:47.297 0.00014617 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 281 21:45:47.297 0.00020543 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 282 21:45:47.297 0.00012998 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 283 21:45:47.297 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 284 21:45:47.297 0.00013551 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 285 21:45:47.297 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 286 21:45:47.297 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 287 21:45:47.297 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 288 21:45:47.297 0.00572445 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 289 21:45:47.297 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 290 21:45:47.297 0.00098686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 291 21:45:47.297 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 292 21:45:47.297 0.00107496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 293 21:45:47.297 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 294 21:45:47.297 0.00110775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 295 21:45:47.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 296 21:45:47.297 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 297 21:45:47.297 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 298 21:45:47.297 0.00147319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 299 21:45:47.297 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 300 21:45:47.297 0.00118321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 301 21:45:47.297 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 302 21:45:47.297 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 303 21:45:47.312 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 304 21:45:47.312 0.00121126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 305 21:45:47.312 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 306 21:45:47.312 0.00141946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 307 21:45:47.312 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 308 21:45:47.312 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 309 21:45:47.312 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 310 21:45:47.312 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 311 21:45:47.312 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 312 21:45:47.312 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 313 21:45:47.312 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 314 21:45:47.312 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 315 21:45:47.312 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 316 21:45:47.312 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 317 21:45:47.312 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 318 21:45:47.312 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 319 21:45:47.312 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 320 21:45:47.312 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 321 21:45:47.312 0.00007783 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 322 21:45:47.312 0.00124128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 323 21:45:47.312 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 324 21:45:47.312 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 325 21:45:47.328 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 326 21:45:47.328 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 327 21:45:47.328 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 328 21:45:47.328 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 329 21:45:47.328 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 330 21:45:47.328 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 331 21:45:47.328 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 332 21:45:47.328 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 333 21:45:47.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 334 21:45:47.328 0.00145699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 335 21:45:47.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 336 21:45:47.328 0.00114963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 337 21:45:47.328 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 338 21:45:47.328 0.00138035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 339 21:45:47.328 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 340 21:45:47.328 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 341 21:45:47.328 0.00011180 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 342 21:45:47.328 0.00123575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 343 21:45:47.328 0.00008375 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 344 21:45:47.328 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 345 21:45:47.344 0.00008375 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 346 21:45:47.344 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 347 21:45:47.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 348 21:45:47.344 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 349 21:45:47.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 350 21:45:47.344 0.00139062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 351 21:45:47.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 352 21:45:47.344 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 353 21:45:47.344 0.00010351 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 354 21:45:47.344 0.00117610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 355 21:45:47.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 356 21:45:47.344 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 357 21:45:47.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 358 21:45:47.344 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 359 21:45:47.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 360 21:45:47.344 0.00135664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 361 21:45:47.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 362 21:45:47.344 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 363 21:45:47.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 364 21:45:47.344 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 365 21:45:47.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 366 21:45:47.344 0.00145106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 367 21:45:47.359 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 368 21:45:47.359 0.00145185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 369 21:45:47.359 0.00009877 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 370 21:45:47.359 0.00088849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 371 21:45:47.359 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 372 21:45:47.359 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 373 21:45:47.359 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 374 21:45:47.359 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 375 21:45:47.359 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 376 21:45:47.359 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 377 21:45:47.359 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 378 21:45:47.359 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 379 21:45:47.359 0.00006914 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 380 21:45:47.359 0.00117254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 381 21:45:47.359 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 382 21:45:47.359 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 383 21:45:47.359 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 384 21:45:47.359 0.00139417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 385 21:45:47.359 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 386 21:45:47.359 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 387 21:45:47.359 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 388 21:45:47.359 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 389 21:45:47.375 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 390 21:45:47.375 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 391 21:45:47.375 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 392 21:45:47.375 0.00126538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 393 21:45:47.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 394 21:45:47.375 0.00114449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 395 21:45:47.375 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 396 21:45:47.375 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 397 21:45:47.375 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 398 21:45:47.375 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 399 21:45:47.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 400 21:45:47.375 0.00140919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 401 21:45:47.375 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 402 21:45:47.375 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 403 21:45:47.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 404 21:45:47.375 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 405 21:45:47.375 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 406 21:45:47.375 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 407 21:45:47.375 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 408 21:45:47.375 0.00126222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 409 21:45:47.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 410 21:45:47.375 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 411 21:45:47.391 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 412 21:45:47.391 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 413 21:45:47.391 0.00010074 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 414 21:45:47.391 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 415 21:45:47.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 416 21:45:47.391 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 417 21:45:47.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 418 21:45:47.391 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 419 21:45:47.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 420 21:45:47.391 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 421 21:45:47.391 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 422 21:45:47.391 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 423 21:45:47.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 424 21:45:47.391 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 425 21:45:47.391 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 426 21:45:47.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 428 21:45:47.391 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 429 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 430 21:45:47.391 0.00005649 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 431 21:45:47.391 0.00006558 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 432 21:45:47.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 433 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 434 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 435 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 436 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 437 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 438 21:45:47.391 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 439 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 440 21:45:47.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 441 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 442 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 443 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 444 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 445 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 446 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 447 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 448 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 449 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 450 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 451 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 452 21:45:47.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 453 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 454 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 455 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 456 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 457 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 458 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 459 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 460 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 461 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 462 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 463 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 464 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 465 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 466 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 467 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 468 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 469 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 470 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 471 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 472 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 473 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 474 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 475 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 476 21:45:47.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 477 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 478 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 479 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 480 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 481 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 482 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 483 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 484 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 485 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 486 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 487 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 488 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 489 21:45:47.391 0.00002726 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 490 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 491 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 492 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 493 21:45:47.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 494 21:45:47.391 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 495 21:45:47.391 0.00016632 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 496 21:45:47.391 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 497 21:45:47.391 0.00196583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 498 21:45:47.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 499 21:45:47.391 0.00302775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 500 21:45:47.406 0.00025719 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 501 21:45:47.406 0.00014736 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 10 502 21:45:47.406 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 503 21:45:47.406 0.00015842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 504 21:45:47.406 0.00022005 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 505 21:45:47.406 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 506 21:45:47.406 0.00014262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 507 21:45:47.406 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 508 21:45:47.406 0.00027615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 509 21:45:47.406 0.00023230 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 510 21:45:47.406 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 511 21:45:47.406 0.00503309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 512 21:45:47.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 513 21:45:47.406 0.00083911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 514 21:45:47.406 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 515 21:45:47.406 0.00092326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 516 21:45:47.406 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 517 21:45:47.406 0.00103625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 518 21:45:47.406 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 519 21:45:47.406 0.00126894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 520 21:45:47.406 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 521 21:45:47.406 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 522 21:45:47.406 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 523 21:45:47.406 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 524 21:45:47.406 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 525 21:45:47.406 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 526 21:45:47.422 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 527 21:45:47.422 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 528 21:45:47.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 529 21:45:47.422 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 530 21:45:47.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 531 21:45:47.422 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 532 21:45:47.422 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 533 21:45:47.422 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 534 21:45:47.422 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 535 21:45:47.422 0.00123022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 536 21:45:47.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 537 21:45:47.422 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 538 21:45:47.422 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 539 21:45:47.422 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 540 21:45:47.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 541 21:45:47.422 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 542 21:45:47.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 543 21:45:47.422 0.00138272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 544 21:45:47.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 545 21:45:47.422 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 546 21:45:47.438 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 547 21:45:47.438 0.00135862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 548 21:45:47.438 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 549 21:45:47.438 0.00111249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 550 21:45:47.438 0.00007348 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 551 21:45:47.438 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 552 21:45:47.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 553 21:45:47.438 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 554 21:45:47.438 0.00012365 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 555 21:45:47.438 0.00120138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 556 21:45:47.438 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 557 21:45:47.438 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 558 21:45:47.438 0.00013788 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 559 21:45:47.438 0.00110262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 560 21:45:47.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 561 21:45:47.438 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 562 21:45:47.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 563 21:45:47.438 0.00122469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 564 21:45:47.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 565 21:45:47.438 0.00139496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 566 21:45:47.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 567 21:45:47.438 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 568 21:45:47.453 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 569 21:45:47.453 0.00136178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 570 21:45:47.453 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 571 21:45:47.453 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 572 21:45:47.453 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 573 21:45:47.453 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 574 21:45:47.453 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 575 21:45:47.453 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 576 21:45:47.453 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 577 21:45:47.453 0.00140603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 578 21:45:47.453 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 579 21:45:47.453 0.00108247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 580 21:45:47.453 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 581 21:45:47.453 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 582 21:45:47.453 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 583 21:45:47.453 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 584 21:45:47.453 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 585 21:45:47.453 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 586 21:45:47.453 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 587 21:45:47.453 0.00126499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 588 21:45:47.453 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 589 21:45:47.453 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 590 21:45:47.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 591 21:45:47.469 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 592 21:45:47.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 593 21:45:47.469 0.00142499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 594 21:45:47.469 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 595 21:45:47.469 0.00125274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 596 21:45:47.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 597 21:45:47.469 0.00127328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 598 21:45:47.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 599 21:45:47.469 0.00149531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 600 21:45:47.469 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 601 21:45:47.469 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 602 21:45:47.469 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 603 21:45:47.469 0.00113185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 604 21:45:47.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 605 21:45:47.469 0.00144079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 606 21:45:47.469 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 607 21:45:47.469 0.00114212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 608 21:45:47.469 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 609 21:45:47.469 0.00128869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 610 21:45:47.469 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 611 21:45:47.469 0.00147477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 612 21:45:47.485 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 613 21:45:47.485 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 614 21:45:47.485 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 615 21:45:47.485 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 616 21:45:47.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 617 21:45:47.485 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 618 21:45:47.485 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 619 21:45:47.485 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 620 21:45:47.485 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 621 21:45:47.485 0.00140444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 622 21:45:47.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 623 21:45:47.485 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 624 21:45:47.485 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 625 21:45:47.485 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 626 21:45:47.485 0.00006281 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 627 21:45:47.485 0.00142262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 628 21:45:47.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 629 21:45:47.485 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 630 21:45:47.485 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 632 21:45:47.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 633 21:45:47.485 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 634 21:45:47.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 635 21:45:47.500 0.00141432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 636 21:45:47.500 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 637 21:45:47.500 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 638 21:45:47.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 639 21:45:47.500 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 640 21:45:47.500 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 641 21:45:47.500 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 642 21:45:47.500 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 643 21:45:47.500 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 644 21:45:47.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 645 21:45:47.500 0.00155733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 646 21:45:47.500 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 647 21:45:47.500 0.00162133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 648 21:45:47.500 0.00003595 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 649 21:45:47.500 0.00006914 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 650 21:45:47.500 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 10 651 21:45:47.500 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 652 21:45:47.500 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 653 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 654 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 655 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 656 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 657 21:45:47.500 0.00002449 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 658 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 659 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 660 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 661 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 662 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 663 21:45:47.500 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 664 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 665 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 666 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 667 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 668 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 669 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 670 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 671 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 672 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 673 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 674 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 675 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 676 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 677 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 678 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 679 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 680 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 681 21:45:47.500 0.00004543 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 682 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 683 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 684 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 685 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 686 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 687 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 688 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 689 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 690 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 691 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 692 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 693 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 694 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 695 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 696 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 697 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 698 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 699 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 700 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 701 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 702 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 703 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 704 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 705 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 706 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 707 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 708 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 709 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 710 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 711 21:45:47.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 712 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 713 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 714 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 715 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 716 21:45:47.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 717 21:45:47.500 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 718 21:45:47.500 0.00019872 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 719 21:45:47.500 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 720 21:45:47.500 0.00199072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 721 21:45:47.500 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 722 21:45:47.500 0.00173748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 723 21:45:47.516 0.00024257 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 724 21:45:47.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 725 21:45:47.516 0.00030380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 726 21:45:47.516 0.00022795 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 727 21:45:47.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 728 21:45:47.516 0.00022361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 729 21:45:47.516 0.00019279 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 730 21:45:47.516 0.00021689 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 731 21:45:47.516 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 732 21:45:47.516 0.00018133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 733 21:45:47.516 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 734 21:45:47.516 0.00492682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 735 21:45:47.516 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 736 21:45:47.516 0.00101965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 737 21:45:47.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 738 21:45:47.516 0.00096474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 739 21:45:47.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 740 21:45:47.516 0.00103625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 741 21:45:47.516 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 742 21:45:47.516 0.00155378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 743 21:45:47.516 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 744 21:45:47.516 0.00102044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 745 21:45:47.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 746 21:45:47.516 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 747 21:45:47.516 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 748 21:45:47.516 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 749 21:45:47.532 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 750 21:45:47.532 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 751 21:45:47.532 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 752 21:45:47.532 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 753 21:45:47.532 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 754 21:45:47.532 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 755 21:45:47.532 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 756 21:45:47.532 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 757 21:45:47.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 758 21:45:47.532 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 759 21:45:47.532 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 760 21:45:47.532 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 761 21:45:47.532 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 762 21:45:47.532 0.00142815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 763 21:45:47.532 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 764 21:45:47.532 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 765 21:45:47.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 766 21:45:47.532 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 767 21:45:47.532 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 768 21:45:47.532 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 769 21:45:47.532 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 770 21:45:47.532 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 771 21:45:47.547 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 772 21:45:47.547 0.00120099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 773 21:45:47.547 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 774 21:45:47.547 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 775 21:45:47.547 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 776 21:45:47.547 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 777 21:45:47.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 778 21:45:47.547 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 779 21:45:47.547 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 780 21:45:47.547 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 781 21:45:47.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 782 21:45:47.547 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 783 21:45:47.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 784 21:45:47.547 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 785 21:45:47.547 0.00010469 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 786 21:45:47.547 0.00141195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 787 21:45:47.547 0.00007625 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 788 21:45:47.547 0.00113422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 789 21:45:47.547 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 790 21:45:47.547 0.00139496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 791 21:45:47.563 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 792 21:45:47.563 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 793 21:45:47.563 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 794 21:45:47.563 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 795 21:45:47.563 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 796 21:45:47.563 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 797 21:45:47.563 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 798 21:45:47.563 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 799 21:45:47.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 800 21:45:47.563 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 801 21:45:47.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 802 21:45:47.563 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 803 21:45:47.563 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 804 21:45:47.563 0.00141393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 805 21:45:47.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 806 21:45:47.563 0.00128000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 807 21:45:47.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 808 21:45:47.563 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 809 21:45:47.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 810 21:45:47.563 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 811 21:45:47.563 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 812 21:45:47.563 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 813 21:45:47.578 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 814 21:45:47.578 0.00124603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 815 21:45:47.578 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 816 21:45:47.578 0.00138074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 817 21:45:47.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 818 21:45:47.578 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 819 21:45:47.578 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 820 21:45:47.578 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 821 21:45:47.578 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 822 21:45:47.578 0.00132030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 823 21:45:47.578 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 824 21:45:47.578 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 825 21:45:47.578 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 826 21:45:47.578 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 827 21:45:47.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 828 21:45:47.578 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 829 21:45:47.578 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 830 21:45:47.578 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 831 21:45:47.578 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 832 21:45:47.578 0.00164543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 833 21:45:47.578 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 834 21:45:47.578 0.00094657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 835 21:45:47.594 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 836 21:45:47.594 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 837 21:45:47.594 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 838 21:45:47.594 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 839 21:45:47.594 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 840 21:45:47.594 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 841 21:45:47.594 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 842 21:45:47.594 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 845 21:45:47.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 846 21:45:47.594 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 847 21:45:47.594 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 848 21:45:47.594 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 849 21:45:47.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 850 21:45:47.594 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 851 21:45:47.594 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 852 21:45:47.594 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 853 21:45:47.594 0.00007546 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 854 21:45:47.594 0.00110894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 855 21:45:47.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 856 21:45:47.594 0.00157669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 857 21:45:47.609 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 858 21:45:47.609 0.00106430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 859 21:45:47.609 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 860 21:45:47.609 0.00122548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 861 21:45:47.609 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 862 21:45:47.609 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 863 21:45:47.609 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 864 21:45:47.609 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 865 21:45:47.609 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 866 21:45:47.609 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 867 21:45:47.609 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 868 21:45:47.609 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 869 21:45:47.609 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 870 21:45:47.609 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 871 21:45:47.609 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 872 21:45:47.609 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 873 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 874 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 875 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 876 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 877 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 878 21:45:47.609 0.00005175 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 879 21:45:47.609 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 880 21:45:47.609 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 881 21:45:47.609 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 882 21:45:47.609 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 883 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 884 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 885 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 886 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 887 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 888 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 889 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 890 21:45:47.609 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 891 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 892 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 893 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 894 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 895 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 896 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 897 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 898 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 899 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 900 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 901 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 902 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 903 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 904 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 905 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 906 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 907 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 908 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 909 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 910 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 911 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 912 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 913 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 914 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 915 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 916 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 917 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 918 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 919 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 920 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 921 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 922 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 923 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 924 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 925 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 926 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 927 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 928 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 929 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 930 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 931 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 932 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 933 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 934 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 935 21:45:47.609 0.00003872 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 936 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 937 21:45:47.609 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 938 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 939 21:45:47.609 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 940 21:45:47.609 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 941 21:45:47.609 0.00016277 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 942 21:45:47.609 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 943 21:45:47.609 0.00186390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 944 21:45:47.609 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 945 21:45:47.609 0.00272198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 946 21:45:47.625 0.00032830 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 947 21:45:47.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 948 21:45:47.625 0.00040257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 949 21:45:47.625 0.00034370 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 10 950 21:45:47.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 951 21:45:47.625 0.00016514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 952 21:45:47.625 0.00010706 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 953 21:45:47.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 954 21:45:47.625 0.00011338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 955 21:45:47.625 0.00010114 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 956 21:45:47.625 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 957 21:45:47.625 0.00498608 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 958 21:45:47.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 959 21:45:47.625 0.00097975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 960 21:45:47.625 0.00011773 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 961 21:45:47.625 0.00099556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 962 21:45:47.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 963 21:45:47.625 0.00095842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 964 21:45:47.625 0.00022005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 965 21:45:47.625 0.00106074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 966 21:45:47.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 967 21:45:47.625 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 968 21:45:47.625 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 969 21:45:47.625 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 970 21:45:47.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 971 21:45:47.625 0.00137995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 972 21:45:47.641 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 973 21:45:47.641 0.00153403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 974 21:45:47.641 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 975 21:45:47.641 0.00098449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 976 21:45:47.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 977 21:45:47.641 0.00136849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 978 21:45:47.641 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 979 21:45:47.641 0.00149886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 980 21:45:47.641 0.00014420 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 981 21:45:47.641 0.00115516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 982 21:45:47.641 0.00012010 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 983 21:45:47.641 0.00119427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 984 21:45:47.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 985 21:45:47.641 0.00141985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 986 21:45:47.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 987 21:45:47.641 0.00117965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 988 21:45:47.641 0.00013353 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 989 21:45:47.641 0.00117926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 990 21:45:47.641 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 991 21:45:47.641 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 992 21:45:47.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 993 21:45:47.656 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 994 21:45:47.656 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 995 21:45:47.656 0.00120810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 996 21:45:47.656 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 997 21:45:47.656 0.00154864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 998 21:45:47.656 0.00010074 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 999 21:45:47.656 0.00102716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1001 21:45:47.656 0.00117847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1002 21:45:47.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1003 21:45:47.656 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1004 21:45:47.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1005 21:45:47.656 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1006 21:45:47.656 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1007 21:45:47.656 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1008 21:45:47.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1009 21:45:47.656 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1010 21:45:47.656 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1011 21:45:47.656 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1012 21:45:47.656 0.00008691 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1013 21:45:47.656 0.00478578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1014 21:45:47.672 0.00006519 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1015 21:45:47.672 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1016 21:45:47.672 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1017 21:45:47.672 0.00042232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1018 21:45:47.672 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1019 21:45:47.672 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1020 21:45:47.672 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1021 21:45:47.672 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1022 21:45:47.672 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1023 21:45:47.672 0.00124761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1024 21:45:47.672 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1025 21:45:47.672 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1026 21:45:47.672 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1027 21:45:47.672 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1028 21:45:47.672 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1029 21:45:47.672 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1030 21:45:47.672 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1031 21:45:47.672 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1032 21:45:47.672 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1033 21:45:47.672 0.00145225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1034 21:45:47.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1035 21:45:47.688 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1036 21:45:47.688 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1037 21:45:47.688 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1038 21:45:47.688 0.00013077 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1039 21:45:47.688 0.00125077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1040 21:45:47.688 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1041 21:45:47.688 0.00142973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1042 21:45:47.688 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1044 21:45:47.688 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1045 21:45:47.688 0.00108998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1046 21:45:47.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1047 21:45:47.688 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1048 21:45:47.688 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1049 21:45:47.688 0.00138667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1050 21:45:47.688 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1051 21:45:47.688 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1052 21:45:47.688 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1053 21:45:47.688 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1054 21:45:47.688 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1056 21:45:47.704 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1057 21:45:47.704 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1058 21:45:47.704 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1059 21:45:47.704 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1060 21:45:47.704 0.00004622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1061 21:45:47.704 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1062 21:45:47.704 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1063 21:45:47.704 0.00136059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1064 21:45:47.704 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1065 21:45:47.704 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1066 21:45:47.704 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1067 21:45:47.704 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1068 21:45:47.704 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1069 21:45:47.704 0.00122548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1070 21:45:47.704 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1071 21:45:47.704 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1072 21:45:47.704 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1073 21:45:47.704 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1074 21:45:47.704 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1075 21:45:47.704 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1076 21:45:47.704 0.00006440 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1077 21:45:47.704 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1078 21:45:47.719 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1079 21:45:47.719 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1080 21:45:47.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1081 21:45:47.719 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1082 21:45:47.719 0.00014064 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1083 21:45:47.719 0.00107180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1084 21:45:47.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1085 21:45:47.719 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1086 21:45:47.719 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1087 21:45:47.719 0.00144158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1088 21:45:47.719 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1089 21:45:47.719 0.00118124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1090 21:45:47.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1091 21:45:47.719 0.00089758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1092 21:45:47.719 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 1093 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 1094 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 10 1095 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 1096 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 1097 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1098 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1099 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1100 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1101 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 1102 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 1103 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1104 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1105 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1106 21:45:47.719 0.00005689 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1107 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1108 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1109 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1110 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1111 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1112 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1113 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1114 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1115 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1116 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1117 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 1118 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 1119 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1120 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1121 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1122 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1123 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1124 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1125 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1126 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1127 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1128 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1129 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1130 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1131 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1132 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1133 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 1134 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 1135 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1136 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1137 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1138 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1139 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1140 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1141 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1142 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1143 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1144 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1145 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1146 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1147 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1148 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1149 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 1150 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 1151 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1152 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1153 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1154 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1155 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1156 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1157 21:45:47.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1158 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1159 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1160 21:45:47.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1161 21:45:47.719 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 1162 21:45:47.719 0.00014341 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 1163 21:45:47.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1164 21:45:47.719 0.00199467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1165 21:45:47.719 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1166 21:45:47.719 0.00328138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1167 21:45:47.735 0.00021412 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 1168 21:45:47.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1169 21:45:47.735 0.00018528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1170 21:45:47.735 0.00015091 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 1171 21:45:47.735 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1172 21:45:47.735 0.00017225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1173 21:45:47.735 0.00013274 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 1174 21:45:47.735 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1175 21:45:47.735 0.00021452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1176 21:45:47.735 0.00019358 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 1177 21:45:47.735 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1178 21:45:47.735 0.00538153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1179 21:45:47.735 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1180 21:45:47.735 0.00096869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1181 21:45:47.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1182 21:45:47.735 0.00090272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1183 21:45:47.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1184 21:45:47.735 0.00097106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1185 21:45:47.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1186 21:45:47.735 0.00126499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1187 21:45:47.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1188 21:45:47.735 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1189 21:45:47.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1190 21:45:47.735 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1191 21:45:47.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1192 21:45:47.735 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1193 21:45:47.751 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1194 21:45:47.751 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1195 21:45:47.751 0.00006835 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1196 21:45:47.751 0.00125077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1197 21:45:47.751 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1198 21:45:47.751 0.00142736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1199 21:45:47.751 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1200 21:45:47.751 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1201 21:45:47.751 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1202 21:45:47.751 0.00121521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1203 21:45:47.751 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1204 21:45:47.751 0.00144435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1205 21:45:47.751 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1206 21:45:47.751 0.00119901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1207 21:45:47.751 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1208 21:45:47.751 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1209 21:45:47.751 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1210 21:45:47.751 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1211 21:45:47.751 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1212 21:45:47.751 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1213 21:45:47.751 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1214 21:45:47.751 0.00146054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1215 21:45:47.766 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1216 21:45:47.766 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1217 21:45:47.766 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1218 21:45:47.766 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1219 21:45:47.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1220 21:45:47.766 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1221 21:45:47.766 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1222 21:45:47.766 0.00124524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1223 21:45:47.766 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1224 21:45:47.766 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1225 21:45:47.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1226 21:45:47.766 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1227 21:45:47.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1228 21:45:47.766 0.00123417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1229 21:45:47.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1230 21:45:47.766 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1231 21:45:47.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1232 21:45:47.766 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1233 21:45:47.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1234 21:45:47.766 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1235 21:45:47.766 0.00009363 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1236 21:45:47.782 0.00141748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1237 21:45:47.782 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1238 21:45:47.782 0.00086479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1239 21:45:47.782 0.00015961 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1240 21:45:47.782 0.00110025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1241 21:45:47.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1242 21:45:47.782 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1243 21:45:47.782 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1244 21:45:47.782 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1245 21:45:47.782 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1246 21:45:47.782 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1247 21:45:47.782 0.00016316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1248 21:45:47.782 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1249 21:45:47.782 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1250 21:45:47.782 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1251 21:45:47.782 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1252 21:45:47.782 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1253 21:45:47.782 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1254 21:45:47.782 0.00114015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1255 21:45:47.782 0.00007151 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1256 21:45:47.782 0.00116622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1257 21:45:47.797 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1258 21:45:47.797 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1259 21:45:47.797 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1260 21:45:47.797 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1261 21:45:47.797 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1262 21:45:47.797 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1263 21:45:47.797 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1264 21:45:47.797 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1265 21:45:47.797 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1266 21:45:47.797 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1267 21:45:47.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1268 21:45:47.797 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1269 21:45:47.797 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1270 21:45:47.797 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1271 21:45:47.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1272 21:45:47.797 0.00143842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1273 21:45:47.797 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1274 21:45:47.797 0.00144237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1275 21:45:47.797 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1276 21:45:47.797 0.00112672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1277 21:45:47.797 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1278 21:45:47.797 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1279 21:45:47.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1280 21:45:47.813 0.00124998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1281 21:45:47.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1282 21:45:47.813 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1283 21:45:47.813 0.00006202 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1284 21:45:47.813 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1285 21:45:47.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1286 21:45:47.813 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1287 21:45:47.813 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1288 21:45:47.813 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1289 21:45:47.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1290 21:45:47.813 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1291 21:45:47.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1292 21:45:47.813 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1293 21:45:47.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1294 21:45:47.813 0.00141077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1295 21:45:47.813 0.00006084 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1296 21:45:47.813 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1297 21:45:47.813 0.00018489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1298 21:45:47.813 0.00114054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1299 21:45:47.828 0.00005886 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1300 21:45:47.828 0.00101136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1301 21:45:47.828 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1302 21:45:47.828 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1303 21:45:47.828 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1304 21:45:47.828 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1305 21:45:47.828 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1306 21:45:47.828 0.00131793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1307 21:45:47.828 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1308 21:45:47.828 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1311 21:45:47.828 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1312 21:45:47.828 0.00138667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1313 21:45:47.828 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1314 21:45:47.828 0.00149965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1315 21:45:47.828 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 1316 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 1317 21:45:47.828 0.00006479 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1318 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 1319 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 1320 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1321 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1322 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 1323 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1324 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1325 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1326 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 1327 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1328 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1329 21:45:47.828 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1330 21:45:47.828 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1331 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1332 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1333 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1334 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1335 21:45:47.828 0.00004188 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1336 21:45:47.828 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1337 21:45:47.828 0.00003635 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 1338 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 1339 21:45:47.828 0.00008217 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1340 21:45:47.828 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1341 21:45:47.828 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 1342 21:45:47.828 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 1343 21:45:47.828 0.00003398 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1344 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1345 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1346 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1347 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1348 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1349 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1350 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1351 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1352 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1353 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1354 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1355 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1356 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1357 21:45:47.828 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1358 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1359 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1360 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1361 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1362 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1363 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1364 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1365 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1366 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1367 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1368 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1369 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 1370 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1371 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1372 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1373 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 1374 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1375 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1376 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1377 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1378 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1379 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1380 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1381 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1382 21:45:47.828 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1383 21:45:47.828 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1384 21:45:47.828 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 1385 21:45:47.828 0.00013077 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 1386 21:45:47.828 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1387 21:45:47.828 0.00196385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1388 21:45:47.828 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1389 21:45:47.828 0.00235101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1390 21:45:47.844 0.00022874 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 1391 21:45:47.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1392 21:45:47.844 0.00024691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1393 21:45:47.844 0.00017225 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 10 1394 21:45:47.844 0.00017225 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 1395 21:45:47.844 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1396 21:45:47.844 0.00013116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1397 21:45:47.844 0.00021175 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 1398 21:45:47.844 0.00014183 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1399 21:45:47.844 0.00008573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1400 21:45:47.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1401 21:45:47.844 0.00494934 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1402 21:45:47.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1403 21:45:47.844 0.00102005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1404 21:45:47.844 0.00015052 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1405 21:45:47.844 0.00080830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1406 21:45:47.844 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1407 21:45:47.844 0.00097501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1408 21:45:47.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1409 21:45:47.844 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1410 21:45:47.844 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1411 21:45:47.844 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1412 21:45:47.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1413 21:45:47.844 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1414 21:45:47.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1415 21:45:47.844 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1416 21:45:47.859 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1417 21:45:47.859 0.00128869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1418 21:45:47.859 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1419 21:45:47.859 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1420 21:45:47.859 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1421 21:45:47.859 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1422 21:45:47.859 0.00011694 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1423 21:45:47.859 0.00121284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1424 21:45:47.859 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1425 21:45:47.859 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1426 21:45:47.859 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1427 21:45:47.859 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1428 21:45:47.859 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1429 21:45:47.859 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1430 21:45:47.859 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1431 21:45:47.859 0.00141669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1432 21:45:47.859 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1433 21:45:47.859 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1434 21:45:47.859 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1435 21:45:47.859 0.00110341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1436 21:45:47.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1437 21:45:47.875 0.00140603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1440 21:45:47.875 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1441 21:45:47.875 0.00081264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1442 21:45:47.875 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1443 21:45:47.875 0.00114805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1444 21:45:47.875 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1445 21:45:47.875 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1446 21:45:47.875 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1447 21:45:47.875 0.00142222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1448 21:45:47.875 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1449 21:45:47.875 0.00097896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1450 21:45:47.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1451 21:45:47.875 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1452 21:45:47.875 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1453 21:45:47.875 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1454 21:45:47.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1455 21:45:47.875 0.00113501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1456 21:45:47.875 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1457 21:45:47.875 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1458 21:45:47.891 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1459 21:45:47.891 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1460 21:45:47.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1461 21:45:47.891 0.00148267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1462 21:45:47.891 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1463 21:45:47.891 0.00109985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1464 21:45:47.891 0.00007151 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1465 21:45:47.891 0.00115990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1466 21:45:47.891 0.00018765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1467 21:45:47.891 0.00103704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1468 21:45:47.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1469 21:45:47.891 0.00148148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1470 21:45:47.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1471 21:45:47.891 0.00118874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1472 21:45:47.891 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1473 21:45:47.891 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1474 21:45:47.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1475 21:45:47.891 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1476 21:45:47.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1477 21:45:47.891 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1478 21:45:47.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1479 21:45:47.891 0.00140563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1480 21:45:47.906 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1481 21:45:47.906 0.00112000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1482 21:45:47.906 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1483 21:45:47.906 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1484 21:45:47.906 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1485 21:45:47.906 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1486 21:45:47.906 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1487 21:45:47.906 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1488 21:45:47.906 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1489 21:45:47.906 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1490 21:45:47.906 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1491 21:45:47.906 0.00129778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1492 21:45:47.906 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1493 21:45:47.906 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1494 21:45:47.906 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1495 21:45:47.906 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1496 21:45:47.906 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1497 21:45:47.906 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1498 21:45:47.906 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1499 21:45:47.906 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1500 21:45:47.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1501 21:45:47.906 0.00146805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1502 21:45:47.922 0.00013985 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1503 21:45:47.922 0.00103309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1504 21:45:47.922 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1505 21:45:47.922 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1506 21:45:47.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1507 21:45:47.922 0.00122390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1508 21:45:47.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1509 21:45:47.922 0.00158499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1510 21:45:47.922 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1511 21:45:47.922 0.00110183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1512 21:45:47.922 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1513 21:45:47.922 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1514 21:45:47.922 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1515 21:45:47.922 0.00118124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1516 21:45:47.922 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1517 21:45:47.922 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1518 21:45:47.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1519 21:45:47.922 0.00139615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1520 21:45:47.922 0.00008810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1521 21:45:47.922 0.00122311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1522 21:45:47.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1523 21:45:47.922 0.00145067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1524 21:45:47.938 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1525 21:45:47.938 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1526 21:45:47.938 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1527 21:45:47.938 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1528 21:45:47.938 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1529 21:45:47.938 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1530 21:45:47.938 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1531 21:45:47.938 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1532 21:45:47.938 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1533 21:45:47.938 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1534 21:45:47.938 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1535 21:45:47.938 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1536 21:45:47.938 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1537 21:45:47.938 0.00099398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1538 21:45:47.938 0.00004583 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 1539 21:45:47.938 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 1540 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 10 1541 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 1542 21:45:47.938 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 1543 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1544 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1545 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1546 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1547 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 1548 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 1549 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1550 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1551 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1552 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1553 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1554 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1555 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1556 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1557 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1558 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1559 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1560 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1561 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1562 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1563 21:45:47.938 0.00005728 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 1564 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 1565 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1566 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1567 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1568 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1569 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1570 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1571 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1572 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1573 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1574 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1575 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1576 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1577 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1578 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1579 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 1580 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 1581 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1582 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1583 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1584 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1585 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1586 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1587 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1588 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1589 21:45:47.938 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1590 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1591 21:45:47.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1592 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1593 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1594 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1595 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 1596 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 1597 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1598 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1599 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1600 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1601 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1602 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1603 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1604 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1605 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1606 21:45:47.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1607 21:45:47.938 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 1608 21:45:47.938 0.00020543 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 1609 21:45:47.938 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1610 21:45:47.938 0.00186706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1611 21:45:47.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1612 21:45:47.938 0.00328691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1613 21:45:47.953 0.00029590 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 1614 21:45:47.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1615 21:45:47.953 0.00028326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1616 21:45:47.953 0.00026114 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 1617 21:45:47.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1618 21:45:47.953 0.00023585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1619 21:45:47.953 0.00020662 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 1620 21:45:47.953 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1621 21:45:47.953 0.00018370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1622 21:45:47.953 0.00011141 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 1623 21:45:47.953 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1624 21:45:47.953 0.00570943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1625 21:45:47.953 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1626 21:45:47.953 0.00091141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1627 21:45:47.953 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1628 21:45:47.953 0.00108800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1629 21:45:47.953 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1630 21:45:47.953 0.00105165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1631 21:45:47.953 0.00010667 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1632 21:45:47.953 0.00117136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1633 21:45:47.953 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1634 21:45:47.953 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1635 21:45:47.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1636 21:45:47.953 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1637 21:45:47.969 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1638 21:45:47.969 0.00143921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1639 21:45:47.969 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1640 21:45:47.969 0.00111289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1641 21:45:47.969 0.00011852 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1642 21:45:47.969 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1643 21:45:47.969 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1644 21:45:47.969 0.00118756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1645 21:45:47.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1646 21:45:47.969 0.00142538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1647 21:45:47.969 0.00009442 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1648 21:45:47.969 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1649 21:45:47.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1650 21:45:47.969 0.00113027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1651 21:45:47.969 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1652 21:45:47.969 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1653 21:45:47.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1654 21:45:47.969 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1655 21:45:47.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1656 21:45:47.969 0.00141985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1657 21:45:47.969 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1658 21:45:47.969 0.00107417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1659 21:45:47.985 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1660 21:45:47.985 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1661 21:45:47.985 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1662 21:45:47.985 0.00136178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1663 21:45:47.985 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1664 21:45:47.985 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1665 21:45:47.985 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1666 21:45:47.985 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1667 21:45:47.985 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1668 21:45:47.985 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1669 21:45:47.985 0.00009284 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1670 21:45:47.985 0.00143565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1671 21:45:47.985 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1672 21:45:47.985 0.00107931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1673 21:45:47.985 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1674 21:45:47.985 0.00122311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1675 21:45:47.985 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1676 21:45:47.985 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1677 21:45:47.985 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1678 21:45:47.985 0.00116464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1679 21:45:47.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1680 21:45:47.985 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1681 21:45:48.000 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1682 21:45:48.000 0.00145738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1683 21:45:48.000 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1684 21:45:48.000 0.00119743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1685 21:45:48.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1686 21:45:48.000 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1687 21:45:48.000 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1688 21:45:48.000 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1689 21:45:48.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1690 21:45:48.000 0.00132188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1691 21:45:48.000 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1692 21:45:48.000 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1693 21:45:48.000 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1694 21:45:48.000 0.00148109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1696 21:45:48.000 0.00091378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1697 21:45:48.000 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1698 21:45:48.000 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1699 21:45:48.000 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1700 21:45:48.000 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1701 21:45:48.000 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1702 21:45:48.000 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1703 21:45:48.016 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1704 21:45:48.016 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1705 21:45:48.016 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1706 21:45:48.016 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1707 21:45:48.016 0.00002607 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1708 21:45:48.016 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1709 21:45:48.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1710 21:45:48.016 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1711 21:45:48.016 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1712 21:45:48.016 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1713 21:45:48.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1714 21:45:48.016 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1715 21:45:48.016 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1716 21:45:48.016 0.00116227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1717 21:45:48.016 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1718 21:45:48.016 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1719 21:45:48.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1720 21:45:48.016 0.00140365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1721 21:45:48.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1722 21:45:48.016 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1723 21:45:48.016 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1724 21:45:48.016 0.00131793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1725 21:45:48.032 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1726 21:45:48.032 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1727 21:45:48.032 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1728 21:45:48.032 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1729 21:45:48.032 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1730 21:45:48.032 0.00123575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1731 21:45:48.032 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1732 21:45:48.032 0.00149215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1733 21:45:48.032 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1734 21:45:48.032 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1735 21:45:48.032 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1736 21:45:48.032 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1737 21:45:48.032 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1738 21:45:48.032 0.00138074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1739 21:45:48.032 0.00007901 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1740 21:45:48.032 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1741 21:45:48.032 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1742 21:45:48.032 0.00124524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1743 21:45:48.032 0.00008849 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1744 21:45:48.032 0.00117017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1745 21:45:48.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1746 21:45:48.047 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1747 21:45:48.047 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1748 21:45:48.047 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1749 21:45:48.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1750 21:45:48.047 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1751 21:45:48.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1752 21:45:48.047 0.00141788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1753 21:45:48.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1754 21:45:48.047 0.00136573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1755 21:45:48.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1756 21:45:48.047 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1757 21:45:48.047 0.00006202 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1758 21:45:48.047 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1759 21:45:48.047 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1760 21:45:48.047 0.00120691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1761 21:45:48.047 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 1762 21:45:48.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 1763 21:45:48.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1764 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 1765 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 1766 21:45:48.047 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1767 21:45:48.047 0.00008928 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1768 21:45:48.047 0.00005531 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1769 21:45:48.047 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1770 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1771 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1772 21:45:48.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1773 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1774 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1775 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1776 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1777 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1778 21:45:48.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1779 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1780 21:45:48.047 0.00001936 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1781 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1782 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1783 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 1784 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1785 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1786 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1787 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 1788 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 1789 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1790 21:45:48.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1791 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1792 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1793 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1794 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1795 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1796 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1797 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1798 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1799 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1800 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 1801 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1802 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1803 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1804 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 1805 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1806 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1807 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1808 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1809 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1810 21:45:48.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1811 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1812 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1813 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1814 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1815 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 1816 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 1817 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1818 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1819 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 1820 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 1821 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 1822 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1823 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1824 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1825 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1826 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1827 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 1828 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 1829 21:45:48.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1830 21:45:48.047 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 1831 21:45:48.047 0.00014775 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 1832 21:45:48.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1833 21:45:48.047 0.00215585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1834 21:45:48.047 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1835 21:45:48.047 0.00216573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1836 21:45:48.063 0.00018331 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 1837 21:45:48.063 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1838 21:45:48.063 0.00020188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1839 21:45:48.063 0.00015486 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 10 1840 21:45:48.063 0.00017106 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 1841 21:45:48.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1842 21:45:48.063 0.00021926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1843 21:45:48.063 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1844 21:45:48.063 0.00015723 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 1845 21:45:48.063 0.00014538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1846 21:45:48.063 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1847 21:45:48.063 0.00596899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1848 21:45:48.063 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1849 21:45:48.063 0.00093946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1850 21:45:48.063 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1851 21:45:48.063 0.00098291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1852 21:45:48.063 0.00006281 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1853 21:45:48.063 0.00088968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1854 21:45:48.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1855 21:45:48.063 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1856 21:45:48.063 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1857 21:45:48.063 0.00151230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1858 21:45:48.063 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1859 21:45:48.063 0.00113659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1860 21:45:48.079 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1861 21:45:48.079 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1862 21:45:48.079 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1863 21:45:48.079 0.00117136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1864 21:45:48.079 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1865 21:45:48.079 0.00141274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1866 21:45:48.079 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1867 21:45:48.079 0.00117886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1868 21:45:48.079 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1869 21:45:48.079 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1870 21:45:48.079 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1871 21:45:48.079 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1872 21:45:48.079 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1873 21:45:48.079 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1874 21:45:48.079 0.00006440 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1875 21:45:48.079 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1876 21:45:48.079 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1877 21:45:48.079 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1878 21:45:48.079 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1879 21:45:48.079 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1880 21:45:48.079 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1881 21:45:48.079 0.00146449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1882 21:45:48.094 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1883 21:45:48.094 0.00096119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1884 21:45:48.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1885 21:45:48.094 0.00135862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1886 21:45:48.094 0.00011141 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1887 21:45:48.094 0.00112435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1888 21:45:48.094 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1889 21:45:48.094 0.00114015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1890 21:45:48.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1891 21:45:48.094 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1892 21:45:48.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1893 21:45:48.094 0.00124207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1894 21:45:48.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1895 21:45:48.094 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1896 21:45:48.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1897 21:45:48.094 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1898 21:45:48.094 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1899 21:45:48.094 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1900 21:45:48.094 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1901 21:45:48.094 0.00145225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1902 21:45:48.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1903 21:45:48.094 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1904 21:45:48.110 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1905 21:45:48.110 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1906 21:45:48.110 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1907 21:45:48.110 0.00123891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1908 21:45:48.110 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1909 21:45:48.110 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1910 21:45:48.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1911 21:45:48.110 0.00137284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1912 21:45:48.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1913 21:45:48.110 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1914 21:45:48.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1915 21:45:48.110 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1916 21:45:48.110 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1917 21:45:48.110 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1918 21:45:48.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1919 21:45:48.110 0.00136810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1920 21:45:48.110 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1921 21:45:48.110 0.00122548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1922 21:45:48.110 0.00013195 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1923 21:45:48.110 0.00122667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1924 21:45:48.125 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1925 21:45:48.125 0.00139299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1926 21:45:48.125 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1927 21:45:48.125 0.00120138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1928 21:45:48.125 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1929 21:45:48.125 0.00121719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1930 21:45:48.125 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1931 21:45:48.125 0.00143486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1932 21:45:48.125 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1933 21:45:48.125 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1934 21:45:48.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1935 21:45:48.125 0.00121758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1937 21:45:48.125 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1938 21:45:48.125 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1939 21:45:48.125 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1940 21:45:48.125 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1941 21:45:48.125 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1942 21:45:48.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1943 21:45:48.125 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1944 21:45:48.125 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1945 21:45:48.125 0.00141985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1946 21:45:48.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1947 21:45:48.141 0.00140405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1948 21:45:48.141 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1949 21:45:48.141 0.00127526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1950 21:45:48.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1951 21:45:48.141 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1952 21:45:48.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1953 21:45:48.141 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1954 21:45:48.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1955 21:45:48.141 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1956 21:45:48.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1957 21:45:48.141 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1958 21:45:48.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1959 21:45:48.141 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1960 21:45:48.141 0.00006953 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1961 21:45:48.141 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1962 21:45:48.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1963 21:45:48.141 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1964 21:45:48.141 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1965 21:45:48.141 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1966 21:45:48.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1967 21:45:48.141 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1968 21:45:48.157 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1969 21:45:48.157 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1970 21:45:48.157 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1971 21:45:48.157 0.00151269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1972 21:45:48.157 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1973 21:45:48.157 0.00094538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1974 21:45:48.157 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1975 21:45:48.157 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1976 21:45:48.157 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1977 21:45:48.157 0.00143170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1978 21:45:48.157 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1979 21:45:48.157 0.00119901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1980 21:45:48.157 0.00003832 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1981 21:45:48.157 0.00132188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1982 21:45:48.157 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 1983 21:45:48.157 0.00109472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 1984 21:45:48.157 0.00001264 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 1985 21:45:48.157 0.00007427 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 1986 21:45:48.157 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 10 1987 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 1988 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 1989 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 1990 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 1991 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 1992 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1993 21:45:48.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 1994 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 1995 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1996 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1997 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1998 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 1999 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2000 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2001 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2002 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2003 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2004 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2005 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2006 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2007 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2008 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2009 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2010 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 2011 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2012 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2013 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2014 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2015 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2016 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2017 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2018 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2019 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2020 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2021 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2022 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2023 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2024 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2025 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2026 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 2027 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2028 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2029 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2030 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2031 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2032 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2033 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2034 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2035 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2036 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2037 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2038 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2039 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2040 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2041 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2042 21:45:48.157 0.00006756 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2043 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2044 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2045 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2046 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2047 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2048 21:45:48.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2049 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2050 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2051 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2052 21:45:48.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2053 21:45:48.157 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 2054 21:45:48.157 0.00016988 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 2055 21:45:48.157 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2056 21:45:48.157 0.00194726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2057 21:45:48.157 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2058 21:45:48.172 0.00050410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2059 21:45:48.172 0.00023151 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 2060 21:45:48.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2061 21:45:48.172 0.00016672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2062 21:45:48.172 0.00010627 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 01 2063 21:45:48.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2064 21:45:48.172 0.00100622 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 2065 21:45:48.172 0.00016514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2066 21:45:48.172 0.00008573 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 2067 21:45:48.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2068 21:45:48.172 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2069 21:45:48.172 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2070 21:45:48.172 0.00680297 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2071 21:45:48.172 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2072 21:45:48.172 0.00096079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2073 21:45:48.172 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2074 21:45:48.172 0.00102084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2075 21:45:48.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2076 21:45:48.172 0.00095131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2077 21:45:48.172 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2078 21:45:48.172 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2079 21:45:48.172 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2080 21:45:48.172 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2081 21:45:48.172 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2082 21:45:48.172 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2083 21:45:48.188 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2084 21:45:48.188 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2085 21:45:48.188 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2086 21:45:48.188 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2087 21:45:48.188 0.00016514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2088 21:45:48.188 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2089 21:45:48.188 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2090 21:45:48.188 0.00120138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2091 21:45:48.188 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2092 21:45:48.188 0.00117570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2093 21:45:48.188 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2095 21:45:48.188 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2096 21:45:48.188 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2097 21:45:48.188 0.00011180 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2098 21:45:48.188 0.00113225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2099 21:45:48.188 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2100 21:45:48.188 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2101 21:45:48.188 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2102 21:45:48.188 0.00143684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2103 21:45:48.204 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2104 21:45:48.204 0.00118914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2105 21:45:48.204 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2106 21:45:48.204 0.00133886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2107 21:45:48.204 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2108 21:45:48.204 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2109 21:45:48.204 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2110 21:45:48.204 0.00143131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2111 21:45:48.204 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2112 21:45:48.204 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2113 21:45:48.204 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2114 21:45:48.204 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2115 21:45:48.204 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2116 21:45:48.204 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2117 21:45:48.204 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2118 21:45:48.204 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2119 21:45:48.204 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2120 21:45:48.204 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2121 21:45:48.204 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2122 21:45:48.204 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2123 21:45:48.204 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2124 21:45:48.204 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2125 21:45:48.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2126 21:45:48.219 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2127 21:45:48.219 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2128 21:45:48.219 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2129 21:45:48.219 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2130 21:45:48.219 0.00147042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2131 21:45:48.219 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2132 21:45:48.219 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2133 21:45:48.219 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2134 21:45:48.219 0.00145462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2135 21:45:48.219 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2136 21:45:48.219 0.00109472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2137 21:45:48.219 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2138 21:45:48.219 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2139 21:45:48.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2140 21:45:48.219 0.00117807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2141 21:45:48.219 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2142 21:45:48.219 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2143 21:45:48.219 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2144 21:45:48.219 0.00114765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2145 21:45:48.219 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2146 21:45:48.219 0.00124286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2147 21:45:48.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2148 21:45:48.235 0.00147279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2149 21:45:48.235 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2150 21:45:48.235 0.00120731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2151 21:45:48.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2152 21:45:48.235 0.00141788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2153 21:45:48.235 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2154 21:45:48.235 0.00117610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2155 21:45:48.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2156 21:45:48.235 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2157 21:45:48.235 0.00012168 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2158 21:45:48.235 0.00116978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2159 21:45:48.235 0.00015170 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2160 21:45:48.235 0.00123417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2161 21:45:48.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2162 21:45:48.235 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2163 21:45:48.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2164 21:45:48.235 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2165 21:45:48.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2166 21:45:48.235 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2167 21:45:48.235 0.00012089 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2168 21:45:48.235 0.00121600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2169 21:45:48.251 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2170 21:45:48.251 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2171 21:45:48.251 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2172 21:45:48.251 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2173 21:45:48.251 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2174 21:45:48.251 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2175 21:45:48.251 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2176 21:45:48.251 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2177 21:45:48.251 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2178 21:45:48.251 0.00149649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2179 21:45:48.251 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2180 21:45:48.251 0.00119151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2181 21:45:48.251 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2182 21:45:48.251 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2183 21:45:48.251 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2184 21:45:48.251 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2185 21:45:48.251 0.00014183 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2186 21:45:48.251 0.00121205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2187 21:45:48.251 0.00007111 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2188 21:45:48.251 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2189 21:45:48.251 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2190 21:45:48.251 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2191 21:45:48.266 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2192 21:45:48.266 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2193 21:45:48.266 0.00009086 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2194 21:45:48.266 0.00120336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2195 21:45:48.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2196 21:45:48.266 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2197 21:45:48.266 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2198 21:45:48.266 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2199 21:45:48.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2200 21:45:48.266 0.00122074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2201 21:45:48.266 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2202 21:45:48.266 0.00144632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2203 21:45:48.266 0.00020227 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2204 21:45:48.266 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2205 21:45:48.266 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2206 21:45:48.266 0.00189314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2207 21:45:48.266 0.00000356 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 2208 21:45:48.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 2209 21:45:48.266 0.00015763 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2210 21:45:48.266 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2211 21:45:48.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 2216 21:45:48.266 0.00005728 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2217 21:45:48.266 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2218 21:45:48.266 0.00005096 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 2219 21:45:48.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2220 21:45:48.266 0.00005768 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2221 21:45:48.266 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2226 21:45:48.266 0.00003358 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2227 21:45:48.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2228 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2229 21:45:48.266 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 2230 21:45:48.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 2231 21:45:48.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2232 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2233 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 2234 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 2235 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2236 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2237 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2238 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2239 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2240 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2241 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2242 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2243 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2244 21:45:48.266 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2245 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2246 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2247 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2248 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2249 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2250 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2251 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2252 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2253 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2254 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2255 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2256 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2257 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2258 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2259 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2260 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2261 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 2262 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2263 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2264 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2265 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 2266 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2267 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2268 21:45:48.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2269 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2270 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2271 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2272 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2273 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2274 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2275 21:45:48.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2276 21:45:48.266 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 2277 21:45:48.266 0.00012089 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 2278 21:45:48.266 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2279 21:45:48.266 0.00193778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2280 21:45:48.282 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2281 21:45:48.282 0.00028721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2282 21:45:48.282 0.00022005 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 2283 21:45:48.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2284 21:45:48.282 0.00027259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2285 21:45:48.282 0.00017304 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 11 2286 21:45:48.282 0.00016356 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 2287 21:45:48.282 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2288 21:45:48.282 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2289 21:45:48.282 0.00016277 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 2290 21:45:48.282 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2291 21:45:48.282 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2292 21:45:48.282 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2293 21:45:48.282 0.00568297 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2294 21:45:48.282 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2295 21:45:48.282 0.00103388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2296 21:45:48.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2297 21:45:48.282 0.00088770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2298 21:45:48.282 0.00014617 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2299 21:45:48.282 0.00095763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2300 21:45:48.282 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2301 21:45:48.282 0.00146845 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2302 21:45:48.282 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2303 21:45:48.282 0.00098054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2304 21:45:48.282 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2305 21:45:48.282 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2306 21:45:48.282 0.00006637 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2307 21:45:48.282 0.00120731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2308 21:45:48.297 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2309 21:45:48.297 0.00065462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2310 21:45:48.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2311 21:45:48.297 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2312 21:45:48.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2313 21:45:48.297 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2314 21:45:48.297 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2315 21:45:48.297 0.00134203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2316 21:45:48.297 0.00011417 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2317 21:45:48.297 0.00111921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2318 21:45:48.297 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2319 21:45:48.297 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2320 21:45:48.297 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2321 21:45:48.297 0.00136573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2322 21:45:48.297 0.00008968 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2323 21:45:48.297 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2324 21:45:48.297 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2325 21:45:48.297 0.00107496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2326 21:45:48.297 0.00007862 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2327 21:45:48.297 0.00118953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2328 21:45:48.313 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2329 21:45:48.313 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2330 21:45:48.313 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2331 21:45:48.313 0.00116030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2332 21:45:48.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2333 21:45:48.313 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2334 21:45:48.313 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2335 21:45:48.313 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2336 21:45:48.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2337 21:45:48.313 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2338 21:45:48.313 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2339 21:45:48.313 0.00147437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2340 21:45:48.313 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2341 21:45:48.313 0.00123575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2342 21:45:48.313 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2343 21:45:48.313 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2344 21:45:48.313 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2345 21:45:48.313 0.00116820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2346 21:45:48.313 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2347 21:45:48.313 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2348 21:45:48.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2349 21:45:48.313 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2350 21:45:48.329 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2351 21:45:48.329 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2352 21:45:48.329 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2353 21:45:48.329 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2354 21:45:48.329 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2355 21:45:48.329 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2356 21:45:48.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2357 21:45:48.329 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2358 21:45:48.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2359 21:45:48.329 0.00125274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2360 21:45:48.329 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2361 21:45:48.329 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2362 21:45:48.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2363 21:45:48.329 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2364 21:45:48.329 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2365 21:45:48.329 0.00121165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2366 21:45:48.329 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2367 21:45:48.329 0.00143249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2368 21:45:48.329 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2369 21:45:48.329 0.00147714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2370 21:45:48.329 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2371 21:45:48.329 0.00112000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2372 21:45:48.345 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2373 21:45:48.345 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2374 21:45:48.345 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2375 21:45:48.345 0.00122864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2376 21:45:48.345 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2377 21:45:48.345 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2378 21:45:48.345 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2379 21:45:48.345 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2380 21:45:48.345 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2381 21:45:48.345 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2382 21:45:48.345 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2383 21:45:48.345 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2384 21:45:48.345 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2385 21:45:48.345 0.00145383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2386 21:45:48.345 0.00008138 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2387 21:45:48.345 0.00113659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2388 21:45:48.345 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2389 21:45:48.345 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2390 21:45:48.359 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2391 21:45:48.359 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2392 21:45:48.359 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2393 21:45:48.359 0.00086123 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2394 21:45:48.359 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2395 21:45:48.359 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2396 21:45:48.359 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2397 21:45:48.359 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2398 21:45:48.359 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2399 21:45:48.359 0.00124405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2400 21:45:48.359 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2401 21:45:48.359 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2402 21:45:48.359 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2403 21:45:48.359 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2404 21:45:48.359 0.00010272 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2405 21:45:48.359 0.00116188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2406 21:45:48.359 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2407 21:45:48.359 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2408 21:45:48.359 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2409 21:45:48.359 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2410 21:45:48.359 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2411 21:45:48.359 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2412 21:45:48.359 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2413 21:45:48.359 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2414 21:45:48.375 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2415 21:45:48.375 0.00152020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2416 21:45:48.375 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2417 21:45:48.375 0.00112158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2418 21:45:48.375 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2419 21:45:48.375 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2420 21:45:48.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2421 21:45:48.375 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2422 21:45:48.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2423 21:45:48.375 0.00145106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2424 21:45:48.375 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2425 21:45:48.375 0.00121719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2426 21:45:48.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2427 21:45:48.375 0.00137007 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2428 21:45:48.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2429 21:45:48.375 0.00144830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2430 21:45:48.375 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 2431 21:45:48.375 0.00002410 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 2432 21:45:48.375 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 11 2433 21:45:48.375 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2434 21:45:48.375 0.00006005 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 2435 21:45:48.375 0.00013156 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2436 21:45:48.375 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2437 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2438 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2439 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2440 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 2441 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2442 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2443 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2444 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2445 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2446 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2447 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2448 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2449 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2450 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2451 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2452 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2453 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2454 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2455 21:45:48.375 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2456 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 2457 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2458 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2459 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2460 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2461 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2462 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2463 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2464 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2465 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2466 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2467 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2468 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2469 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2470 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2471 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2472 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 2473 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2474 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2475 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2476 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2477 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2478 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2479 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2480 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2481 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2482 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2483 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2484 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2485 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2486 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2487 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2488 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 2489 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2490 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2491 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2492 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2493 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2494 21:45:48.375 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2495 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2496 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2497 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2498 21:45:48.375 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2499 21:45:48.375 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 2500 21:45:48.375 0.00017422 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 2501 21:45:48.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2502 21:45:48.375 0.00187931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2503 21:45:48.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2504 21:45:48.375 0.00196899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2505 21:45:48.391 0.00012405 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 2506 21:45:48.391 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2507 21:45:48.391 0.00023822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2508 21:45:48.391 0.00018923 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 01 2509 21:45:48.391 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2510 21:45:48.391 0.00013353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2511 21:45:48.391 0.00011022 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 2512 21:45:48.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2513 21:45:48.391 0.00014459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2514 21:45:48.391 0.00011022 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 2515 21:45:48.391 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2516 21:45:48.391 0.00502914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2517 21:45:48.391 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2518 21:45:48.391 0.00078262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2519 21:45:48.391 0.00012010 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2520 21:45:48.391 0.00083319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2521 21:45:48.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2522 21:45:48.391 0.00096474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2523 21:45:48.391 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2524 21:45:48.391 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2525 21:45:48.391 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2526 21:45:48.391 0.00140089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2527 21:45:48.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2528 21:45:48.391 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2529 21:45:48.391 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2530 21:45:48.391 0.00144474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2531 21:45:48.406 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2532 21:45:48.406 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2533 21:45:48.406 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2534 21:45:48.406 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2535 21:45:48.406 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2536 21:45:48.406 0.00115674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2537 21:45:48.406 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2538 21:45:48.406 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2539 21:45:48.406 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2540 21:45:48.406 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2541 21:45:48.406 0.00010311 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2542 21:45:48.406 0.00124207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2543 21:45:48.406 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2544 21:45:48.406 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2545 21:45:48.406 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2546 21:45:48.406 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2547 21:45:48.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2548 21:45:48.406 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2549 21:45:48.406 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2550 21:45:48.406 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2551 21:45:48.406 0.00003872 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2552 21:45:48.406 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2553 21:45:48.422 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2554 21:45:48.422 0.00120296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2555 21:45:48.422 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2556 21:45:48.422 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2557 21:45:48.422 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2558 21:45:48.422 0.00106943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2559 21:45:48.422 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2560 21:45:48.422 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2561 21:45:48.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2562 21:45:48.422 0.00122074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2563 21:45:48.422 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2564 21:45:48.422 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2565 21:45:48.422 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2566 21:45:48.422 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2567 21:45:48.422 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2568 21:45:48.422 0.00137244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2569 21:45:48.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2570 21:45:48.422 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2571 21:45:48.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2572 21:45:48.422 0.00137284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2573 21:45:48.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2574 21:45:48.438 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2575 21:45:48.438 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2576 21:45:48.438 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2577 21:45:48.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2578 21:45:48.438 0.00141551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2579 21:45:48.438 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2580 21:45:48.438 0.00143882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2581 21:45:48.438 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2582 21:45:48.438 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2583 21:45:48.438 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2584 21:45:48.438 0.00108365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2585 21:45:48.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2586 21:45:48.438 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2587 21:45:48.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2588 21:45:48.438 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2589 21:45:48.438 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2590 21:45:48.438 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2591 21:45:48.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2592 21:45:48.438 0.00124484 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2593 21:45:48.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2594 21:45:48.438 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2595 21:45:48.453 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2596 21:45:48.453 0.00138825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2597 21:45:48.453 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2598 21:45:48.453 0.00124761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2599 21:45:48.453 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2600 21:45:48.453 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2601 21:45:48.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2602 21:45:48.453 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2603 21:45:48.453 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2604 21:45:48.453 0.00150361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2605 21:45:48.453 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2606 21:45:48.453 0.00101807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2607 21:45:48.453 0.00008178 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2608 21:45:48.453 0.00119783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2609 21:45:48.453 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2610 21:45:48.453 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2611 21:45:48.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2612 21:45:48.453 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2613 21:45:48.453 0.00007822 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2614 21:45:48.453 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2615 21:45:48.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2616 21:45:48.453 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2617 21:45:48.469 0.00007309 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2618 21:45:48.469 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2619 21:45:48.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2620 21:45:48.469 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2621 21:45:48.469 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2622 21:45:48.469 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2623 21:45:48.469 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2624 21:45:48.469 0.00128909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2625 21:45:48.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2626 21:45:48.469 0.00168217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2627 21:45:48.469 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2628 21:45:48.469 0.00104968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2629 21:45:48.469 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2630 21:45:48.469 0.00122667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2631 21:45:48.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2632 21:45:48.469 0.00119625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2633 21:45:48.469 0.00010272 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2634 21:45:48.469 0.00118321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2635 21:45:48.469 0.00008257 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2636 21:45:48.469 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2637 21:45:48.469 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2638 21:45:48.469 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2639 21:45:48.485 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2640 21:45:48.485 0.00116504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2641 21:45:48.485 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2642 21:45:48.485 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2643 21:45:48.485 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2644 21:45:48.485 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2645 21:45:48.485 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2646 21:45:48.485 0.00117333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2647 21:45:48.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2648 21:45:48.485 0.00143210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2649 21:45:48.485 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2650 21:45:48.485 0.00154114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2651 21:45:48.485 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2652 21:45:48.485 0.00223803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2653 21:45:48.485 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 2654 21:45:48.485 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 2655 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2656 21:45:48.485 0.00011733 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 2657 21:45:48.485 0.00005215 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 2658 21:45:48.485 0.00008889 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2659 21:45:48.485 0.00006163 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2660 21:45:48.485 0.00008968 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2661 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2662 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2663 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2664 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2665 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2666 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2667 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2668 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2669 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2670 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2671 21:45:48.485 0.00001580 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2672 21:45:48.485 0.00005965 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2673 21:45:48.485 0.00002765 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2674 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2675 21:45:48.485 0.00005254 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 2676 21:45:48.485 0.00006993 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2677 21:45:48.485 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2678 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2679 21:45:48.485 0.00004780 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 2680 21:45:48.485 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 2681 21:45:48.485 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2682 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2683 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2684 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2685 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2686 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2687 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2688 21:45:48.485 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2689 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2690 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2691 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2692 21:45:48.485 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 2693 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2694 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2695 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2696 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 2697 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2698 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2699 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2700 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2701 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2702 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2703 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2704 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2705 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2706 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2707 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 2708 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 2709 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2710 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2711 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 2712 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 2713 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 2714 21:45:48.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2715 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2716 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2717 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2718 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2719 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 2720 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 2721 21:45:48.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2722 21:45:48.485 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 2723 21:45:48.485 0.00018884 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 2724 21:45:48.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2725 21:45:48.485 0.00188128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2726 21:45:48.485 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2727 21:45:48.485 0.00168099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2728 21:45:48.500 0.00016474 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 2729 21:45:48.500 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2730 21:45:48.500 0.00017146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2731 21:45:48.500 0.00013946 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 11 2732 21:45:48.500 0.00011615 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 2733 21:45:48.500 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2734 21:45:48.500 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2735 21:45:48.500 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2736 21:45:48.500 0.00112277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2737 21:45:48.500 0.00030420 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 2738 21:45:48.500 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2739 21:45:48.500 0.00511368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2740 21:45:48.500 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2741 21:45:48.500 0.00093906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2742 21:45:48.500 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2743 21:45:48.500 0.00109551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2744 21:45:48.500 0.00014143 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2746 21:45:48.500 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2747 21:45:48.500 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2748 21:45:48.500 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2749 21:45:48.500 0.00121719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2750 21:45:48.500 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2751 21:45:48.500 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2752 21:45:48.500 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2753 21:45:48.500 0.00144119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2754 21:45:48.516 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2755 21:45:48.516 0.00124642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2756 21:45:48.516 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2757 21:45:48.516 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2758 21:45:48.516 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2759 21:45:48.516 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2760 21:45:48.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2761 21:45:48.516 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2762 21:45:48.516 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2763 21:45:48.516 0.00124642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2764 21:45:48.516 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2765 21:45:48.516 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2766 21:45:48.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2767 21:45:48.516 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2768 21:45:48.516 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2769 21:45:48.516 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2770 21:45:48.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2771 21:45:48.516 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2772 21:45:48.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2773 21:45:48.516 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2774 21:45:48.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2775 21:45:48.516 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2776 21:45:48.532 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2777 21:45:48.532 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2778 21:45:48.532 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2779 21:45:48.532 0.00135743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2780 21:45:48.532 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2781 21:45:48.532 0.00139615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2782 21:45:48.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2783 21:45:48.532 0.00142025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2784 21:45:48.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2785 21:45:48.532 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2786 21:45:48.532 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2787 21:45:48.532 0.00139457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2788 21:45:48.532 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2789 21:45:48.532 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2790 21:45:48.532 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2791 21:45:48.532 0.00103269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2792 21:45:48.532 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2793 21:45:48.532 0.00117649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2794 21:45:48.532 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2795 21:45:48.532 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2796 21:45:48.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2797 21:45:48.547 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2798 21:45:48.547 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2799 21:45:48.547 0.00108761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2800 21:45:48.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2801 21:45:48.547 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2802 21:45:48.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2803 21:45:48.547 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2804 21:45:48.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2805 21:45:48.547 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2806 21:45:48.547 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2807 21:45:48.547 0.00740504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2808 21:45:48.547 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2809 21:45:48.547 0.00011259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2810 21:45:48.547 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2811 21:45:48.547 0.00064830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2812 21:45:48.563 0.00012049 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2813 21:45:48.563 0.00106232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2814 21:45:48.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2815 21:45:48.563 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2816 21:45:48.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2817 21:45:48.563 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2818 21:45:48.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2819 21:45:48.563 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2820 21:45:48.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2821 21:45:48.563 0.00124998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2822 21:45:48.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2823 21:45:48.563 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2824 21:45:48.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2825 21:45:48.563 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2826 21:45:48.563 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2827 21:45:48.563 0.00121165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2828 21:45:48.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2829 21:45:48.563 0.00155891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2830 21:45:48.563 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2831 21:45:48.563 0.00111526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2832 21:45:48.563 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2833 21:45:48.563 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2834 21:45:48.578 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2835 21:45:48.578 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2836 21:45:48.578 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2837 21:45:48.578 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2838 21:45:48.578 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2839 21:45:48.578 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2840 21:45:48.578 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2841 21:45:48.578 0.00141037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2842 21:45:48.578 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2843 21:45:48.578 0.00119862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2844 21:45:48.578 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2845 21:45:48.578 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2846 21:45:48.578 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2847 21:45:48.578 0.00115319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2848 21:45:48.578 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2849 21:45:48.578 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2850 21:45:48.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2851 21:45:48.578 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2852 21:45:48.578 0.00014894 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2853 21:45:48.578 0.00140128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2854 21:45:48.594 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2855 21:45:48.594 0.00091733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2856 21:45:48.594 0.00018449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2857 21:45:48.594 0.00113936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2858 21:45:48.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2859 21:45:48.594 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2860 21:45:48.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2861 21:45:48.594 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2862 21:45:48.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2863 21:45:48.594 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2864 21:45:48.594 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2865 21:45:48.594 0.00139062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2866 21:45:48.594 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2867 21:45:48.594 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2868 21:45:48.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2869 21:45:48.594 0.00237906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2870 21:45:48.594 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 2871 21:45:48.594 0.00013788 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 2872 21:45:48.594 0.00010469 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 11 2873 21:45:48.594 0.00016672 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 2874 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 2875 21:45:48.594 0.00005847 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2876 21:45:48.594 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2877 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2878 21:45:48.594 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2879 21:45:48.594 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 2880 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 2881 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2882 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2883 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2884 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2885 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2886 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2887 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2888 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2889 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2890 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2891 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2892 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2893 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2894 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2895 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 2896 21:45:48.594 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 2897 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2898 21:45:48.594 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2899 21:45:48.594 0.00004227 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2900 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2901 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2902 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2903 21:45:48.594 0.00010232 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2904 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2905 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2906 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2907 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2908 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2909 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2910 21:45:48.594 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2911 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 2912 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 2913 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2914 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2915 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2916 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2917 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2918 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2919 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2920 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2921 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2922 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2923 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 2924 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 2925 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 2926 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2927 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 2928 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 2929 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2930 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2931 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2932 21:45:48.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2933 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2934 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2935 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2936 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2937 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2938 21:45:48.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 2939 21:45:48.594 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 2940 21:45:48.594 0.00013709 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 2941 21:45:48.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2942 21:45:48.594 0.00198519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2944 21:45:48.594 0.00191842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2945 21:45:48.610 0.00044168 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 2946 21:45:48.610 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2947 21:45:48.610 0.00048672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2948 21:45:48.610 0.00030657 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 01 2949 21:45:48.610 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2950 21:45:48.610 0.00024968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2951 21:45:48.610 0.00023625 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 2952 21:45:48.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2953 21:45:48.610 0.00026825 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 2954 21:45:48.610 0.00022400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2955 21:45:48.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2956 21:45:48.610 0.00442311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2957 21:45:48.610 0.00004227 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2958 21:45:48.610 0.00106785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2959 21:45:48.610 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2960 21:45:48.610 0.00093235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2961 21:45:48.610 0.00020030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2962 21:45:48.610 0.00083200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2963 21:45:48.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2964 21:45:48.610 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2965 21:45:48.610 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2966 21:45:48.610 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2967 21:45:48.610 0.00010746 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2968 21:45:48.610 0.00112711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2969 21:45:48.610 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2970 21:45:48.625 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2971 21:45:48.625 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2972 21:45:48.625 0.00124998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2973 21:45:48.625 0.00011654 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2974 21:45:48.625 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2975 21:45:48.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2976 21:45:48.625 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2977 21:45:48.625 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2978 21:45:48.625 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2979 21:45:48.625 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2980 21:45:48.625 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2981 21:45:48.625 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2982 21:45:48.625 0.00124761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2983 21:45:48.625 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2984 21:45:48.625 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2985 21:45:48.625 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2986 21:45:48.625 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2987 21:45:48.625 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2988 21:45:48.625 0.00140524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2989 21:45:48.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2990 21:45:48.625 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2991 21:45:48.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2992 21:45:48.641 0.00147872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2993 21:45:48.641 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2994 21:45:48.641 0.00118519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2995 21:45:48.641 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2996 21:45:48.641 0.00117057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2997 21:45:48.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 2998 21:45:48.641 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 2999 21:45:48.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3000 21:45:48.641 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3001 21:45:48.641 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3002 21:45:48.641 0.00141788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3003 21:45:48.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3004 21:45:48.641 0.00125748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3005 21:45:48.641 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3006 21:45:48.641 0.00139931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3007 21:45:48.641 0.00012049 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3008 21:45:48.641 0.00112435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3009 21:45:48.641 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3010 21:45:48.641 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3011 21:45:48.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3012 21:45:48.641 0.00127565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3013 21:45:48.657 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3014 21:45:48.657 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3015 21:45:48.657 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3017 21:45:48.657 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3018 21:45:48.657 0.00109590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3019 21:45:48.657 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3020 21:45:48.657 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3021 21:45:48.657 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3022 21:45:48.657 0.00113817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3023 21:45:48.657 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3024 21:45:48.657 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3025 21:45:48.657 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3026 21:45:48.657 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3027 21:45:48.657 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3028 21:45:48.657 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3029 21:45:48.657 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3030 21:45:48.657 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3031 21:45:48.657 0.00006874 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3032 21:45:48.657 0.00122864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3033 21:45:48.657 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3034 21:45:48.657 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3035 21:45:48.673 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3036 21:45:48.673 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3038 21:45:48.673 0.00117254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3039 21:45:48.673 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3040 21:45:48.673 0.00157590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3042 21:45:48.673 0.00104296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3043 21:45:48.673 0.00007783 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3044 21:45:48.673 0.00122074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3045 21:45:48.673 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3046 21:45:48.673 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3047 21:45:48.673 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3048 21:45:48.673 0.00137640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3049 21:45:48.673 0.00015921 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3050 21:45:48.673 0.00116622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3051 21:45:48.673 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3052 21:45:48.673 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3053 21:45:48.673 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3054 21:45:48.673 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3055 21:45:48.673 0.00012998 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3056 21:45:48.688 0.00125748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3057 21:45:48.688 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3058 21:45:48.688 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3059 21:45:48.688 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3060 21:45:48.688 0.00143605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3061 21:45:48.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3062 21:45:48.688 0.00147358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3063 21:45:48.688 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3064 21:45:48.688 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3065 21:45:48.688 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3066 21:45:48.688 0.00104533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3067 21:45:48.688 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3068 21:45:48.688 0.00120454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3069 21:45:48.688 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3070 21:45:48.688 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3071 21:45:48.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3072 21:45:48.688 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3073 21:45:48.688 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3074 21:45:48.688 0.00119309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3075 21:45:48.688 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3076 21:45:48.688 0.00135506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3077 21:45:48.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3078 21:45:48.703 0.00180504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3079 21:45:48.703 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3080 21:45:48.703 0.00090548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3081 21:45:48.703 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3082 21:45:48.703 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3083 21:45:48.703 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3084 21:45:48.703 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3085 21:45:48.703 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3086 21:45:48.703 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3087 21:45:48.703 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3088 21:45:48.703 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3089 21:45:48.703 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3090 21:45:48.703 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3091 21:45:48.703 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3092 21:45:48.703 0.00117215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3093 21:45:48.703 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 3094 21:45:48.703 0.00004978 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 3095 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3096 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 3097 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 3098 21:45:48.703 0.00003595 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3099 21:45:48.703 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3100 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 3101 21:45:48.703 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3103 21:45:48.703 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3104 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 3105 21:45:48.703 0.00004030 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3106 21:45:48.703 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3107 21:45:48.703 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3108 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3109 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3110 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3111 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3112 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3113 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3114 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3115 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 3116 21:45:48.703 0.00001857 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 3117 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3118 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3119 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 3120 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 3121 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3122 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3123 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3124 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3125 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3126 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3127 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3128 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3129 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3130 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3131 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3132 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3133 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3134 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3135 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3136 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3137 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3138 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3139 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3140 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3141 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3142 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3143 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3144 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3145 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3146 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3147 21:45:48.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 3148 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3149 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3150 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3151 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 3152 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3153 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3154 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3155 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3156 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3157 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3158 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3159 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3160 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3161 21:45:48.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3162 21:45:48.703 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 3163 21:45:48.703 0.00014854 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 3164 21:45:48.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3165 21:45:48.703 0.00192277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3166 21:45:48.703 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3167 21:45:48.703 0.00247151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3168 21:45:48.719 0.00018647 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 3169 21:45:48.719 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3170 21:45:48.719 0.00022598 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 11 3171 21:45:48.719 0.00020109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3172 21:45:48.719 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3173 21:45:48.719 0.00027141 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 3174 21:45:48.719 0.00018370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3175 21:45:48.719 0.00027931 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 3176 21:45:48.719 0.00014459 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3177 21:45:48.719 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3178 21:45:48.719 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3179 21:45:48.719 0.00572800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3180 21:45:48.719 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3181 21:45:48.719 0.00091891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3182 21:45:48.719 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3183 21:45:48.719 0.00086084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3184 21:45:48.719 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3185 21:45:48.719 0.00105363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3186 21:45:48.719 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3187 21:45:48.719 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3188 21:45:48.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3189 21:45:48.719 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3190 21:45:48.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3191 21:45:48.719 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3192 21:45:48.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3193 21:45:48.719 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3194 21:45:48.735 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3195 21:45:48.735 0.00059615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3196 21:45:48.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3197 21:45:48.735 0.00144040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3198 21:45:48.735 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3199 21:45:48.735 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3200 21:45:48.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3201 21:45:48.735 0.00119309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3202 21:45:48.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3203 21:45:48.735 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3204 21:45:48.735 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3205 21:45:48.735 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3206 21:45:48.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3207 21:45:48.735 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3208 21:45:48.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3209 21:45:48.735 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3210 21:45:48.735 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3211 21:45:48.735 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3212 21:45:48.735 0.00012089 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3213 21:45:48.735 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3214 21:45:48.735 0.00007941 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3215 21:45:48.735 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3216 21:45:48.750 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3217 21:45:48.750 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3218 21:45:48.750 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3219 21:45:48.750 0.00116306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3220 21:45:48.750 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3221 21:45:48.750 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3222 21:45:48.750 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3223 21:45:48.750 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3226 21:45:48.750 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3227 21:45:48.750 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3228 21:45:48.750 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3229 21:45:48.750 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3230 21:45:48.750 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3231 21:45:48.750 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3232 21:45:48.750 0.00020030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3233 21:45:48.750 0.00108642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3234 21:45:48.750 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3235 21:45:48.750 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3236 21:45:48.750 0.00015881 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3237 21:45:48.766 0.00117175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3238 21:45:48.766 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3239 21:45:48.766 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3240 21:45:48.766 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3241 21:45:48.766 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3242 21:45:48.766 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3243 21:45:48.766 0.00141511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3244 21:45:48.766 0.00005689 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3245 21:45:48.766 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3246 21:45:48.766 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3247 21:45:48.766 0.00142222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3248 21:45:48.766 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3249 21:45:48.766 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3250 21:45:48.766 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3251 21:45:48.766 0.00145501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3252 21:45:48.766 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3253 21:45:48.766 0.00106706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3254 21:45:48.766 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3255 21:45:48.766 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3256 21:45:48.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3257 21:45:48.766 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3258 21:45:48.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3259 21:45:48.782 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3260 21:45:48.782 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3261 21:45:48.782 0.00119822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3262 21:45:48.782 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3263 21:45:48.782 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3264 21:45:48.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3265 21:45:48.782 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3266 21:45:48.782 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3267 21:45:48.782 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3268 21:45:48.782 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3269 21:45:48.782 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3270 21:45:48.782 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3271 21:45:48.782 0.00127328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3272 21:45:48.782 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3273 21:45:48.782 0.00148938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3274 21:45:48.782 0.00007151 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3275 21:45:48.782 0.00092168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3276 21:45:48.782 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3277 21:45:48.782 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3278 21:45:48.782 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3279 21:45:48.782 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3280 21:45:48.797 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3281 21:45:48.797 0.00109432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3282 21:45:48.797 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3283 21:45:48.797 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3284 21:45:48.797 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3285 21:45:48.797 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3286 21:45:48.797 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3287 21:45:48.797 0.00117057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3288 21:45:48.797 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3289 21:45:48.797 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3290 21:45:48.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3291 21:45:48.797 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3292 21:45:48.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3293 21:45:48.797 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3294 21:45:48.797 0.00003872 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3295 21:45:48.797 0.00141946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3296 21:45:48.797 0.00008731 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3297 21:45:48.797 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3298 21:45:48.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3299 21:45:48.797 0.00122074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3300 21:45:48.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3301 21:45:48.797 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3302 21:45:48.813 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3303 21:45:48.813 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3304 21:45:48.813 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3305 21:45:48.813 0.00121995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3306 21:45:48.813 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3307 21:45:48.813 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3308 21:45:48.813 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3309 21:45:48.813 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3310 21:45:48.813 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3311 21:45:48.813 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3312 21:45:48.813 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3313 21:45:48.813 0.00142696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3314 21:45:48.813 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3315 21:45:48.813 0.00155812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3316 21:45:48.813 0.00001383 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 3317 21:45:48.813 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 3318 21:45:48.813 0.00005412 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 11 3319 21:45:48.813 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 3320 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 3321 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3322 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3323 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3324 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3325 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 3326 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 3327 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3328 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3329 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3330 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3331 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3332 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3333 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3334 21:45:48.813 0.00007269 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3335 21:45:48.813 0.00003832 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3336 21:45:48.813 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3337 21:45:48.813 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3338 21:45:48.813 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3339 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3340 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3341 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 3342 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 3343 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3344 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3345 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3346 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3347 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3348 21:45:48.813 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3349 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3350 21:45:48.813 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3351 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3352 21:45:48.813 0.00003042 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3353 21:45:48.813 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3354 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3355 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3356 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3357 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 3358 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 3359 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3360 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3361 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3362 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3363 21:45:48.813 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3364 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3365 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3366 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3367 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3368 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3369 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3370 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3371 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3372 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3373 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 3374 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3375 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3376 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3377 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3378 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3379 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3380 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3381 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3382 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3383 21:45:48.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3384 21:45:48.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3385 21:45:48.813 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 3386 21:45:48.813 0.00010983 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 3387 21:45:48.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3388 21:45:48.813 0.00213096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3389 21:45:48.813 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3390 21:45:48.813 0.00243003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3391 21:45:48.829 0.00032948 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 3392 21:45:48.829 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3393 21:45:48.829 0.00034015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3394 21:45:48.829 0.00025086 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 01 3395 21:45:48.829 0.00025719 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 3396 21:45:48.829 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3397 21:45:48.829 0.00020148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3398 21:45:48.829 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3399 21:45:48.829 0.00027457 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 3400 21:45:48.829 0.00030617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3401 21:45:48.829 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3402 21:45:48.829 0.00497541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3403 21:45:48.829 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3404 21:45:48.829 0.00100069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3405 21:45:48.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3406 21:45:48.829 0.00101926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3407 21:45:48.829 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3408 21:45:48.829 0.00102440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3409 21:45:48.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3410 21:45:48.829 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3411 21:45:48.829 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3412 21:45:48.829 0.00143684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3413 21:45:48.829 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3414 21:45:48.829 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3415 21:45:48.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3416 21:45:48.829 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3417 21:45:48.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3418 21:45:48.844 0.00135743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3419 21:45:48.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3420 21:45:48.844 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3421 21:45:48.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3422 21:45:48.844 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3423 21:45:48.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3424 21:45:48.844 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3425 21:45:48.844 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3426 21:45:48.844 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3427 21:45:48.844 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3428 21:45:48.844 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3429 21:45:48.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3430 21:45:48.844 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3431 21:45:48.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3432 21:45:48.844 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3433 21:45:48.844 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3434 21:45:48.844 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3435 21:45:48.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3436 21:45:48.844 0.00136968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3437 21:45:48.860 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3438 21:45:48.860 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3439 21:45:48.860 0.00006874 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3440 21:45:48.860 0.00132188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3441 21:45:48.860 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3442 21:45:48.860 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3443 21:45:48.860 0.00012365 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3444 21:45:48.860 0.00102084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3445 21:45:48.860 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3446 21:45:48.860 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3447 21:45:48.860 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3448 21:45:48.860 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3449 21:45:48.860 0.00012840 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3450 21:45:48.860 0.00121126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3451 21:45:48.860 0.00012326 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3452 21:45:48.860 0.00117333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3453 21:45:48.860 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3454 21:45:48.860 0.00128869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3455 21:45:48.860 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3456 21:45:48.860 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3457 21:45:48.860 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3458 21:45:48.860 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3459 21:45:48.876 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3460 21:45:48.876 0.00140444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3461 21:45:48.876 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3462 21:45:48.876 0.00104454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3463 21:45:48.876 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3464 21:45:48.876 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3465 21:45:48.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3466 21:45:48.876 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3467 21:45:48.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3468 21:45:48.876 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3469 21:45:48.876 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3470 21:45:48.876 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3471 21:45:48.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3472 21:45:48.876 0.00144553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3473 21:45:48.876 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3474 21:45:48.876 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3475 21:45:48.876 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3476 21:45:48.876 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3477 21:45:48.876 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3478 21:45:48.876 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3479 21:45:48.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3480 21:45:48.876 0.00146726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3481 21:45:48.891 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3482 21:45:48.891 0.00142143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3483 21:45:48.891 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3484 21:45:48.891 0.00110301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3485 21:45:48.891 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3486 21:45:48.891 0.00115319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3487 21:45:48.891 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3488 21:45:48.891 0.00135190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3489 21:45:48.891 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3490 21:45:48.891 0.00143684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3491 21:45:48.891 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3492 21:45:48.891 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3493 21:45:48.891 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3494 21:45:48.891 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3495 21:45:48.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3496 21:45:48.891 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3497 21:45:48.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3498 21:45:48.891 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3499 21:45:48.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3500 21:45:48.891 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3501 21:45:48.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3502 21:45:48.906 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3503 21:45:48.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3504 21:45:48.906 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3505 21:45:48.906 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3506 21:45:48.906 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3507 21:45:48.906 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3508 21:45:48.906 0.00114489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3509 21:45:48.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3510 21:45:48.906 0.00144435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3511 21:45:48.906 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3512 21:45:48.906 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3513 21:45:48.906 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3514 21:45:48.906 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3515 21:45:48.906 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3516 21:45:48.906 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3517 21:45:48.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3518 21:45:48.906 0.00138272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3519 21:45:48.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3520 21:45:48.906 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3521 21:45:48.906 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3522 21:45:48.906 0.00144119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3523 21:45:48.922 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3524 21:45:48.922 0.00121165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3525 21:45:48.922 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3526 21:45:48.922 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3527 21:45:48.922 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3528 21:45:48.922 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3529 21:45:48.922 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3530 21:45:48.922 0.00128000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3531 21:45:48.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3532 21:45:48.922 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3533 21:45:48.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3534 21:45:48.922 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3535 21:45:48.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3536 21:45:48.922 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3537 21:45:48.922 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3538 21:45:48.922 0.00137482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3539 21:45:48.922 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 3540 21:45:48.922 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 3541 21:45:48.922 0.00004306 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3542 21:45:48.922 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 3543 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 3544 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3545 21:45:48.922 0.00002212 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3546 21:45:48.922 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3547 21:45:48.922 0.00003635 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3548 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3549 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3550 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3551 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3552 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3553 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3554 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3555 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3556 21:45:48.922 0.00003872 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3557 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3558 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3559 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3560 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3561 21:45:48.922 0.00004267 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 3562 21:45:48.922 0.00003990 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3563 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3564 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3565 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 3566 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 3567 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3568 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3569 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3570 21:45:48.922 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3571 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3572 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3573 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3574 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3575 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3576 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3577 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3578 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 3579 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3580 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3581 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3582 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 3583 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3584 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3585 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3586 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3587 21:45:48.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3588 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3589 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3590 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3591 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3592 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3593 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 3594 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 3595 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3596 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3597 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 3598 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 3599 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3600 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3601 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3602 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3603 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3604 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3605 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3606 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 3607 21:45:48.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3608 21:45:48.922 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 3609 21:45:48.922 0.00022123 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 3610 21:45:48.922 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3611 21:45:48.922 0.00190973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3612 21:45:48.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3613 21:45:48.922 0.00165215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3614 21:45:48.937 0.00023427 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 3615 21:45:48.937 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3616 21:45:48.937 0.00027022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3617 21:45:48.937 0.00022874 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 11 3618 21:45:48.937 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3619 21:45:48.937 0.00022242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3620 21:45:48.937 0.00013985 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 3621 21:45:48.937 0.00085649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3622 21:45:48.937 0.00030143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3623 21:45:48.937 0.00018607 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 3624 21:45:48.937 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3625 21:45:48.937 0.00486361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3626 21:45:48.937 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3627 21:45:48.937 0.00105798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3628 21:45:48.937 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3629 21:45:48.937 0.00093235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3630 21:45:48.937 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3631 21:45:48.937 0.00091812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3632 21:45:48.937 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3633 21:45:48.937 0.00120652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3634 21:45:48.937 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3635 21:45:48.937 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3636 21:45:48.937 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3637 21:45:48.937 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3638 21:45:48.937 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3639 21:45:48.937 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3640 21:45:48.953 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3641 21:45:48.953 0.00120138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3642 21:45:48.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3643 21:45:48.953 0.00148464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3644 21:45:48.953 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3645 21:45:48.953 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3646 21:45:48.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3647 21:45:48.953 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3648 21:45:48.953 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3649 21:45:48.953 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3650 21:45:48.953 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3651 21:45:48.953 0.00104652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3652 21:45:48.953 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3653 21:45:48.953 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3654 21:45:48.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3655 21:45:48.953 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3656 21:45:48.953 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3657 21:45:48.953 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3658 21:45:48.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3659 21:45:48.953 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3660 21:45:48.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3661 21:45:48.953 0.00140365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3662 21:45:48.969 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3663 21:45:48.969 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3664 21:45:48.969 0.00011694 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3665 21:45:48.969 0.00118440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3666 21:45:48.969 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3667 21:45:48.969 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3668 21:45:48.969 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3669 21:45:48.969 0.00137600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3670 21:45:48.969 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3671 21:45:48.969 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3672 21:45:48.969 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3673 21:45:48.969 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3674 21:45:48.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3675 21:45:48.969 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3676 21:45:48.969 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3677 21:45:48.969 0.00140326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3678 21:45:48.969 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3679 21:45:48.969 0.00141946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3680 21:45:48.969 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3681 21:45:48.969 0.00115161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3682 21:45:48.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3683 21:45:48.969 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3684 21:45:48.984 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3685 21:45:48.984 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3686 21:45:48.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3687 21:45:48.984 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3688 21:45:48.984 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3689 21:45:48.984 0.00141827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3690 21:45:48.984 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3691 21:45:48.984 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3692 21:45:48.984 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3693 21:45:48.984 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3694 21:45:48.984 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3695 21:45:48.984 0.00105640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3696 21:45:48.984 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3697 21:45:48.984 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3698 21:45:48.984 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3699 21:45:48.984 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3700 21:45:48.984 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3701 21:45:48.984 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3702 21:45:48.984 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3703 21:45:48.984 0.00127447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3704 21:45:49.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3705 21:45:49.000 0.00143724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3706 21:45:49.000 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3707 21:45:49.000 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3708 21:45:49.000 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3709 21:45:49.000 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3710 21:45:49.000 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3711 21:45:49.000 0.00112158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3712 21:45:49.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3713 21:45:49.000 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3714 21:45:49.000 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3715 21:45:49.000 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3716 21:45:49.000 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3717 21:45:49.000 0.00142025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3718 21:45:49.000 0.00013867 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3719 21:45:49.000 0.00090390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3720 21:45:49.000 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3721 21:45:49.000 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3722 21:45:49.000 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3723 21:45:49.000 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3724 21:45:49.000 0.00015486 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3725 21:45:49.000 0.00115951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3726 21:45:49.016 0.00015289 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3727 21:45:49.016 0.00117491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3728 21:45:49.016 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3729 21:45:49.016 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3730 21:45:49.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3731 21:45:49.016 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3732 21:45:49.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3733 21:45:49.016 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3734 21:45:49.016 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3735 21:45:49.016 0.00125432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3736 21:45:49.016 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3737 21:45:49.016 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3738 21:45:49.016 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3739 21:45:49.016 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3740 21:45:49.016 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3741 21:45:49.016 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3742 21:45:49.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3743 21:45:49.016 0.00140207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3744 21:45:49.016 0.00007704 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3745 21:45:49.016 0.00121244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3748 21:45:49.031 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3749 21:45:49.031 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3750 21:45:49.031 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3751 21:45:49.031 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3752 21:45:49.031 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3753 21:45:49.031 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3754 21:45:49.031 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3755 21:45:49.031 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3756 21:45:49.031 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3757 21:45:49.031 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3758 21:45:49.031 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3759 21:45:49.031 0.00109077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3760 21:45:49.031 0.00009837 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3761 21:45:49.031 0.00187457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3762 21:45:49.031 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 3763 21:45:49.031 0.00011417 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 3764 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 11 3765 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 3766 21:45:49.031 0.00008731 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 3767 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3768 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3769 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3770 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3771 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 3772 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 3773 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3774 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3775 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3776 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3777 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3778 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3779 21:45:49.031 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3780 21:45:49.031 0.00006953 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3781 21:45:49.031 0.00004978 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3782 21:45:49.031 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3783 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3784 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3785 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3786 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3787 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 3788 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 3789 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3790 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3791 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3792 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3793 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3794 21:45:49.031 0.00006677 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3795 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3796 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3797 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3798 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3799 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3800 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3801 21:45:49.031 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3802 21:45:49.031 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3803 21:45:49.031 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 3804 21:45:49.031 0.00004662 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 3805 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3806 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3807 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3808 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3809 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3810 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3811 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3812 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3813 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3814 21:45:49.031 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3815 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 3816 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3817 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 3818 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3819 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 3820 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 3821 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3822 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3823 21:45:49.031 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3824 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3825 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3826 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3827 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3828 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3829 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3830 21:45:49.031 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 3831 21:45:49.031 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 3832 21:45:49.031 0.00012207 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 3833 21:45:49.031 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3834 21:45:49.031 0.00193501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3835 21:45:49.031 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3836 21:45:49.031 0.00203575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3837 21:45:49.047 0.00016711 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 3838 21:45:49.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3839 21:45:49.047 0.00021649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3840 21:45:49.047 0.00018410 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 02 3841 21:45:49.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3842 21:45:49.047 0.00109116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3843 21:45:49.047 0.00103388 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 3844 21:45:49.047 0.00014894 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 3845 21:45:49.047 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3846 21:45:49.047 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3847 21:45:49.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3848 21:45:49.047 0.00492563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3849 21:45:49.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3850 21:45:49.047 0.00100385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3851 21:45:49.047 0.00006440 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3852 21:45:49.047 0.00096395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3853 21:45:49.047 0.00008573 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3854 21:45:49.047 0.00088415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3855 21:45:49.047 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3856 21:45:49.047 0.00154983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3857 21:45:49.047 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3858 21:45:49.047 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3859 21:45:49.047 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3860 21:45:49.047 0.00111447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3861 21:45:49.047 0.00011417 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3862 21:45:49.047 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3863 21:45:49.063 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3864 21:45:49.063 0.00134519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3865 21:45:49.063 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3866 21:45:49.063 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3867 21:45:49.063 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3868 21:45:49.063 0.00135862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3869 21:45:49.063 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3870 21:45:49.063 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3871 21:45:49.063 0.00006281 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3872 21:45:49.063 0.00123062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3873 21:45:49.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3874 21:45:49.063 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3875 21:45:49.063 0.00004267 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3876 21:45:49.063 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3877 21:45:49.063 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3878 21:45:49.063 0.00125946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3879 21:45:49.063 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3880 21:45:49.063 0.00149886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3881 21:45:49.063 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3882 21:45:49.063 0.00114568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3883 21:45:49.063 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3884 21:45:49.063 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3885 21:45:49.078 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3886 21:45:49.078 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3887 21:45:49.078 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3888 21:45:49.078 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3889 21:45:49.078 0.00007980 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3890 21:45:49.078 0.00139931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3891 21:45:49.078 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3892 21:45:49.078 0.00105442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3893 21:45:49.078 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3894 21:45:49.078 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3895 21:45:49.078 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3896 21:45:49.078 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3897 21:45:49.078 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3898 21:45:49.078 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3899 21:45:49.078 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3900 21:45:49.078 0.00121442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3901 21:45:49.078 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3902 21:45:49.078 0.00137600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3903 21:45:49.078 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3904 21:45:49.078 0.00148306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3905 21:45:49.094 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3906 21:45:49.094 0.00092405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3907 21:45:49.094 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3908 21:45:49.094 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3909 21:45:49.094 0.00011457 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3910 21:45:49.094 0.00112395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3911 21:45:49.094 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3912 21:45:49.094 0.00126894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3913 21:45:49.094 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3914 21:45:49.094 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3915 21:45:49.094 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3916 21:45:49.094 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3917 21:45:49.094 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3918 21:45:49.094 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3919 21:45:49.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3920 21:45:49.094 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3921 21:45:49.094 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3922 21:45:49.094 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3923 21:45:49.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3924 21:45:49.094 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3925 21:45:49.094 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3926 21:45:49.094 0.00138469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3927 21:45:49.110 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3928 21:45:49.110 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3929 21:45:49.110 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3930 21:45:49.110 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3931 21:45:49.110 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3932 21:45:49.110 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3933 21:45:49.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3934 21:45:49.110 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3935 21:45:49.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3936 21:45:49.110 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3937 21:45:49.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3938 21:45:49.110 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3939 21:45:49.110 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3940 21:45:49.110 0.00134558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3941 21:45:49.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3942 21:45:49.110 0.00133886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3943 21:45:49.110 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3944 21:45:49.110 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3945 21:45:49.110 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3946 21:45:49.110 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3947 21:45:49.110 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3948 21:45:49.110 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3949 21:45:49.125 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3950 21:45:49.125 0.00139615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3951 21:45:49.125 0.00006716 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3952 21:45:49.125 0.00105561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3953 21:45:49.125 0.00007941 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3954 21:45:49.125 0.00111803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3955 21:45:49.125 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3957 21:45:49.125 0.00008138 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3958 21:45:49.125 0.00135664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3959 21:45:49.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3960 21:45:49.125 0.00142736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3961 21:45:49.125 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3962 21:45:49.125 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3963 21:45:49.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3964 21:45:49.125 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3965 21:45:49.125 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3966 21:45:49.125 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3967 21:45:49.125 0.00008494 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3968 21:45:49.125 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3969 21:45:49.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3970 21:45:49.125 0.00140128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3971 21:45:49.141 0.00008099 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3972 21:45:49.141 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3973 21:45:49.141 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3974 21:45:49.141 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3975 21:45:49.141 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3976 21:45:49.141 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3977 21:45:49.141 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3978 21:45:49.141 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3979 21:45:49.141 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3980 21:45:49.141 0.00140682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3981 21:45:49.141 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3982 21:45:49.141 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3983 21:45:49.141 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 3984 21:45:49.141 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 3985 21:45:49.141 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 3986 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 3987 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 02 3988 21:45:49.141 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3990 21:45:49.141 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3991 21:45:49.141 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3992 21:45:49.141 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 3993 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3994 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3995 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 3996 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 3997 21:45:49.141 0.00004346 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 3998 21:45:49.141 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 3999 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4000 21:45:49.141 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4001 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4002 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4003 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4004 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4005 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4006 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4007 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 4008 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 4009 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4010 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4011 21:45:49.141 0.00000356 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 4012 21:45:49.141 0.00001580 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 4013 21:45:49.141 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4014 21:45:49.141 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4015 21:45:49.141 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4016 21:45:49.141 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4017 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4018 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4019 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4020 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4021 21:45:49.141 0.00003160 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4022 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4023 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4024 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4025 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4026 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4027 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4028 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4029 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4030 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4031 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4032 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4033 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4034 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4035 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4036 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4037 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4038 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4039 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 4040 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4041 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4042 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4043 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 4044 21:45:49.141 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4045 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4046 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4047 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4048 21:45:49.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4049 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4050 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4051 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4052 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4053 21:45:49.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4054 21:45:49.141 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 4055 21:45:49.141 0.00009719 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 4056 21:45:49.141 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4057 21:45:49.141 0.00198993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4058 21:45:49.141 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4059 21:45:49.141 0.00289146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4060 21:45:49.156 0.00014815 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 4061 21:45:49.156 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4062 21:45:49.156 0.00019319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4063 21:45:49.156 0.00012998 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 12 4064 21:45:49.156 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4065 21:45:49.156 0.00020227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4066 21:45:49.156 0.00018252 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 4067 21:45:49.156 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4068 21:45:49.156 0.00019872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4069 21:45:49.156 0.00014657 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 4070 21:45:49.156 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4071 21:45:49.156 0.00513738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4072 21:45:49.156 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4073 21:45:49.156 0.00098212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4074 21:45:49.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4075 21:45:49.156 0.00114370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4076 21:45:49.156 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4077 21:45:49.156 0.00090825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4078 21:45:49.156 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4079 21:45:49.156 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4080 21:45:49.156 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4081 21:45:49.156 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4082 21:45:49.156 0.00021610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4083 21:45:49.156 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4084 21:45:49.156 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4085 21:45:49.156 0.00119901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4086 21:45:49.172 0.00007743 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4087 21:45:49.172 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4088 21:45:49.172 0.00011338 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4089 21:45:49.172 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4090 21:45:49.172 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4091 21:45:49.172 0.00145857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4092 21:45:49.172 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4093 21:45:49.172 0.00123733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4094 21:45:49.172 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4095 21:45:49.172 0.00119467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4096 21:45:49.172 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4097 21:45:49.172 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4098 21:45:49.172 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4099 21:45:49.172 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4100 21:45:49.172 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4101 21:45:49.172 0.00112435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4102 21:45:49.172 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4103 21:45:49.172 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4104 21:45:49.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4105 21:45:49.172 0.00115319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4106 21:45:49.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4107 21:45:49.172 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4109 21:45:49.188 0.00101254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4110 21:45:49.188 0.00008612 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4111 21:45:49.188 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4112 21:45:49.188 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4113 21:45:49.188 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4114 21:45:49.188 0.00015249 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4115 21:45:49.188 0.00103585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4116 21:45:49.188 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4117 21:45:49.188 0.00116820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4118 21:45:49.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4119 21:45:49.188 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4120 21:45:49.188 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4121 21:45:49.188 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4122 21:45:49.188 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4123 21:45:49.188 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4124 21:45:49.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4125 21:45:49.188 0.00123062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4126 21:45:49.188 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4127 21:45:49.188 0.00136810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4130 21:45:49.203 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4131 21:45:49.203 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4132 21:45:49.203 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4133 21:45:49.203 0.00148227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4134 21:45:49.203 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4135 21:45:49.203 0.00115477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4136 21:45:49.203 0.00017264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4137 21:45:49.203 0.00116306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4138 21:45:49.203 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4139 21:45:49.203 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4140 21:45:49.203 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4141 21:45:49.203 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4142 21:45:49.203 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4143 21:45:49.203 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4144 21:45:49.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4145 21:45:49.203 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4146 21:45:49.203 0.00008415 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4147 21:45:49.203 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4148 21:45:49.203 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4149 21:45:49.203 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4150 21:45:49.219 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4151 21:45:49.219 0.00134835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4152 21:45:49.219 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4153 21:45:49.219 0.00127091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4154 21:45:49.219 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4155 21:45:49.219 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4156 21:45:49.219 0.00008889 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4157 21:45:49.219 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4158 21:45:49.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4159 21:45:49.219 0.00151862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4160 21:45:49.219 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4161 21:45:49.219 0.00113146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4162 21:45:49.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4163 21:45:49.219 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4164 21:45:49.219 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4165 21:45:49.219 0.00148148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4166 21:45:49.219 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4167 21:45:49.219 0.00140761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4168 21:45:49.219 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4169 21:45:49.219 0.00142775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4170 21:45:49.219 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4171 21:45:49.219 0.00132978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4172 21:45:49.235 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4173 21:45:49.235 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4174 21:45:49.235 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4175 21:45:49.235 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4176 21:45:49.235 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4177 21:45:49.235 0.00138469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4178 21:45:49.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4179 21:45:49.235 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4180 21:45:49.235 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4181 21:45:49.235 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4182 21:45:49.235 0.00008138 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4183 21:45:49.235 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4184 21:45:49.235 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4185 21:45:49.235 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4186 21:45:49.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4187 21:45:49.235 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4188 21:45:49.235 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4189 21:45:49.235 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4190 21:45:49.235 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4191 21:45:49.235 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4192 21:45:49.235 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4193 21:45:49.235 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4194 21:45:49.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4195 21:45:49.250 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4196 21:45:49.250 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4197 21:45:49.250 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4198 21:45:49.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4199 21:45:49.250 0.00139615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4200 21:45:49.250 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4201 21:45:49.250 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4202 21:45:49.250 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4203 21:45:49.250 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4204 21:45:49.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4205 21:45:49.250 0.00145383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4206 21:45:49.250 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4207 21:45:49.250 0.00153086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4208 21:45:49.250 0.00000553 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 4209 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 4210 21:45:49.250 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 12 4211 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4212 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4213 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4214 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4215 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4216 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4217 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4218 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 4219 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4220 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4221 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4222 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4223 21:45:49.250 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4224 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4225 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4226 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4227 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4228 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4229 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4230 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4231 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4232 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4233 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4234 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4235 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4236 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4237 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4238 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4239 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4240 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4241 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4242 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4243 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4244 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4245 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4246 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4247 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4248 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4249 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4250 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 4251 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4252 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4253 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4254 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4255 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4256 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4257 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4258 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4259 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4260 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4261 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4262 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4263 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4264 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4265 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4266 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 4267 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4268 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4269 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4270 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4271 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4272 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4273 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4274 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4275 21:45:49.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4276 21:45:49.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4277 21:45:49.250 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 4278 21:45:49.250 0.00024336 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 4279 21:45:49.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4280 21:45:49.250 0.00188168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4281 21:45:49.250 0.00013195 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4282 21:45:49.250 0.00224948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4283 21:45:49.266 0.00021926 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 4284 21:45:49.266 0.00008810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4285 21:45:49.266 0.00025442 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 02 4286 21:45:49.266 0.00014736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4287 21:45:49.266 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4288 21:45:49.266 0.00021610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4289 21:45:49.266 0.00018489 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 4290 21:45:49.266 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4291 21:45:49.266 0.00018173 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 4292 21:45:49.266 0.00013906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4293 21:45:49.266 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4294 21:45:49.266 0.00533255 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4295 21:45:49.266 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4296 21:45:49.266 0.00089758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4297 21:45:49.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4298 21:45:49.266 0.00107101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4299 21:45:49.266 0.00010430 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4300 21:45:49.266 0.00086716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4301 21:45:49.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4302 21:45:49.266 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4303 21:45:49.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4304 21:45:49.266 0.00140365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4305 21:45:49.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4306 21:45:49.266 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4307 21:45:49.266 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4308 21:45:49.266 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4309 21:45:49.282 0.00015605 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4310 21:45:49.282 0.00106351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4311 21:45:49.282 0.00009047 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4312 21:45:49.282 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4313 21:45:49.282 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4314 21:45:49.282 0.00140761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4315 21:45:49.282 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4316 21:45:49.282 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4317 21:45:49.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4318 21:45:49.282 0.00131556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4319 21:45:49.282 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4320 21:45:49.282 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4321 21:45:49.282 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4322 21:45:49.282 0.00144869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4323 21:45:49.282 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4324 21:45:49.282 0.00088928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4325 21:45:49.282 0.00011852 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4326 21:45:49.282 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4327 21:45:49.282 0.00008296 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4328 21:45:49.282 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4329 21:45:49.297 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4330 21:45:49.297 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4331 21:45:49.297 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4332 21:45:49.297 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4333 21:45:49.297 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4334 21:45:49.297 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4335 21:45:49.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4336 21:45:49.297 0.00154114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4337 21:45:49.297 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4338 21:45:49.297 0.00121126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4339 21:45:49.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4340 21:45:49.297 0.00117373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4341 21:45:49.297 0.00009323 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4342 21:45:49.297 0.00121995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4343 21:45:49.297 0.00017264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4344 21:45:49.297 0.00121521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4345 21:45:49.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4346 21:45:49.297 0.00144711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4347 21:45:49.297 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4348 21:45:49.297 0.00105086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4349 21:45:49.297 0.00008059 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4350 21:45:49.297 0.00115279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4351 21:45:49.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4352 21:45:49.313 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4353 21:45:49.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4354 21:45:49.313 0.00139970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4355 21:45:49.313 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4356 21:45:49.313 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4357 21:45:49.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4358 21:45:49.313 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4359 21:45:49.313 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4360 21:45:49.313 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4361 21:45:49.313 0.00010904 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4362 21:45:49.313 0.00121640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4364 21:45:49.313 0.00123101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4365 21:45:49.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4366 21:45:49.313 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4367 21:45:49.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4368 21:45:49.313 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4369 21:45:49.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4370 21:45:49.313 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4371 21:45:49.313 0.00011378 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4372 21:45:49.313 0.00125393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4373 21:45:49.329 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4374 21:45:49.329 0.00114568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4375 21:45:49.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4376 21:45:49.329 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4377 21:45:49.329 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4378 21:45:49.329 0.00138153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4379 21:45:49.329 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4380 21:45:49.329 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4381 21:45:49.329 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4382 21:45:49.329 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4383 21:45:49.329 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4384 21:45:49.329 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4385 21:45:49.329 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4386 21:45:49.329 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4387 21:45:49.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4388 21:45:49.329 0.00117728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4389 21:45:49.329 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4390 21:45:49.329 0.00131556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4391 21:45:49.329 0.00011220 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4392 21:45:49.329 0.00110696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4393 21:45:49.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4394 21:45:49.329 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4395 21:45:49.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4396 21:45:49.344 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4397 21:45:49.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4398 21:45:49.344 0.00131121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4399 21:45:49.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4400 21:45:49.344 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4401 21:45:49.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4402 21:45:49.344 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4403 21:45:49.344 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4404 21:45:49.344 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4405 21:45:49.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4406 21:45:49.344 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4407 21:45:49.344 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4408 21:45:49.344 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4409 21:45:49.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4410 21:45:49.344 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4411 21:45:49.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4412 21:45:49.344 0.00139773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4413 21:45:49.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4414 21:45:49.344 0.00144198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4415 21:45:49.360 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4416 21:45:49.360 0.00121561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4417 21:45:49.360 0.00010983 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4418 21:45:49.360 0.00113580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4419 21:45:49.360 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4420 21:45:49.360 0.00120059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4421 21:45:49.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4422 21:45:49.360 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4423 21:45:49.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4424 21:45:49.360 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4425 21:45:49.360 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4426 21:45:49.360 0.00118400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4427 21:45:49.360 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4428 21:45:49.360 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4429 21:45:49.360 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4430 21:45:49.360 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4431 21:45:49.360 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 4432 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 4433 21:45:49.360 0.00002884 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 02 4434 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4435 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4436 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4437 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4438 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4439 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4440 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4441 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4442 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4443 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4444 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4445 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4446 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4447 21:45:49.360 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4448 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4449 21:45:49.360 0.00004346 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4450 21:45:49.360 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4451 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4452 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4453 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 4454 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4455 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4456 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4457 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 4458 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4459 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4460 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4461 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4462 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4463 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4464 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4465 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4466 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4467 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4468 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4469 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4470 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4471 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4472 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4473 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4474 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4475 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4476 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4477 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4478 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4479 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4480 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4481 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4482 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4483 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4484 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4485 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 4486 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4487 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4488 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4489 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 4490 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4491 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4492 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4493 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4494 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4495 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4496 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4497 21:45:49.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4498 21:45:49.360 0.00002765 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4499 21:45:49.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4500 21:45:49.360 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 4501 21:45:49.360 0.00015842 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 4502 21:45:49.360 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4503 21:45:49.360 0.00201679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4504 21:45:49.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4505 21:45:49.360 0.00225343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4506 21:45:49.376 0.00020227 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 4507 21:45:49.376 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4508 21:45:49.376 0.00017264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4509 21:45:49.376 0.00010351 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 12 4510 21:45:49.376 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4511 21:45:49.376 0.00028840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4512 21:45:49.376 0.00023546 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 4513 21:45:49.376 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4514 21:45:49.376 0.00023862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4515 21:45:49.376 0.00019635 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 4516 21:45:49.376 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4517 21:45:49.376 0.00414933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4518 21:45:49.376 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4519 21:45:49.376 0.00086637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4520 21:45:49.376 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4521 21:45:49.376 0.00098331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4522 21:45:49.376 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4523 21:45:49.376 0.00109590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4524 21:45:49.376 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4525 21:45:49.376 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4526 21:45:49.376 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4527 21:45:49.376 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4528 21:45:49.376 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4529 21:45:49.376 0.00143842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4530 21:45:49.376 0.00012089 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4531 21:45:49.376 0.00119664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4532 21:45:49.391 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4533 21:45:49.391 0.00161975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4534 21:45:49.391 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4535 21:45:49.391 0.00088020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4536 21:45:49.391 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4537 21:45:49.391 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4538 21:45:49.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4539 21:45:49.391 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4540 21:45:49.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4541 21:45:49.391 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4542 21:45:49.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4543 21:45:49.391 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4544 21:45:49.391 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4545 21:45:49.391 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4546 21:45:49.391 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4547 21:45:49.391 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4548 21:45:49.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4549 21:45:49.391 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4550 21:45:49.391 0.00006914 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4551 21:45:49.391 0.00137403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4552 21:45:49.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4553 21:45:49.407 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4554 21:45:49.407 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4555 21:45:49.407 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4556 21:45:49.407 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4557 21:45:49.407 0.00115082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4558 21:45:49.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4559 21:45:49.407 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4560 21:45:49.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4561 21:45:49.407 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4562 21:45:49.407 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4563 21:45:49.407 0.00134558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4564 21:45:49.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4565 21:45:49.407 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4566 21:45:49.407 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4567 21:45:49.407 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4568 21:45:49.407 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4569 21:45:49.407 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4570 21:45:49.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4571 21:45:49.407 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4572 21:45:49.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4573 21:45:49.407 0.00144869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4574 21:45:49.422 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4575 21:45:49.422 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4576 21:45:49.422 0.00009047 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4577 21:45:49.422 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4578 21:45:49.422 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4579 21:45:49.422 0.00120217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4580 21:45:49.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4581 21:45:49.422 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4582 21:45:49.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4583 21:45:49.422 0.00142736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4584 21:45:49.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4585 21:45:49.422 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4586 21:45:49.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4587 21:45:49.422 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4588 21:45:49.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4589 21:45:49.422 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4590 21:45:49.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4591 21:45:49.422 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4592 21:45:49.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4593 21:45:49.422 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4594 21:45:49.422 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4595 21:45:49.422 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4596 21:45:49.438 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4597 21:45:49.438 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4598 21:45:49.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4599 21:45:49.438 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4600 21:45:49.438 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4601 21:45:49.438 0.00154746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4602 21:45:49.438 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4603 21:45:49.438 0.00090232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4604 21:45:49.438 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4605 21:45:49.438 0.00122864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4606 21:45:49.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4607 21:45:49.438 0.00136573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4608 21:45:49.438 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4609 21:45:49.438 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4610 21:45:49.438 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4611 21:45:49.438 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4612 21:45:49.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4613 21:45:49.438 0.00142538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4614 21:45:49.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4615 21:45:49.438 0.00142064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4616 21:45:49.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4617 21:45:49.438 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4618 21:45:49.454 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4619 21:45:49.454 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4620 21:45:49.454 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4621 21:45:49.454 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4622 21:45:49.454 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4623 21:45:49.454 0.00144435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4624 21:45:49.454 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4625 21:45:49.454 0.00147516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4626 21:45:49.454 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4627 21:45:49.454 0.00092682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4628 21:45:49.454 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4629 21:45:49.454 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4630 21:45:49.454 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4631 21:45:49.454 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4632 21:45:49.454 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4633 21:45:49.454 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4634 21:45:49.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4635 21:45:49.454 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4636 21:45:49.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4637 21:45:49.454 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4638 21:45:49.469 0.00007388 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4639 21:45:49.469 0.00114924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4640 21:45:49.469 0.00012523 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4641 21:45:49.469 0.00121561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4642 21:45:49.469 0.00004227 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4643 21:45:49.469 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4644 21:45:49.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4645 21:45:49.469 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4646 21:45:49.469 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4647 21:45:49.469 0.00164583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4648 21:45:49.469 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4649 21:45:49.469 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4650 21:45:49.469 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4651 21:45:49.469 0.00113659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4652 21:45:49.469 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4653 21:45:49.469 0.00141472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4654 21:45:49.469 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 4655 21:45:49.469 0.00004306 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 4656 21:45:49.469 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 12 4657 21:45:49.469 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4658 21:45:49.469 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4659 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4660 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4661 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4663 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4664 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 4665 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4666 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4667 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4668 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4669 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4670 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4671 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4672 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4673 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4674 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4675 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4676 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4677 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4678 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4679 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4680 21:45:49.469 0.00001620 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 4681 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4682 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4683 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4684 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4685 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4686 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4687 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4688 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4689 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4690 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4691 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4692 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4693 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4694 21:45:49.469 0.00003279 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4695 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4696 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 4697 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4698 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4699 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4700 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4701 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4702 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4703 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4704 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4705 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4706 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4707 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 4708 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4709 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 4710 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4711 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 4712 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 4713 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4714 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4715 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4716 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4717 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4718 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4719 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4720 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4721 21:45:49.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4722 21:45:49.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 4723 21:45:49.469 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 4724 21:45:49.469 0.00011457 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 4725 21:45:49.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4726 21:45:49.469 0.00190341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4727 21:45:49.469 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4728 21:45:49.469 0.00237748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4729 21:45:49.485 0.00023822 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 4730 21:45:49.485 0.00010983 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 02 4731 21:45:49.485 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4732 21:45:49.485 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4733 21:45:49.485 0.00016830 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 4734 21:45:49.485 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4735 21:45:49.485 0.00011773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4736 21:45:49.485 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4737 21:45:49.485 0.00022361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4738 21:45:49.485 0.00016593 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 4739 21:45:49.485 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4740 21:45:49.485 0.00608711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4741 21:45:49.485 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4742 21:45:49.485 0.00090232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4743 21:45:49.485 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4744 21:45:49.485 0.00077116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4745 21:45:49.485 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4746 21:45:49.485 0.00097857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4747 21:45:49.485 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4748 21:45:49.485 0.00115635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4749 21:45:49.485 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4750 21:45:49.485 0.00150045 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4751 21:45:49.485 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4752 21:45:49.485 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4753 21:45:49.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4754 21:45:49.500 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4755 21:45:49.500 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4756 21:45:49.500 0.00126104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4757 21:45:49.500 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4758 21:45:49.500 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4759 21:45:49.500 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4760 21:45:49.500 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4761 21:45:49.500 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4763 21:45:49.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4764 21:45:49.500 0.00149333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4765 21:45:49.500 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4766 21:45:49.500 0.00117294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4767 21:45:49.500 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4768 21:45:49.500 0.00122469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4769 21:45:49.500 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4770 21:45:49.500 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4773 21:45:49.500 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4774 21:45:49.500 0.00141946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4775 21:45:49.516 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4776 21:45:49.516 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4777 21:45:49.516 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4778 21:45:49.516 0.00121640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4779 21:45:49.516 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4780 21:45:49.516 0.00140919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4781 21:45:49.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4782 21:45:49.516 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4784 21:45:49.516 0.00102677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4785 21:45:49.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4786 21:45:49.516 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4787 21:45:49.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4788 21:45:49.516 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4789 21:45:49.516 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4790 21:45:49.516 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4791 21:45:49.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4792 21:45:49.516 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4793 21:45:49.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4794 21:45:49.516 0.00143724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4795 21:45:49.532 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4796 21:45:49.532 0.00122983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4797 21:45:49.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4798 21:45:49.532 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4799 21:45:49.532 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4800 21:45:49.532 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4801 21:45:49.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4802 21:45:49.532 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4803 21:45:49.532 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4804 21:45:49.532 0.00144474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4805 21:45:49.532 0.00009205 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4806 21:45:49.532 0.00117175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4807 21:45:49.532 0.00009086 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4808 21:45:49.532 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4809 21:45:49.532 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4810 21:45:49.532 0.00144040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4811 21:45:49.532 0.00012444 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4812 21:45:49.532 0.00115516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4813 21:45:49.532 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4814 21:45:49.532 0.00110222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4815 21:45:49.532 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4816 21:45:49.532 0.00137995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4817 21:45:49.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4818 21:45:49.547 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4819 21:45:49.547 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4820 21:45:49.547 0.00124603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4821 21:45:49.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4822 21:45:49.547 0.00121719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4823 21:45:49.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4824 21:45:49.547 0.00143803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4825 21:45:49.547 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4826 21:45:49.547 0.00125946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4827 21:45:49.547 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4828 21:45:49.547 0.00121284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4829 21:45:49.547 0.00010311 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4830 21:45:49.547 0.00117412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4831 21:45:49.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4832 21:45:49.547 0.00141077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4833 21:45:49.547 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4834 21:45:49.547 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4835 21:45:49.547 0.00008494 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4836 21:45:49.547 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4837 21:45:49.547 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4838 21:45:49.547 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4839 21:45:49.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4840 21:45:49.563 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4841 21:45:49.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4842 21:45:49.563 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4843 21:45:49.563 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4844 21:45:49.563 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4845 21:45:49.563 0.00006479 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4846 21:45:49.563 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4847 21:45:49.563 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4848 21:45:49.563 0.00135427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4849 21:45:49.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4850 21:45:49.563 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4851 21:45:49.563 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4852 21:45:49.563 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4853 21:45:49.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4854 21:45:49.563 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4855 21:45:49.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4856 21:45:49.563 0.00142894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4857 21:45:49.563 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4858 21:45:49.563 0.00123022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4859 21:45:49.563 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4860 21:45:49.563 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4861 21:45:49.579 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4862 21:45:49.579 0.00115279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4863 21:45:49.579 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4864 21:45:49.579 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4865 21:45:49.579 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4866 21:45:49.579 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4867 21:45:49.579 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4868 21:45:49.579 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4869 21:45:49.579 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4870 21:45:49.579 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4871 21:45:49.579 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4872 21:45:49.579 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4873 21:45:49.579 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4874 21:45:49.579 0.00117136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4875 21:45:49.579 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4876 21:45:49.579 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4877 21:45:49.579 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 4878 21:45:49.579 0.00007546 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 4879 21:45:49.579 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 02 4880 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 4881 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4882 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4883 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4884 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4885 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4886 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4887 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 4888 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4889 21:45:49.579 0.00006123 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4890 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4891 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4892 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4893 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4894 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4895 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4896 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4897 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4898 21:45:49.579 0.00003121 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4899 21:45:49.579 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 4900 21:45:49.579 0.00004425 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4901 21:45:49.579 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4902 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4903 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 4904 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4905 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4906 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4907 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4908 21:45:49.579 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4909 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4910 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4911 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4912 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4913 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4914 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4915 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4916 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 4917 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4918 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4919 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4920 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 4921 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4922 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4923 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4924 21:45:49.579 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4925 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4926 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4927 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4928 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4929 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4930 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4931 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 4932 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 4933 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4934 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4935 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 4936 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 4937 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 4938 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4939 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4940 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4941 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4942 21:45:49.579 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4943 21:45:49.579 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 4944 21:45:49.579 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 4945 21:45:49.579 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 4946 21:45:49.579 0.00005689 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 4947 21:45:49.579 0.00010469 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 4948 21:45:49.579 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4949 21:45:49.579 0.00205630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4950 21:45:49.579 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4951 21:45:49.579 0.00179714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4952 21:45:49.594 0.00028286 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 4953 21:45:49.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4954 21:45:49.594 0.00033778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4955 21:45:49.594 0.00027496 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 12 4956 21:45:49.594 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4957 21:45:49.594 0.00021017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4958 21:45:49.594 0.00017185 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 4959 21:45:49.594 0.00029788 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 4960 21:45:49.594 0.00019081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4961 21:45:49.594 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4962 21:45:49.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4963 21:45:49.594 0.00615269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4964 21:45:49.594 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4965 21:45:49.594 0.00104810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4966 21:45:49.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4967 21:45:49.594 0.00096632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4968 21:45:49.594 0.00011575 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4969 21:45:49.594 0.00088533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4970 21:45:49.594 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4971 21:45:49.594 0.00122351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4972 21:45:49.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4973 21:45:49.594 0.00153324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4974 21:45:49.594 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4975 21:45:49.594 0.00144988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4976 21:45:49.610 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4977 21:45:49.610 0.00102361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4978 21:45:49.610 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4979 21:45:49.610 0.00113659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4980 21:45:49.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4981 21:45:49.610 0.00135546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4982 21:45:49.610 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4983 21:45:49.610 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4984 21:45:49.610 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4985 21:45:49.610 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4986 21:45:49.610 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4987 21:45:49.610 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4988 21:45:49.610 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4989 21:45:49.610 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4990 21:45:49.610 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4991 21:45:49.610 0.00140247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4992 21:45:49.610 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4993 21:45:49.610 0.00137679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4994 21:45:49.610 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4995 21:45:49.610 0.00111131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4996 21:45:49.625 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4997 21:45:49.625 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 4998 21:45:49.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 4999 21:45:49.625 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5000 21:45:49.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5001 21:45:49.625 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5002 21:45:49.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5003 21:45:49.625 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5004 21:45:49.625 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5005 21:45:49.625 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5006 21:45:49.625 0.00016237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5007 21:45:49.625 0.00098094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5008 21:45:49.625 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5009 21:45:49.625 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5010 21:45:49.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5011 21:45:49.625 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5012 21:45:49.625 0.00007980 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5013 21:45:49.625 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5014 21:45:49.625 0.00013077 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5015 21:45:49.625 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5016 21:45:49.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5017 21:45:49.625 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5018 21:45:49.641 0.00010864 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5019 21:45:49.641 0.00115832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5020 21:45:49.641 0.00033975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5021 21:45:49.641 0.00110933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5022 21:45:49.641 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5023 21:45:49.641 0.00107536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5024 21:45:49.641 0.00006479 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5025 21:45:49.641 0.00114094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5026 21:45:49.641 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5027 21:45:49.641 0.00135506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5028 21:45:49.641 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5029 21:45:49.641 0.00120889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5030 21:45:49.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5031 21:45:49.641 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5032 21:45:49.641 0.00007032 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5033 21:45:49.641 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5034 21:45:49.641 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5035 21:45:49.641 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5036 21:45:49.641 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5037 21:45:49.641 0.00132978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5038 21:45:49.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5039 21:45:49.641 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5040 21:45:49.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5041 21:45:49.656 0.00142538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5042 21:45:49.656 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5043 21:45:49.656 0.00138272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5044 21:45:49.656 0.00004622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5045 21:45:49.656 0.00087901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5046 21:45:49.656 0.00013551 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5047 21:45:49.656 0.00111091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5048 21:45:49.656 0.00011378 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5049 21:45:49.656 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5050 21:45:49.656 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5051 21:45:49.656 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5052 21:45:49.656 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5053 21:45:49.656 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5055 21:45:49.656 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5056 21:45:49.656 0.00004227 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5057 21:45:49.656 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5058 21:45:49.656 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5059 21:45:49.656 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5060 21:45:49.672 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5061 21:45:49.672 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5062 21:45:49.672 0.00007269 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5063 21:45:49.672 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5064 21:45:49.672 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5065 21:45:49.672 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5066 21:45:49.672 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5067 21:45:49.672 0.00144790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5068 21:45:49.672 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5069 21:45:49.672 0.00138193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5070 21:45:49.672 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5071 21:45:49.672 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5072 21:45:49.672 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5073 21:45:49.672 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5074 21:45:49.672 0.00007625 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5075 21:45:49.672 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5076 21:45:49.672 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5077 21:45:49.672 0.00123062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5078 21:45:49.672 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5079 21:45:49.672 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5080 21:45:49.672 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5081 21:45:49.672 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5082 21:45:49.688 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5083 21:45:49.688 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5084 21:45:49.688 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5085 21:45:49.688 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5086 21:45:49.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5087 21:45:49.688 0.00138667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5088 21:45:49.688 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5089 21:45:49.688 0.00121244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5090 21:45:49.688 0.00008257 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5091 21:45:49.688 0.00117412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5092 21:45:49.688 0.00006163 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5093 21:45:49.688 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5094 21:45:49.688 0.00010548 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5095 21:45:49.688 0.00119546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5096 21:45:49.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5097 21:45:49.688 0.00120691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5098 21:45:49.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5099 21:45:49.688 0.00144553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5100 21:45:49.688 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 5101 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 5102 21:45:49.688 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 12 5103 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 5104 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5105 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5106 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5107 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5108 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5109 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5110 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 5111 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5112 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5113 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5114 21:45:49.688 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5115 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5116 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5117 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5118 21:45:49.688 0.00006993 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5119 21:45:49.688 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5120 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5121 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5122 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5123 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5124 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5125 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5126 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 5127 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5128 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5129 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5130 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5131 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5132 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5133 21:45:49.688 0.00003990 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5134 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5135 21:45:49.688 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5136 21:45:49.688 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5137 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5138 21:45:49.688 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5139 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5140 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5141 21:45:49.688 0.00003240 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5142 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 5143 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5144 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5145 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5146 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5147 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5148 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5149 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5150 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5151 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5152 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5153 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5154 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5155 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5156 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5157 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5158 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 5159 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5160 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5161 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5162 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5163 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5164 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5165 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5166 21:45:49.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5167 21:45:49.688 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5168 21:45:49.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5169 21:45:49.688 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 5170 21:45:49.688 0.00010706 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 5171 21:45:49.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5172 21:45:49.688 0.00197017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5173 21:45:49.703 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5174 21:45:49.703 0.00048395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5175 21:45:49.703 0.00015842 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 5176 21:45:49.703 0.00016672 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 02 5177 21:45:49.703 0.00014341 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5178 21:45:49.703 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5179 21:45:49.703 0.00014657 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 5180 21:45:49.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5181 21:45:49.703 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5182 21:45:49.703 0.00012919 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 5183 21:45:49.703 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5184 21:45:49.703 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5185 21:45:49.703 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5186 21:45:49.703 0.00607131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5187 21:45:49.703 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5188 21:45:49.703 0.00069847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5189 21:45:49.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5190 21:45:49.703 0.00088494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5191 21:45:49.703 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5192 21:45:49.703 0.00102519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5193 21:45:49.703 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5194 21:45:49.703 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5195 21:45:49.703 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5196 21:45:49.703 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5197 21:45:49.703 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5198 21:45:49.703 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5199 21:45:49.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5200 21:45:49.703 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5201 21:45:49.719 0.00006953 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5202 21:45:49.719 0.00051240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5203 21:45:49.719 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5204 21:45:49.719 0.00119783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5205 21:45:49.719 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5206 21:45:49.719 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5207 21:45:49.719 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5208 21:45:49.719 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5209 21:45:49.719 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5210 21:45:49.719 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5211 21:45:49.719 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5212 21:45:49.719 0.00130489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5213 21:45:49.719 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5214 21:45:49.719 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5215 21:45:49.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5216 21:45:49.719 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5217 21:45:49.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5218 21:45:49.719 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5219 21:45:49.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5220 21:45:49.719 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5221 21:45:49.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5222 21:45:49.719 0.00139417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5223 21:45:49.734 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5224 21:45:49.734 0.00118677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5225 21:45:49.734 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5226 21:45:49.734 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5227 21:45:49.734 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5228 21:45:49.734 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5229 21:45:49.734 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5230 21:45:49.734 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5231 21:45:49.734 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5232 21:45:49.734 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5233 21:45:49.734 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5234 21:45:49.734 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5235 21:45:49.734 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5236 21:45:49.734 0.00124484 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5237 21:45:49.734 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5238 21:45:49.734 0.00138035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5239 21:45:49.734 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5240 21:45:49.734 0.00116188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5241 21:45:49.734 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5242 21:45:49.734 0.00144395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5243 21:45:49.750 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5244 21:45:49.750 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5245 21:45:49.750 0.00009837 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5246 21:45:49.750 0.00104336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5247 21:45:49.750 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5248 21:45:49.750 0.00125235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5249 21:45:49.750 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5250 21:45:49.750 0.00140761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5251 21:45:49.750 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5252 21:45:49.750 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5253 21:45:49.750 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5254 21:45:49.750 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5255 21:45:49.750 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5256 21:45:49.750 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5257 21:45:49.750 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5258 21:45:49.750 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5259 21:45:49.750 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5260 21:45:49.750 0.00148662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5261 21:45:49.750 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5262 21:45:49.750 0.00107299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5263 21:45:49.750 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5264 21:45:49.750 0.00141235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5265 21:45:49.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5266 21:45:49.766 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5267 21:45:49.766 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5268 21:45:49.766 0.00122351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5269 21:45:49.766 0.00015368 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5270 21:45:49.766 0.00112593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5271 21:45:49.766 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5272 21:45:49.766 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5273 21:45:49.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5274 21:45:49.766 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5275 21:45:49.766 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5276 21:45:49.766 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5277 21:45:49.766 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5278 21:45:49.766 0.00146489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5279 21:45:49.766 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5280 21:45:49.766 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5281 21:45:49.766 0.00009007 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5282 21:45:49.766 0.00109353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5283 21:45:49.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5284 21:45:49.766 0.00136178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5285 21:45:49.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5286 21:45:49.766 0.00138469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5287 21:45:49.781 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5288 21:45:49.781 0.00114844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5289 21:45:49.781 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5290 21:45:49.781 0.00122509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5291 21:45:49.781 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5292 21:45:49.781 0.00123852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5293 21:45:49.781 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5294 21:45:49.781 0.00138193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5295 21:45:49.781 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5296 21:45:49.781 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5297 21:45:49.781 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5298 21:45:49.781 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5299 21:45:49.781 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5300 21:45:49.781 0.00140603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5301 21:45:49.781 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5302 21:45:49.781 0.00152178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5303 21:45:49.781 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5304 21:45:49.781 0.00101768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5305 21:45:49.781 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5306 21:45:49.781 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5307 21:45:49.781 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5308 21:45:49.781 0.00143012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5309 21:45:49.797 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5310 21:45:49.797 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5311 21:45:49.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5312 21:45:49.797 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5313 21:45:49.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5314 21:45:49.797 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5315 21:45:49.797 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5316 21:45:49.797 0.00119901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5317 21:45:49.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5318 21:45:49.797 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5319 21:45:49.797 0.00009995 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5320 21:45:49.797 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5321 21:45:49.797 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5322 21:45:49.797 0.00210173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5323 21:45:49.797 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 5324 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 5325 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 02 5326 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 5327 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5328 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5329 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5330 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 5331 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5332 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5333 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5334 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 5335 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5336 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5337 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5338 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5339 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5340 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5341 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5342 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 5343 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5344 21:45:49.797 0.00010509 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5345 21:45:49.797 0.00005649 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 5346 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 5347 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5348 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5349 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 5350 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 5351 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5352 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5353 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5354 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5355 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5356 21:45:49.797 0.00007427 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5357 21:45:49.797 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5359 21:45:49.797 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5360 21:45:49.797 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5361 21:45:49.797 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5362 21:45:49.797 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 42 5363 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5364 21:45:49.797 0.00001857 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5365 21:45:49.797 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5366 21:45:49.797 0.00003121 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 42 5367 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5368 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5369 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5370 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5371 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5372 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5373 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5374 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 5375 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5376 21:45:49.797 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5377 21:45:49.797 0.00003160 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 5378 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 42 5383 21:45:49.797 0.00003753 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5384 21:45:49.797 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5385 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5386 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5387 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5388 21:45:49.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5389 21:45:49.797 0.00002568 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5390 21:45:49.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 5392 21:45:49.797 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 5393 21:45:49.797 0.00017659 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 5394 21:45:49.797 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5395 21:45:49.797 0.00203417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5396 21:45:49.797 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5397 21:45:49.797 0.00213254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5398 21:45:49.813 0.00024059 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 5399 21:45:49.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5400 21:45:49.813 0.00028444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5401 21:45:49.813 0.00021926 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 12 5402 21:45:49.813 0.00020385 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 5403 21:45:49.813 0.00007388 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5404 21:45:49.813 0.00009402 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5405 21:45:49.813 0.00014894 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 5406 21:45:49.813 0.00006479 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5407 21:45:49.813 0.00011852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5408 21:45:49.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5409 21:45:49.813 0.00566005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5410 21:45:49.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5411 21:45:49.813 0.00102756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5412 21:45:49.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5413 21:45:49.813 0.00117333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5414 21:45:49.813 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5415 21:45:49.813 0.00087269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5416 21:45:49.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5417 21:45:49.813 0.00145778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5418 21:45:49.813 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5419 21:45:49.813 0.00142025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5420 21:45:49.813 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5421 21:45:49.813 0.00109590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5422 21:45:49.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5423 21:45:49.813 0.00119941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5424 21:45:49.828 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5425 21:45:49.828 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5426 21:45:49.828 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5427 21:45:49.828 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5428 21:45:49.828 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5429 21:45:49.828 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5430 21:45:49.828 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5431 21:45:49.828 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5432 21:45:49.828 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5433 21:45:49.828 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5434 21:45:49.828 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5435 21:45:49.828 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5436 21:45:49.828 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5437 21:45:49.828 0.00141788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5438 21:45:49.828 0.00010390 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5439 21:45:49.828 0.00122153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5440 21:45:49.828 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5441 21:45:49.828 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5442 21:45:49.828 0.00006163 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5443 21:45:49.828 0.00137600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5444 21:45:49.828 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5445 21:45:49.828 0.00143407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5446 21:45:49.844 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5447 21:45:49.844 0.00111842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5448 21:45:49.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5449 21:45:49.844 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5450 21:45:49.844 0.00007862 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5451 21:45:49.844 0.00123733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5452 21:45:49.844 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5453 21:45:49.844 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5454 21:45:49.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5455 21:45:49.844 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5456 21:45:49.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5457 21:45:49.844 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5458 21:45:49.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5459 21:45:49.844 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5460 21:45:49.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5461 21:45:49.844 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5462 21:45:49.844 0.00015842 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5463 21:45:49.844 0.00113541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5464 21:45:49.844 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5465 21:45:49.844 0.00138667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5466 21:45:49.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5467 21:45:49.860 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5468 21:45:49.860 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5469 21:45:49.860 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5470 21:45:49.860 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5471 21:45:49.860 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5472 21:45:49.860 0.00022202 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5473 21:45:49.860 0.00083951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5474 21:45:49.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5475 21:45:49.860 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5476 21:45:49.860 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5477 21:45:49.860 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5478 21:45:49.860 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5479 21:45:49.860 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5480 21:45:49.860 0.00003872 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5481 21:45:49.860 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5482 21:45:49.860 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5483 21:45:49.860 0.00119467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5484 21:45:49.860 0.00008059 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5485 21:45:49.860 0.00120296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5486 21:45:49.860 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5487 21:45:49.860 0.00150045 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5488 21:45:49.875 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5489 21:45:49.875 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5490 21:45:49.875 0.00020622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5491 21:45:49.875 0.00104020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5492 21:45:49.875 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5493 21:45:49.875 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5494 21:45:49.875 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5495 21:45:49.875 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5496 21:45:49.875 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5497 21:45:49.875 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5498 21:45:49.875 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5499 21:45:49.875 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5500 21:45:49.875 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5501 21:45:49.875 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5502 21:45:49.875 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5503 21:45:49.875 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5504 21:45:49.875 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5505 21:45:49.875 0.00144711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5506 21:45:49.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5507 21:45:49.875 0.00120217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5508 21:45:49.875 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5509 21:45:49.875 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5510 21:45:49.891 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5511 21:45:49.891 0.00155970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5512 21:45:49.891 0.00018805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5513 21:45:49.891 0.00096988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5514 21:45:49.891 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5515 21:45:49.891 0.00106904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5516 21:45:49.891 0.00004267 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5517 21:45:49.891 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5518 21:45:49.891 0.00012168 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5519 21:45:49.891 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5520 21:45:49.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5521 21:45:49.891 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5522 21:45:49.891 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5523 21:45:49.891 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5524 21:45:49.891 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5525 21:45:49.891 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5526 21:45:49.891 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5527 21:45:49.891 0.00140603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5528 21:45:49.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5529 21:45:49.891 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5530 21:45:49.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5531 21:45:49.891 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5532 21:45:49.907 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5533 21:45:49.907 0.00112553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5534 21:45:49.907 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5535 21:45:49.907 0.00144514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5536 21:45:49.907 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5537 21:45:49.907 0.00102677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5538 21:45:49.907 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5539 21:45:49.907 0.00136178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5540 21:45:49.907 0.00012207 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5541 21:45:49.907 0.00121165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5542 21:45:49.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5543 21:45:49.907 0.00117452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5544 21:45:49.907 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5545 21:45:49.907 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5546 21:45:49.907 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 5547 21:45:49.907 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 5548 21:45:49.907 0.00004583 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 12 5549 21:45:49.907 0.00001501 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 5550 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5551 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5552 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5553 21:45:49.907 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5554 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5555 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5556 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5557 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5558 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5559 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5560 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5561 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5562 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5563 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5564 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5565 21:45:49.907 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5566 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5567 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5568 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5569 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5570 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5571 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5572 21:45:49.907 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 5573 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5574 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5575 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5576 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5577 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5578 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5579 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5580 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5581 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5582 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5583 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5584 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5585 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5586 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5587 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5588 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 5589 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5590 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5591 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5592 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5593 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5594 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5595 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5596 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5597 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5598 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5599 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5600 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5601 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 5602 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5603 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 5604 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 5605 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5606 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5607 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5608 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5609 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5610 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5611 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5612 21:45:49.907 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5613 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5614 21:45:49.907 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 5615 21:45:49.907 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 5616 21:45:49.907 0.00028958 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 5617 21:45:49.907 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5618 21:45:49.907 0.00179437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5619 21:45:49.907 0.00006835 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5620 21:45:49.907 0.00341294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5621 21:45:49.923 0.00023664 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 5622 21:45:49.923 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5623 21:45:49.923 0.00020978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5624 21:45:49.923 0.00013274 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 03 5625 21:45:49.923 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5626 21:45:49.923 0.00018884 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 5627 21:45:49.923 0.00026193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5628 21:45:49.923 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5629 21:45:49.923 0.00020306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5630 21:45:49.923 0.00016237 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 5631 21:45:49.923 0.00008770 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5632 21:45:49.923 0.00470519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5633 21:45:49.923 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5634 21:45:49.923 0.00088336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5635 21:45:49.923 0.00009244 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5636 21:45:49.923 0.00099121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5637 21:45:49.923 0.00007388 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5638 21:45:49.923 0.00093551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5639 21:45:49.923 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5640 21:45:49.923 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5641 21:45:49.923 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5642 21:45:49.923 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5643 21:45:49.923 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5644 21:45:49.923 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5645 21:45:49.923 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5646 21:45:49.923 0.00141274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5647 21:45:49.938 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5648 21:45:49.938 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5649 21:45:49.938 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5650 21:45:49.938 0.00136810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5651 21:45:49.938 0.00014222 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5652 21:45:49.938 0.00110104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5653 21:45:49.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5654 21:45:49.938 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5655 21:45:49.938 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5656 21:45:49.938 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5657 21:45:49.938 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5658 21:45:49.938 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5659 21:45:49.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5660 21:45:49.938 0.00125235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5661 21:45:49.938 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5662 21:45:49.938 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5663 21:45:49.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5664 21:45:49.938 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5665 21:45:49.938 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5666 21:45:49.938 0.00127526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5667 21:45:49.954 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5668 21:45:49.954 0.00125353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5669 21:45:49.954 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5670 21:45:49.954 0.00110143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5671 21:45:49.954 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5672 21:45:49.954 0.00112119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5673 21:45:49.954 0.00007980 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5674 21:45:49.954 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5675 21:45:49.954 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5676 21:45:49.954 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5677 21:45:49.954 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5678 21:45:49.954 0.00109669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5679 21:45:49.954 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5680 21:45:49.954 0.00147635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5681 21:45:49.954 0.00015170 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5682 21:45:49.954 0.00091259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5683 21:45:49.954 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5684 21:45:49.954 0.00137244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5685 21:45:49.954 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5686 21:45:49.954 0.00118203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5687 21:45:49.954 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5688 21:45:49.954 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5689 21:45:49.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5690 21:45:49.969 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5691 21:45:49.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5692 21:45:49.969 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5693 21:45:49.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5694 21:45:49.969 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5695 21:45:49.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5696 21:45:49.969 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5697 21:45:49.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5698 21:45:49.969 0.00145541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5699 21:45:49.969 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5700 21:45:49.969 0.00110657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5701 21:45:49.969 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5702 21:45:49.969 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5703 21:45:49.969 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5704 21:45:49.969 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5705 21:45:49.969 0.00011931 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5706 21:45:49.969 0.00115121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5707 21:45:49.969 0.00010627 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5708 21:45:49.969 0.00115121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5709 21:45:49.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5710 21:45:49.969 0.00140682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5711 21:45:49.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5712 21:45:49.984 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5713 21:45:49.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5714 21:45:49.984 0.00122667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5715 21:45:49.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5716 21:45:49.984 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5717 21:45:49.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5718 21:45:49.984 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5719 21:45:49.984 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5720 21:45:49.984 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5721 21:45:49.984 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5722 21:45:49.984 0.00117333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5723 21:45:49.984 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5724 21:45:49.984 0.00122351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5726 21:45:49.984 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5727 21:45:49.984 0.00004267 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5728 21:45:49.984 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5729 21:45:49.984 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5730 21:45:49.984 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5731 21:45:50.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5732 21:45:50.000 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5733 21:45:50.000 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5734 21:45:50.000 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5735 21:45:50.000 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5736 21:45:50.000 0.00124524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5737 21:45:50.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5738 21:45:50.000 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5739 21:45:50.000 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5740 21:45:50.000 0.00123891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5741 21:45:50.000 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5742 21:45:50.000 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5743 21:45:50.000 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5744 21:45:50.000 0.00146173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5745 21:45:50.000 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5746 21:45:50.000 0.00111210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5747 21:45:50.000 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5748 21:45:50.000 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5749 21:45:50.000 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5750 21:45:50.000 0.00138351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5751 21:45:50.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5752 21:45:50.000 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5753 21:45:50.016 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5754 21:45:50.016 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5755 21:45:50.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5756 21:45:50.016 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5757 21:45:50.016 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5758 21:45:50.016 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5759 21:45:50.016 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5760 21:45:50.016 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5761 21:45:50.016 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5762 21:45:50.016 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5763 21:45:50.016 0.00008849 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5764 21:45:50.016 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5765 21:45:50.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5766 21:45:50.016 0.00147279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5767 21:45:50.016 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5768 21:45:50.016 0.00205985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5769 21:45:50.016 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 5770 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 5771 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 5772 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5773 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5774 21:45:50.016 0.00009560 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5775 21:45:50.016 0.00005333 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5776 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 42 5777 21:45:50.016 0.00010074 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5778 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5779 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5780 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 42 5781 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5782 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5783 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5784 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5785 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5786 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5787 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5788 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 5789 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5790 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5791 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 5792 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 42 5793 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5794 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5795 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 5796 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 42 5797 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5798 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5799 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5800 21:45:50.016 0.00001738 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5801 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5802 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5803 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5804 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 5805 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5806 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5807 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5808 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5809 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5810 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5811 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5812 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5813 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5814 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5815 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5816 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5817 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5818 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5819 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5820 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 5821 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5822 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5823 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 5824 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5825 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5826 21:45:50.016 0.00007585 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5827 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 5828 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5829 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 5830 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5831 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5832 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5833 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5834 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5835 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5836 21:45:50.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 5837 21:45:50.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5838 21:45:50.016 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 5839 21:45:50.016 0.00029590 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 5840 21:45:50.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5841 21:45:50.016 0.00177383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5842 21:45:50.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5843 21:45:50.016 0.00073837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5844 21:45:50.031 0.00019793 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 5845 21:45:50.031 0.00022242 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 13 5846 21:45:50.031 0.00016395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5847 21:45:50.031 0.00019279 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 5848 21:45:50.031 0.00019911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5849 21:45:50.031 0.00010864 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 5850 21:45:50.031 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5851 21:45:50.031 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5852 21:45:50.031 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5853 21:45:50.031 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5854 21:45:50.031 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5855 21:45:50.031 0.00576198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5856 21:45:50.031 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5857 21:45:50.031 0.00093511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5858 21:45:50.031 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5859 21:45:50.031 0.00093827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5860 21:45:50.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5861 21:45:50.031 0.00093472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5862 21:45:50.031 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5863 21:45:50.031 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5864 21:45:50.031 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5865 21:45:50.031 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5866 21:45:50.031 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5867 21:45:50.031 0.00125353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5868 21:45:50.031 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5869 21:45:50.031 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5870 21:45:50.047 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5871 21:45:50.047 0.00047131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5872 21:45:50.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5873 21:45:50.047 0.00136573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5874 21:45:50.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5875 21:45:50.047 0.00140207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5876 21:45:50.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5877 21:45:50.047 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5878 21:45:50.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5879 21:45:50.047 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5880 21:45:50.047 0.00007546 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5881 21:45:50.047 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5882 21:45:50.047 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5883 21:45:50.047 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5884 21:45:50.047 0.00006756 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5885 21:45:50.047 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5886 21:45:50.047 0.00010351 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5887 21:45:50.047 0.00110815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5888 21:45:50.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5889 21:45:50.047 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5890 21:45:50.047 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5891 21:45:50.047 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5892 21:45:50.063 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5893 21:45:50.063 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5894 21:45:50.063 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5895 21:45:50.063 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5896 21:45:50.063 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5897 21:45:50.063 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5898 21:45:50.063 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5899 21:45:50.063 0.00139022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5900 21:45:50.063 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5901 21:45:50.063 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5902 21:45:50.063 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5903 21:45:50.063 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5904 21:45:50.063 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5905 21:45:50.063 0.00123338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5906 21:45:50.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5907 21:45:50.063 0.00149965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5908 21:45:50.063 0.00009798 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5909 21:45:50.063 0.00104652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5910 21:45:50.063 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5911 21:45:50.063 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5912 21:45:50.079 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5913 21:45:50.079 0.00119704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5914 21:45:50.079 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5915 21:45:50.079 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5916 21:45:50.079 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5917 21:45:50.079 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5918 21:45:50.079 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5919 21:45:50.079 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5920 21:45:50.079 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5921 21:45:50.079 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5922 21:45:50.079 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5923 21:45:50.079 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5924 21:45:50.079 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5925 21:45:50.079 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5926 21:45:50.079 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5927 21:45:50.079 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5928 21:45:50.079 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5929 21:45:50.079 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5930 21:45:50.079 0.00007388 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5931 21:45:50.079 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5932 21:45:50.079 0.00014538 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5933 21:45:50.079 0.00094301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5934 21:45:50.094 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5935 21:45:50.094 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5936 21:45:50.094 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5937 21:45:50.094 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5938 21:45:50.094 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5939 21:45:50.094 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5940 21:45:50.094 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5941 21:45:50.094 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5942 21:45:50.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5943 21:45:50.094 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5944 21:45:50.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5945 21:45:50.094 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5946 21:45:50.094 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5947 21:45:50.094 0.00127565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5948 21:45:50.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5949 21:45:50.094 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5950 21:45:50.094 0.00014380 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5951 21:45:50.094 0.00112237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5952 21:45:50.094 0.00011220 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5953 21:45:50.094 0.00123733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5954 21:45:50.094 0.00012721 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5955 21:45:50.094 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5956 21:45:50.110 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5957 21:45:50.110 0.00101689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5958 21:45:50.110 0.00007822 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5959 21:45:50.110 0.00119625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5960 21:45:50.110 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5961 21:45:50.110 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5962 21:45:50.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5963 21:45:50.110 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5964 21:45:50.110 0.00008612 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5965 21:45:50.110 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5966 21:45:50.110 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5967 21:45:50.110 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5968 21:45:50.110 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5969 21:45:50.110 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5970 21:45:50.110 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5971 21:45:50.110 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5972 21:45:50.110 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5973 21:45:50.110 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5974 21:45:50.110 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5975 21:45:50.110 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5978 21:45:50.125 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5979 21:45:50.125 0.00111921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5980 21:45:50.125 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5981 21:45:50.125 0.00112000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5982 21:45:50.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5983 21:45:50.125 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5984 21:45:50.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5985 21:45:50.125 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5986 21:45:50.125 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5987 21:45:50.125 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5988 21:45:50.125 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5989 21:45:50.125 0.00134835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5990 21:45:50.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 5991 21:45:50.125 0.00155378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 5992 21:45:50.125 0.00001067 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 5993 21:45:50.125 0.00002607 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 5994 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 13 5995 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 5996 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 5997 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 5998 21:45:50.125 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 5999 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6000 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6001 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 6002 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 6003 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6004 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6005 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6006 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6007 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6008 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6009 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6010 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6011 21:45:50.125 0.00003990 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6012 21:45:50.125 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6013 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6014 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6015 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6016 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6017 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 6018 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 6019 21:45:50.125 0.00004030 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6020 21:45:50.125 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6021 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6022 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6023 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6024 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6025 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6026 21:45:50.125 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6027 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6028 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6029 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6030 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6031 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6032 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6033 21:45:50.125 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6034 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 6035 21:45:50.125 0.00004662 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6036 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6037 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6038 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6039 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6040 21:45:50.125 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6041 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6042 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6043 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6044 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6045 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6046 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6047 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6048 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6049 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6050 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 6051 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6052 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6053 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6054 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6055 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6056 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6057 21:45:50.125 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6058 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6059 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6060 21:45:50.125 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6061 21:45:50.125 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 6062 21:45:50.125 0.00020030 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 6063 21:45:50.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6064 21:45:50.125 0.00183704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6065 21:45:50.125 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6066 21:45:50.125 0.00229531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6067 21:45:50.141 0.00029511 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 6068 21:45:50.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6069 21:45:50.141 0.00031723 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6070 21:45:50.141 0.00026232 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 03 6071 21:45:50.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6072 21:45:50.141 0.00024257 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 6073 21:45:50.141 0.00023862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6074 21:45:50.141 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6075 21:45:50.141 0.00038953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6076 21:45:50.141 0.00027022 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 6077 21:45:50.141 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6078 21:45:50.141 0.00436938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6079 21:45:50.141 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6080 21:45:50.141 0.00107338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6081 21:45:50.141 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6082 21:45:50.141 0.00079526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6083 21:45:50.141 0.00003872 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6084 21:45:50.141 0.00092721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6085 21:45:50.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6086 21:45:50.141 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6087 21:45:50.141 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6088 21:45:50.141 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6089 21:45:50.141 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6090 21:45:50.141 0.00143803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6091 21:45:50.141 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6092 21:45:50.141 0.00121837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6093 21:45:50.156 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6094 21:45:50.156 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6095 21:45:50.156 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6096 21:45:50.156 0.00146686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6097 21:45:50.156 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6098 21:45:50.156 0.00113659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6099 21:45:50.156 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6100 21:45:50.156 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6101 21:45:50.156 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6102 21:45:50.156 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6103 21:45:50.156 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6104 21:45:50.156 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6105 21:45:50.156 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6106 21:45:50.156 0.00120178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6107 21:45:50.156 0.00005452 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6108 21:45:50.156 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6109 21:45:50.156 0.00005689 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6110 21:45:50.156 0.00160474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6111 21:45:50.156 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6112 21:45:50.156 0.00109314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6113 21:45:50.156 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6114 21:45:50.156 0.00124642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6115 21:45:50.172 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6116 21:45:50.172 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6117 21:45:50.172 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6118 21:45:50.172 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6119 21:45:50.172 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6120 21:45:50.172 0.00149965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6121 21:45:50.172 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6122 21:45:50.172 0.00112632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6123 21:45:50.172 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6124 21:45:50.172 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6125 21:45:50.172 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6126 21:45:50.172 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6127 21:45:50.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6128 21:45:50.172 0.00146765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6129 21:45:50.172 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6130 21:45:50.172 0.00119901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6131 21:45:50.172 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6132 21:45:50.172 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6133 21:45:50.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6134 21:45:50.172 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6137 21:45:50.188 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6138 21:45:50.188 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6139 21:45:50.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6140 21:45:50.188 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6141 21:45:50.188 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6142 21:45:50.188 0.00146094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6143 21:45:50.188 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6144 21:45:50.188 0.00111170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6147 21:45:50.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6148 21:45:50.188 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6149 21:45:50.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6150 21:45:50.188 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6151 21:45:50.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6152 21:45:50.188 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6153 21:45:50.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6154 21:45:50.188 0.00117215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6155 21:45:50.188 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6156 21:45:50.188 0.00151743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6157 21:45:50.203 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6158 21:45:50.203 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6159 21:45:50.203 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6160 21:45:50.203 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6161 21:45:50.203 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6162 21:45:50.203 0.00142578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6163 21:45:50.203 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6164 21:45:50.203 0.00118321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6165 21:45:50.203 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6166 21:45:50.203 0.00149412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6167 21:45:50.203 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6168 21:45:50.203 0.00088217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6169 21:45:50.203 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6170 21:45:50.203 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6171 21:45:50.203 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6172 21:45:50.203 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6173 21:45:50.203 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6174 21:45:50.203 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6175 21:45:50.203 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6177 21:45:50.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6178 21:45:50.203 0.00138193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6179 21:45:50.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6180 21:45:50.219 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6181 21:45:50.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6182 21:45:50.219 0.00144711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6183 21:45:50.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6184 21:45:50.219 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6185 21:45:50.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6186 21:45:50.219 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6187 21:45:50.219 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6188 21:45:50.219 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6189 21:45:50.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6190 21:45:50.219 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6191 21:45:50.219 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6192 21:45:50.219 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6193 21:45:50.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6194 21:45:50.219 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6195 21:45:50.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6196 21:45:50.219 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6197 21:45:50.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6198 21:45:50.219 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6199 21:45:50.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6200 21:45:50.219 0.00144790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6201 21:45:50.235 0.00007309 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6202 21:45:50.235 0.00092721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6203 21:45:50.235 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6204 21:45:50.235 0.00119151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6205 21:45:50.235 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6206 21:45:50.235 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6207 21:45:50.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6208 21:45:50.235 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6209 21:45:50.235 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6210 21:45:50.235 0.00144237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6211 21:45:50.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6212 21:45:50.235 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6213 21:45:50.235 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6214 21:45:50.235 0.00208790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6215 21:45:50.235 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 6216 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 6217 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 6218 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6219 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6220 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6221 21:45:50.235 0.00011891 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6222 21:45:50.235 0.00000000 UV4BAND_E_CPS. IRP_MJ_READ COM1 Length: 0, Data: 6224 21:45:50.235 0.00003200 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6225 21:45:50.235 0.00010943 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6226 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6227 21:45:50.235 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6228 21:45:50.235 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6229 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6230 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6231 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6232 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6233 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6234 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6235 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6236 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6237 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 6238 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6239 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6240 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6241 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 6242 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6243 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6244 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6245 21:45:50.235 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6246 21:45:50.235 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6247 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6248 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6249 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6250 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6251 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6252 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6253 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6254 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6255 21:45:50.235 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6256 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6257 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6258 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6259 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6260 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6261 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6262 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6263 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6264 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6265 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6266 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6267 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6268 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6269 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 6270 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6271 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6272 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6273 21:45:50.235 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 6274 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6275 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6276 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6277 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6278 21:45:50.235 0.00005136 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6279 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6280 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6281 21:45:50.235 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6282 21:45:50.235 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6283 21:45:50.235 0.00004780 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6284 21:45:50.235 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 6285 21:45:50.235 0.00013314 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 6286 21:45:50.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6287 21:45:50.235 0.00193659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6288 21:45:50.235 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6289 21:45:50.235 0.00222815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6290 21:45:50.250 0.00021965 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 6291 21:45:50.250 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6292 21:45:50.250 0.00023862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6293 21:45:50.250 0.00019516 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 13 6294 21:45:50.250 0.00012049 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 6295 21:45:50.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6296 21:45:50.250 0.00006202 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6297 21:45:50.250 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6298 21:45:50.250 0.00019240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6299 21:45:50.250 0.00012405 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 6300 21:45:50.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6301 21:45:50.250 0.00503230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6302 21:45:50.250 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6303 21:45:50.250 0.00099793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6304 21:45:50.250 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6305 21:45:50.250 0.00118953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6306 21:45:50.250 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6307 21:45:50.250 0.00063605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6308 21:45:50.250 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6309 21:45:50.250 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6310 21:45:50.250 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6311 21:45:50.250 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6312 21:45:50.250 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6313 21:45:50.250 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6314 21:45:50.250 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6315 21:45:50.250 0.00136691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6316 21:45:50.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6317 21:45:50.266 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6318 21:45:50.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6319 21:45:50.266 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6320 21:45:50.266 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6321 21:45:50.266 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6322 21:45:50.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6323 21:45:50.266 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6324 21:45:50.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6325 21:45:50.266 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6326 21:45:50.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6327 21:45:50.266 0.00132188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6328 21:45:50.266 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6329 21:45:50.266 0.00149017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6330 21:45:50.266 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6331 21:45:50.266 0.00103585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6332 21:45:50.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6333 21:45:50.266 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6334 21:45:50.266 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6335 21:45:50.266 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6336 21:45:50.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6337 21:45:50.266 0.00138627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6338 21:45:50.282 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6339 21:45:50.282 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6340 21:45:50.282 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6341 21:45:50.282 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6342 21:45:50.282 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6343 21:45:50.282 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6344 21:45:50.282 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6345 21:45:50.282 0.00141472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6346 21:45:50.282 0.00008810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6347 21:45:50.282 0.00121126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6348 21:45:50.282 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6349 21:45:50.282 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6350 21:45:50.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6351 21:45:50.282 0.00140484 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6352 21:45:50.282 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6353 21:45:50.282 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6354 21:45:50.282 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6355 21:45:50.282 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6356 21:45:50.282 0.00014183 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6357 21:45:50.282 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6358 21:45:50.297 0.00004227 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6359 21:45:50.297 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6360 21:45:50.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6361 21:45:50.297 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6362 21:45:50.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6363 21:45:50.297 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6364 21:45:50.297 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6365 21:45:50.297 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6366 21:45:50.297 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6367 21:45:50.297 0.00121758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6368 21:45:50.297 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6369 21:45:50.297 0.00120810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6370 21:45:50.297 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6371 21:45:50.297 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6372 21:45:50.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6373 21:45:50.297 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6374 21:45:50.297 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6375 21:45:50.297 0.00144198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6376 21:45:50.297 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6377 21:45:50.297 0.00097225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6378 21:45:50.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6379 21:45:50.297 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6380 21:45:50.313 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6381 21:45:50.313 0.00141867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6382 21:45:50.313 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6383 21:45:50.313 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6384 21:45:50.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6385 21:45:50.313 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6386 21:45:50.313 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6387 21:45:50.313 0.00124998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6388 21:45:50.313 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6389 21:45:50.313 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6390 21:45:50.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6391 21:45:50.313 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6392 21:45:50.313 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6393 21:45:50.313 0.00118874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6394 21:45:50.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6395 21:45:50.313 0.00142933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6396 21:45:50.313 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6397 21:45:50.313 0.00151743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6398 21:45:50.313 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6399 21:45:50.313 0.00113541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6400 21:45:50.313 0.00007348 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6401 21:45:50.313 0.00112356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6402 21:45:50.328 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6403 21:45:50.328 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6404 21:45:50.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6405 21:45:50.328 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6406 21:45:50.328 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6407 21:45:50.328 0.00139062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6408 21:45:50.328 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6409 21:45:50.328 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6410 21:45:50.328 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6412 21:45:50.328 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6413 21:45:50.328 0.00145225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6414 21:45:50.328 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6415 21:45:50.328 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6416 21:45:50.328 0.00005689 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6417 21:45:50.328 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6418 21:45:50.328 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6419 21:45:50.328 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6420 21:45:50.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6421 21:45:50.328 0.00141669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6422 21:45:50.328 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6423 21:45:50.328 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6424 21:45:50.344 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6425 21:45:50.344 0.00128000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6426 21:45:50.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6427 21:45:50.344 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6428 21:45:50.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6429 21:45:50.344 0.00122983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6430 21:45:50.344 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6431 21:45:50.344 0.00150874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6432 21:45:50.344 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6433 21:45:50.344 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6434 21:45:50.344 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6435 21:45:50.344 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6436 21:45:50.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6437 21:45:50.344 0.00195911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6438 21:45:50.344 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 6439 21:45:50.344 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 6440 21:45:50.344 0.00001422 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 13 6441 21:45:50.344 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6442 21:45:50.344 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6443 21:45:50.344 0.00002212 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6445 21:45:50.344 0.00001462 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6446 21:45:50.344 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6448 21:45:50.344 0.00001422 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 6449 21:45:50.344 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6450 21:45:50.344 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6451 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6452 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6453 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6454 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6455 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6456 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6457 21:45:50.344 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6458 21:45:50.344 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6459 21:45:50.344 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6460 21:45:50.344 0.00001936 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6461 21:45:50.344 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6462 21:45:50.344 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6463 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6464 21:45:50.344 0.00007506 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 6465 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6466 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6467 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6468 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6469 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6470 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6471 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6472 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6473 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6474 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6475 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6476 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6477 21:45:50.344 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6478 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6479 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6480 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 6481 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6482 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6483 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6484 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6485 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6486 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6487 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6488 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6489 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6490 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6491 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6492 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6493 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6494 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6495 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6496 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6497 21:45:50.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6498 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6499 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6500 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6501 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6502 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6503 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6504 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6505 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6506 21:45:50.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6507 21:45:50.344 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 6508 21:45:50.344 0.00016514 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 6509 21:45:50.344 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6510 21:45:50.344 0.00188286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6511 21:45:50.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6512 21:45:50.344 0.00261333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6513 21:45:50.360 0.00038598 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 6514 21:45:50.360 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6515 21:45:50.360 0.00025402 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 03 6516 21:45:50.360 0.00026904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6517 21:45:50.360 0.00019556 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 6518 21:45:50.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6519 21:45:50.360 0.00020504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6520 21:45:50.360 0.00019872 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 6521 21:45:50.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6522 21:45:50.360 0.00008652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6523 21:45:50.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6524 21:45:50.360 0.00489324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6525 21:45:50.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6526 21:45:50.360 0.00110617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6527 21:45:50.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6528 21:45:50.360 0.00099832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6529 21:45:50.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6530 21:45:50.360 0.00096553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6531 21:45:50.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6532 21:45:50.360 0.00149136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6533 21:45:50.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6534 21:45:50.360 0.00124840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6535 21:45:50.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6536 21:45:50.360 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6537 21:45:50.375 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6538 21:45:50.375 0.00149452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6539 21:45:50.375 0.00017225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6540 21:45:50.375 0.00089126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6541 21:45:50.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6542 21:45:50.375 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6543 21:45:50.375 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6544 21:45:50.375 0.00116464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6545 21:45:50.375 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6546 21:45:50.375 0.00138746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6547 21:45:50.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6548 21:45:50.375 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6549 21:45:50.375 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6550 21:45:50.375 0.00138153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6551 21:45:50.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6552 21:45:50.375 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6553 21:45:50.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6554 21:45:50.375 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6555 21:45:50.375 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6556 21:45:50.375 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6557 21:45:50.375 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6558 21:45:50.375 0.00141709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6559 21:45:50.391 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6560 21:45:50.391 0.00149610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6561 21:45:50.391 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6562 21:45:50.391 0.00113580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6563 21:45:50.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6564 21:45:50.391 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6565 21:45:50.391 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6566 21:45:50.391 0.00118321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6567 21:45:50.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6568 21:45:50.391 0.00145146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6569 21:45:50.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6570 21:45:50.391 0.00119585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6571 21:45:50.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6572 21:45:50.391 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6573 21:45:50.391 0.00008968 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6574 21:45:50.391 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6575 21:45:50.391 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6576 21:45:50.391 0.00122232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6577 21:45:50.391 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6579 21:45:50.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6580 21:45:50.391 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6581 21:45:50.407 0.00011773 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6582 21:45:50.407 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6583 21:45:50.407 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6584 21:45:50.407 0.00144474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6585 21:45:50.407 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6586 21:45:50.407 0.00099082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6587 21:45:50.407 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6588 21:45:50.407 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6589 21:45:50.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6590 21:45:50.407 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6591 21:45:50.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6592 21:45:50.407 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6593 21:45:50.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6594 21:45:50.407 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6595 21:45:50.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6596 21:45:50.407 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6597 21:45:50.407 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6598 21:45:50.407 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6599 21:45:50.407 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6600 21:45:50.407 0.00142617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6601 21:45:50.422 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6602 21:45:50.422 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6603 21:45:50.422 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6604 21:45:50.422 0.00132030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6605 21:45:50.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6606 21:45:50.422 0.00138746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6607 21:45:50.422 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6608 21:45:50.422 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6609 21:45:50.422 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6610 21:45:50.422 0.00119783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6611 21:45:50.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6612 21:45:50.422 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6613 21:45:50.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6614 21:45:50.422 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6615 21:45:50.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6616 21:45:50.422 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6617 21:45:50.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6618 21:45:50.422 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6619 21:45:50.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6620 21:45:50.422 0.00141274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6621 21:45:50.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6622 21:45:50.422 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6623 21:45:50.437 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6624 21:45:50.437 0.00139022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6625 21:45:50.437 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6626 21:45:50.437 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6627 21:45:50.437 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6628 21:45:50.437 0.00142578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6629 21:45:50.437 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6630 21:45:50.437 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6631 21:45:50.437 0.00014973 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6632 21:45:50.437 0.00106390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6633 21:45:50.437 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6634 21:45:50.437 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6635 21:45:50.437 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6636 21:45:50.437 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6637 21:45:50.437 0.00012721 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6638 21:45:50.437 0.00118835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6639 21:45:50.437 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6640 21:45:50.437 0.00138035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6641 21:45:50.437 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6642 21:45:50.437 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6643 21:45:50.437 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6644 21:45:50.437 0.00121284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6645 21:45:50.453 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6646 21:45:50.453 0.00135664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6647 21:45:50.453 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6648 21:45:50.453 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6649 21:45:50.453 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6650 21:45:50.453 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6651 21:45:50.453 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6652 21:45:50.453 0.00153205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6653 21:45:50.453 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6654 21:45:50.453 0.00080790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6655 21:45:50.453 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6656 21:45:50.453 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6657 21:45:50.453 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6658 21:45:50.453 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6659 21:45:50.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6660 21:45:50.453 0.00151862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6661 21:45:50.453 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 6662 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 6663 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 6664 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 6665 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6666 21:45:50.453 0.00004622 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6667 21:45:50.453 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6668 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6669 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6670 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6671 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6672 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6673 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6674 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6675 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6676 21:45:50.453 0.00006519 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6677 21:45:50.453 0.00001580 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6680 21:45:50.453 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6681 21:45:50.453 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6682 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6683 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 6684 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6685 21:45:50.453 0.00003358 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6686 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6687 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 6688 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6689 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6690 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6691 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6692 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6693 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6694 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6695 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6696 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6697 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6698 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6699 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6700 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 6701 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6702 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6703 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6704 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 6705 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6706 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6707 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6708 21:45:50.453 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6709 21:45:50.453 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6710 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6711 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6712 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6713 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6714 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6715 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 6716 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 6717 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6718 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6719 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 6720 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 6721 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 6722 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6723 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6724 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6725 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6726 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6727 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 6728 21:45:50.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 6729 21:45:50.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6730 21:45:50.453 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 6731 21:45:50.453 0.00016869 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 6732 21:45:50.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6733 21:45:50.453 0.00188247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6734 21:45:50.453 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6735 21:45:50.453 0.00193659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6736 21:45:50.469 0.00016553 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 6737 21:45:50.469 0.00016316 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 13 6738 21:45:50.469 0.00010627 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6739 21:45:50.469 0.00013314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6740 21:45:50.469 0.00011220 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 6741 21:45:50.469 0.00012563 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6742 21:45:50.469 0.00011931 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 6743 21:45:50.469 0.00011615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6744 21:45:50.469 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6745 21:45:50.469 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6746 21:45:50.469 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6747 21:45:50.469 0.00598321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6748 21:45:50.469 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6749 21:45:50.469 0.00066844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6750 21:45:50.469 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6751 21:45:50.469 0.00097383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6752 21:45:50.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6753 21:45:50.469 0.00100267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6754 21:45:50.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6755 21:45:50.469 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6756 21:45:50.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6757 21:45:50.469 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6758 21:45:50.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6759 21:45:50.469 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6760 21:45:50.484 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6761 21:45:50.484 0.00132978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6762 21:45:50.484 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6763 21:45:50.484 0.00116662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6764 21:45:50.484 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6765 21:45:50.484 0.00140128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6766 21:45:50.484 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6767 21:45:50.484 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6768 21:45:50.484 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6769 21:45:50.484 0.00140247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6770 21:45:50.484 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6771 21:45:50.484 0.00117531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6772 21:45:50.484 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6773 21:45:50.484 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6774 21:45:50.484 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6775 21:45:50.484 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6776 21:45:50.484 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6777 21:45:50.484 0.00137837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6778 21:45:50.484 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6779 21:45:50.484 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6780 21:45:50.484 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6781 21:45:50.484 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6782 21:45:50.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6783 21:45:50.500 0.00123496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6784 21:45:50.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6785 21:45:50.500 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6786 21:45:50.500 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6787 21:45:50.500 0.00141314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6788 21:45:50.500 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6789 21:45:50.500 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6790 21:45:50.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6791 21:45:50.500 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6792 21:45:50.500 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6793 21:45:50.500 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6794 21:45:50.500 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6795 21:45:50.500 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6796 21:45:50.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6797 21:45:50.500 0.00142104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6798 21:45:50.500 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6799 21:45:50.500 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6800 21:45:50.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6801 21:45:50.500 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6802 21:45:50.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6803 21:45:50.500 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6805 21:45:50.516 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6806 21:45:50.516 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6807 21:45:50.516 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6808 21:45:50.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6809 21:45:50.516 0.00125195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6810 21:45:50.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6811 21:45:50.516 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6812 21:45:50.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6813 21:45:50.516 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6814 21:45:50.516 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6815 21:45:50.516 0.00112000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6816 21:45:50.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6817 21:45:50.516 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6818 21:45:50.516 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6819 21:45:50.516 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6820 21:45:50.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6821 21:45:50.516 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6822 21:45:50.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6823 21:45:50.516 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6824 21:45:50.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6825 21:45:50.516 0.00139417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6826 21:45:50.531 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6827 21:45:50.531 0.00147200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6828 21:45:50.531 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6829 21:45:50.531 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6830 21:45:50.531 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6831 21:45:50.531 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6832 21:45:50.531 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6833 21:45:50.531 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6834 21:45:50.531 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6835 21:45:50.531 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6836 21:45:50.531 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6837 21:45:50.531 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6838 21:45:50.531 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6839 21:45:50.531 0.00139180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6840 21:45:50.531 0.00010469 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6841 21:45:50.531 0.00090074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6842 21:45:50.531 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6843 21:45:50.531 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6844 21:45:50.531 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6845 21:45:50.531 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6846 21:45:50.531 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6847 21:45:50.531 0.00120889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6848 21:45:50.547 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6849 21:45:50.547 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6850 21:45:50.547 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6851 21:45:50.547 0.00114924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6852 21:45:50.547 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6853 21:45:50.547 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6854 21:45:50.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6855 21:45:50.547 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6856 21:45:50.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6857 21:45:50.547 0.00144119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6858 21:45:50.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6859 21:45:50.547 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6860 21:45:50.547 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6861 21:45:50.547 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6862 21:45:50.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6863 21:45:50.547 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6864 21:45:50.547 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6865 21:45:50.547 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6866 21:45:50.547 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6867 21:45:50.547 0.00122864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6868 21:45:50.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6869 21:45:50.563 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6870 21:45:50.563 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6871 21:45:50.563 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6872 21:45:50.563 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6873 21:45:50.563 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6874 21:45:50.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6875 21:45:50.563 0.00133965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6876 21:45:50.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6877 21:45:50.563 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6878 21:45:50.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6879 21:45:50.563 0.00164069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6880 21:45:50.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6881 21:45:50.563 0.00109867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6882 21:45:50.563 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6883 21:45:50.563 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 6884 21:45:50.563 0.00164543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6885 21:45:50.563 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 6886 21:45:50.563 0.00004820 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 13 6887 21:45:50.563 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 6888 21:45:50.563 0.00004899 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 6889 21:45:50.563 0.00005017 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6890 21:45:50.563 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6892 21:45:50.563 0.00002489 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6893 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6894 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 6895 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6896 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6897 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6898 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6899 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6900 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6901 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6902 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6903 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6904 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6905 21:45:50.563 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6907 21:45:50.563 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6908 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6910 21:45:50.563 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 6911 21:45:50.563 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6912 21:45:50.563 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6913 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6914 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6915 21:45:50.563 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6916 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6917 21:45:50.563 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6918 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6919 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6920 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6921 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6922 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6923 21:45:50.563 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6924 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6925 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6926 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 6927 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6928 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6929 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6930 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6931 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6932 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6933 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6934 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6935 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6936 21:45:50.563 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6937 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 6938 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 6939 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 6940 21:45:50.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6941 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 6942 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 6943 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6944 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6945 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6946 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6947 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6948 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6949 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6950 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6951 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6952 21:45:50.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 6953 21:45:50.563 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 6954 21:45:50.563 0.00023664 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 6955 21:45:50.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6956 21:45:50.563 0.00194845 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6957 21:45:50.563 0.00008178 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6958 21:45:50.563 0.00189827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6959 21:45:50.578 0.00029985 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 6960 21:45:50.578 0.00026351 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 03 6961 21:45:50.578 0.00010627 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6962 21:45:50.578 0.00017501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6963 21:45:50.578 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6964 21:45:50.578 0.00024731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6965 21:45:50.578 0.00024336 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 6966 21:45:50.578 0.00030617 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 6967 21:45:50.578 0.00013551 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6968 21:45:50.578 0.00017106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6969 21:45:50.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6970 21:45:50.578 0.00515951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6971 21:45:50.578 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6972 21:45:50.578 0.00101768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6973 21:45:50.578 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6974 21:45:50.578 0.00093906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6975 21:45:50.578 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6976 21:45:50.578 0.00108563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6977 21:45:50.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6978 21:45:50.578 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6979 21:45:50.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6980 21:45:50.578 0.00160040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6981 21:45:50.578 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6982 21:45:50.578 0.00094183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6983 21:45:50.578 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6984 21:45:50.578 0.00123299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6985 21:45:50.594 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6986 21:45:50.594 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6987 21:45:50.594 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6988 21:45:50.594 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6989 21:45:50.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6990 21:45:50.594 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6991 21:45:50.594 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6992 21:45:50.594 0.00104573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6993 21:45:50.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6994 21:45:50.594 0.00131793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6995 21:45:50.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6996 21:45:50.594 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6997 21:45:50.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 6998 21:45:50.594 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 6999 21:45:50.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7000 21:45:50.594 0.00118163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7001 21:45:50.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7002 21:45:50.594 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7003 21:45:50.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7004 21:45:50.594 0.00143645 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7005 21:45:50.610 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7006 21:45:50.610 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7007 21:45:50.610 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7008 21:45:50.610 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7009 21:45:50.610 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7010 21:45:50.610 0.00123891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7011 21:45:50.610 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7012 21:45:50.610 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7013 21:45:50.610 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7014 21:45:50.610 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7015 21:45:50.610 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7016 21:45:50.610 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7017 21:45:50.610 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7018 21:45:50.610 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7019 21:45:50.610 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7020 21:45:50.610 0.00144988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7021 21:45:50.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7022 21:45:50.610 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7023 21:45:50.610 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7024 21:45:50.610 0.00117491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7025 21:45:50.610 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7026 21:45:50.610 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7027 21:45:50.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7028 21:45:50.625 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7029 21:45:50.625 0.00011299 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7030 21:45:50.625 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7031 21:45:50.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7032 21:45:50.625 0.00127328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7033 21:45:50.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7034 21:45:50.625 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7035 21:45:50.625 0.00009679 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7036 21:45:50.625 0.00111526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7037 21:45:50.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7038 21:45:50.625 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7039 21:45:50.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7040 21:45:50.625 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7041 21:45:50.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7042 21:45:50.625 0.00119269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7043 21:45:50.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7044 21:45:50.625 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7045 21:45:50.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7046 21:45:50.625 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7047 21:45:50.625 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7048 21:45:50.625 0.00138825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7049 21:45:50.641 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7050 21:45:50.641 0.00146647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7051 21:45:50.641 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7052 21:45:50.641 0.00086795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7053 21:45:50.641 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7054 21:45:50.641 0.00126499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7055 21:45:50.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7056 21:45:50.641 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7057 21:45:50.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7058 21:45:50.641 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7059 21:45:50.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7060 21:45:50.641 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7061 21:45:50.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7062 21:45:50.641 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7063 21:45:50.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7064 21:45:50.641 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7065 21:45:50.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7066 21:45:50.641 0.00141709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7067 21:45:50.641 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7068 21:45:50.641 0.00112593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7069 21:45:50.641 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7070 21:45:50.641 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7071 21:45:50.657 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7072 21:45:50.657 0.00151664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7073 21:45:50.657 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7074 21:45:50.657 0.00113501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7075 21:45:50.657 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7076 21:45:50.657 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7077 21:45:50.657 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7078 21:45:50.657 0.00140365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7079 21:45:50.657 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7080 21:45:50.657 0.00116662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7081 21:45:50.657 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7082 21:45:50.657 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7083 21:45:50.657 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7084 21:45:50.657 0.00143170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7085 21:45:50.657 0.00011417 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7086 21:45:50.657 0.00121798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7087 21:45:50.657 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7088 21:45:50.657 0.00140919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7089 21:45:50.657 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7090 21:45:50.657 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7091 21:45:50.657 0.00025758 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7092 21:45:50.673 0.00105640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7093 21:45:50.673 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7094 21:45:50.673 0.00135743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7095 21:45:50.673 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7096 21:45:50.673 0.00170153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7097 21:45:50.673 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7098 21:45:50.673 0.00098765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7099 21:45:50.673 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7100 21:45:50.673 0.00122825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7101 21:45:50.673 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7102 21:45:50.673 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7103 21:45:50.673 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7104 21:45:50.673 0.00105877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7105 21:45:50.673 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7106 21:45:50.673 0.00164109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7107 21:45:50.673 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 7108 21:45:50.673 0.00001383 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 7109 21:45:50.673 0.00004701 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 7110 21:45:50.673 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 7111 21:45:50.673 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7112 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7113 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7114 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 7115 21:45:50.673 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7116 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7117 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7118 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 7119 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7120 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7121 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7122 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7123 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7124 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7125 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7126 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7127 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7128 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7129 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 7130 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 7131 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7132 21:45:50.673 0.00002686 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7133 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 7134 21:45:50.673 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 45 7135 21:45:50.673 0.00001343 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7136 21:45:50.673 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7137 21:45:50.673 0.00005057 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7138 21:45:50.673 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7139 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7140 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7141 21:45:50.673 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7142 21:45:50.673 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7143 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7144 21:45:50.673 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7145 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7146 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7147 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7148 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7149 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7150 21:45:50.673 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7151 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7152 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7153 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7154 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7155 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7156 21:45:50.673 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7157 21:45:50.673 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7158 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7159 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7160 21:45:50.673 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7161 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 7162 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7163 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7164 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7165 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 7166 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7167 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7168 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7169 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7170 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7171 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7172 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7173 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7174 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7175 21:45:50.673 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7176 21:45:50.673 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 7177 21:45:50.673 0.00015328 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 7178 21:45:50.673 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7179 21:45:50.673 0.00197412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7180 21:45:50.673 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7181 21:45:50.673 0.00217324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7182 21:45:50.688 0.00023664 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 7183 21:45:50.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7184 21:45:50.688 0.00036069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7185 21:45:50.688 0.00027417 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 13 7187 21:45:50.688 0.00025679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7188 21:45:50.688 0.00019398 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 7189 21:45:50.688 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7190 21:45:50.688 0.00020780 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 7191 21:45:50.688 0.00022953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7192 21:45:50.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7193 21:45:50.688 0.00543131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7194 21:45:50.688 0.00011891 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7195 21:45:50.688 0.00091022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7196 21:45:50.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7197 21:45:50.688 0.00099990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7198 21:45:50.688 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7199 21:45:50.688 0.00104336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7200 21:45:50.688 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7201 21:45:50.688 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7202 21:45:50.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7203 21:45:50.688 0.00140444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7204 21:45:50.688 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7205 21:45:50.688 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7206 21:45:50.688 0.00010272 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7207 21:45:50.688 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7208 21:45:50.704 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7209 21:45:50.704 0.00060444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7210 21:45:50.704 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7211 21:45:50.704 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7212 21:45:50.704 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7213 21:45:50.704 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7214 21:45:50.704 0.00007506 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7215 21:45:50.704 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7216 21:45:50.704 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7217 21:45:50.704 0.00115358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7218 21:45:50.704 0.00013274 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7219 21:45:50.704 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7220 21:45:50.704 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7221 21:45:50.704 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7222 21:45:50.704 0.00024810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7223 21:45:50.704 0.00103348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7224 21:45:50.704 0.00020109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7225 21:45:50.704 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7226 21:45:50.704 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7227 21:45:50.704 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7228 21:45:50.719 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7229 21:45:50.719 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7230 21:45:50.719 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7231 21:45:50.719 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7232 21:45:50.719 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7233 21:45:50.719 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7234 21:45:50.719 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7235 21:45:50.719 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7236 21:45:50.719 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7237 21:45:50.719 0.00126222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7238 21:45:50.719 0.00011299 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7239 21:45:50.719 0.00123417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7240 21:45:50.719 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7241 21:45:50.719 0.00131121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7242 21:45:50.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7243 21:45:50.719 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7244 21:45:50.719 0.00013946 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7245 21:45:50.719 0.00118993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7246 21:45:50.719 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7247 21:45:50.719 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7248 21:45:50.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7249 21:45:50.719 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7250 21:45:50.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7251 21:45:50.735 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7252 21:45:50.735 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7253 21:45:50.735 0.00140247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7254 21:45:50.735 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7255 21:45:50.735 0.00120573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7256 21:45:50.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7257 21:45:50.735 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7258 21:45:50.735 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7259 21:45:50.735 0.00139141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7260 21:45:50.735 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7261 21:45:50.735 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7262 21:45:50.735 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7263 21:45:50.735 0.00116780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7264 21:45:50.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7265 21:45:50.735 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7266 21:45:50.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7267 21:45:50.735 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7268 21:45:50.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7269 21:45:50.735 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7270 21:45:50.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7271 21:45:50.735 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7272 21:45:50.751 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7273 21:45:50.751 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7274 21:45:50.751 0.00006440 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7275 21:45:50.751 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7276 21:45:50.751 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7277 21:45:50.751 0.00141669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7278 21:45:50.751 0.00007269 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7279 21:45:50.751 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7280 21:45:50.751 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7281 21:45:50.751 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7282 21:45:50.751 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7283 21:45:50.751 0.00150637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7284 21:45:50.751 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7285 21:45:50.751 0.00107180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7286 21:45:50.751 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7287 21:45:50.751 0.00142025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7288 21:45:50.751 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7289 21:45:50.751 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7290 21:45:50.751 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7291 21:45:50.751 0.00146370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7292 21:45:50.751 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7293 21:45:50.751 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7294 21:45:50.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7295 21:45:50.766 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7296 21:45:50.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7297 21:45:50.766 0.00137284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7299 21:45:50.766 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7300 21:45:50.766 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7301 21:45:50.766 0.00122627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7302 21:45:50.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7303 21:45:50.766 0.00136849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7304 21:45:50.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7305 21:45:50.766 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7306 21:45:50.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7307 21:45:50.766 0.00148583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7308 21:45:50.766 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7309 21:45:50.766 0.00108168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7310 21:45:50.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7311 21:45:50.766 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7312 21:45:50.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7313 21:45:50.766 0.00149728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7314 21:45:50.782 0.00005452 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7315 21:45:50.782 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7316 21:45:50.782 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7317 21:45:50.782 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7318 21:45:50.782 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7319 21:45:50.782 0.00117136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7320 21:45:50.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7321 21:45:50.782 0.00155101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7322 21:45:50.782 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7323 21:45:50.782 0.00112672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7324 21:45:50.782 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7325 21:45:50.782 0.00139931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7326 21:45:50.782 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7327 21:45:50.782 0.00103743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7328 21:45:50.782 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7329 21:45:50.782 0.00212859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7330 21:45:50.782 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 7331 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 7332 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 13 7333 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 7334 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7335 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7336 21:45:50.782 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7337 21:45:50.782 0.00002765 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7338 21:45:50.782 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7339 21:45:50.782 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7340 21:45:50.782 0.00004030 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 30 7341 21:45:50.782 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7342 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7343 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7344 21:45:50.782 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7345 21:45:50.782 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7346 21:45:50.782 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7347 21:45:50.782 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7348 21:45:50.782 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7349 21:45:50.782 0.00000356 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7350 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7351 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7352 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7353 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7354 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7355 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7356 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 7357 21:45:50.782 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7358 21:45:50.782 0.00001580 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7359 21:45:50.782 0.00004030 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7360 21:45:50.782 0.00004188 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7361 21:45:50.782 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7362 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7363 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7364 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7365 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7366 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7367 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7368 21:45:50.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7369 21:45:50.782 0.00005254 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7370 21:45:50.782 0.00001304 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7371 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7372 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 7373 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7374 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7375 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7376 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7377 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7378 21:45:50.782 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7379 21:45:50.782 0.00000593 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7380 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7381 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7382 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7383 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7384 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7385 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7386 21:45:50.782 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7387 21:45:50.782 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7388 21:45:50.782 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 7389 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7390 21:45:50.782 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7391 21:45:50.782 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7392 21:45:50.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7393 21:45:50.782 0.00001383 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7394 21:45:50.782 0.00003753 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7395 21:45:50.782 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7397 21:45:50.782 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7398 21:45:50.782 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7399 21:45:50.782 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 7400 21:45:50.782 0.00021965 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 7401 21:45:50.782 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7402 21:45:50.782 0.00203180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7403 21:45:50.782 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7404 21:45:50.782 0.00142222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7405 21:45:50.797 0.00029669 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 7406 21:45:50.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7407 21:45:50.797 0.00034212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7408 21:45:50.797 0.00028089 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 04 7409 21:45:50.797 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7410 21:45:50.797 0.00025995 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 7411 21:45:50.797 0.00027299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7412 21:45:50.797 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7413 21:45:50.797 0.00037807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7414 21:45:50.797 0.00023111 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 7415 21:45:50.797 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7416 21:45:50.797 0.00526934 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7417 21:45:50.797 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7418 21:45:50.797 0.00051161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7419 21:45:50.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7420 21:45:50.797 0.00102558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7421 21:45:50.797 0.00019793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7422 21:45:50.797 0.00086005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7423 21:45:50.797 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7424 21:45:50.797 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7425 21:45:50.797 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7426 21:45:50.797 0.00117491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7427 21:45:50.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7428 21:45:50.797 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7429 21:45:50.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7430 21:45:50.797 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7431 21:45:50.813 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7432 21:45:50.813 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7433 21:45:50.813 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7434 21:45:50.813 0.00111170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7435 21:45:50.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7436 21:45:50.813 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7437 21:45:50.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7438 21:45:50.813 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7439 21:45:50.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7440 21:45:50.813 0.00140405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7441 21:45:50.813 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7442 21:45:50.813 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7443 21:45:50.813 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7444 21:45:50.813 0.00116425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7445 21:45:50.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7446 21:45:50.813 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7447 21:45:50.813 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7448 21:45:50.813 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7449 21:45:50.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7450 21:45:50.813 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7451 21:45:50.828 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7452 21:45:50.828 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7453 21:45:50.828 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7454 21:45:50.828 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7455 21:45:50.828 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7456 21:45:50.828 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7457 21:45:50.828 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7458 21:45:50.828 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7459 21:45:50.828 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7460 21:45:50.828 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7461 21:45:50.828 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7462 21:45:50.828 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7463 21:45:50.828 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7464 21:45:50.828 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7465 21:45:50.828 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7466 21:45:50.828 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7467 21:45:50.828 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7468 21:45:50.828 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7469 21:45:50.828 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7470 21:45:50.828 0.00135190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7471 21:45:50.828 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7472 21:45:50.828 0.00113896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7473 21:45:50.844 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7474 21:45:50.844 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7475 21:45:50.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7476 21:45:50.844 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7477 21:45:50.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7478 21:45:50.844 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7479 21:45:50.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7480 21:45:50.844 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7481 21:45:50.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7482 21:45:50.844 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7483 21:45:50.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7484 21:45:50.844 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7485 21:45:50.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7486 21:45:50.844 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7487 21:45:50.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7488 21:45:50.844 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7489 21:45:50.844 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7490 21:45:50.844 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7491 21:45:50.844 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7492 21:45:50.844 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7493 21:45:50.844 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7494 21:45:50.844 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7495 21:45:50.859 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7496 21:45:50.859 0.00146607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7497 21:45:50.859 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7498 21:45:50.859 0.00142578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7499 21:45:50.859 0.00008968 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7500 21:45:50.859 0.00113501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7501 21:45:50.859 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7502 21:45:50.859 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7503 21:45:50.859 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7504 21:45:50.859 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7505 21:45:50.859 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7506 21:45:50.859 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7507 21:45:50.859 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7508 21:45:50.859 0.00147793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7509 21:45:50.859 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7510 21:45:50.859 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7511 21:45:50.859 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7512 21:45:50.859 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7513 21:45:50.859 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7514 21:45:50.859 0.00159210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7515 21:45:50.875 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7516 21:45:50.875 0.00092721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7517 21:45:50.875 0.00027180 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7518 21:45:50.875 0.00096869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7519 21:45:50.875 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7520 21:45:50.875 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7521 21:45:50.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7522 21:45:50.875 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7523 21:45:50.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7524 21:45:50.875 0.00142143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7525 21:45:50.875 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7526 21:45:50.875 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7527 21:45:50.875 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7528 21:45:50.875 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7529 21:45:50.875 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7530 21:45:50.875 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7531 21:45:50.875 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7532 21:45:50.875 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7533 21:45:50.875 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7534 21:45:50.875 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7535 21:45:50.875 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7536 21:45:50.875 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7537 21:45:50.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7538 21:45:50.891 0.00145185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7539 21:45:50.891 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7540 21:45:50.891 0.00112000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7541 21:45:50.891 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7542 21:45:50.891 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7543 21:45:50.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7544 21:45:50.891 0.00141511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7545 21:45:50.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7546 21:45:50.891 0.00139536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7547 21:45:50.891 0.00010035 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7548 21:45:50.891 0.00113778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7549 21:45:50.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7550 21:45:50.891 0.00146805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7551 21:45:50.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7552 21:45:50.891 0.00179872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7553 21:45:50.891 0.00001304 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 7554 21:45:50.891 0.00007625 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 7555 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 04 7556 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7557 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7558 21:45:50.891 0.00009402 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7559 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7560 21:45:50.891 0.00004583 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7561 21:45:50.891 0.00002607 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7562 21:45:50.891 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7563 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7564 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7565 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7566 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7567 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7568 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7569 21:45:50.891 0.00001738 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7570 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7571 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7572 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7573 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7574 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7575 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 7576 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7577 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7578 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7579 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 7580 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 46 7581 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7582 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7583 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7584 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7585 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7586 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7587 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7588 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7589 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7590 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7591 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7592 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 7593 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7594 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7595 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7596 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 7597 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7598 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7599 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7600 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7601 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7602 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7603 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7604 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7605 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7606 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7607 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 7608 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 7609 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7610 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7611 21:45:50.891 0.00004899 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 7612 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 7613 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 7614 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7615 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7616 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7617 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7618 21:45:50.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7619 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7620 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 7621 21:45:50.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7622 21:45:50.891 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 7623 21:45:50.891 0.00012919 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 7624 21:45:50.891 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7625 21:45:50.891 0.00197057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7626 21:45:50.891 0.00009798 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7627 21:45:50.891 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7628 21:45:50.906 0.00013195 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 7629 21:45:50.906 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7630 21:45:50.906 0.00024020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7632 21:45:50.906 0.00015131 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 7633 21:45:50.906 0.00007783 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7634 21:45:50.906 0.00008415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7635 21:45:50.906 0.00012405 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 7636 21:45:50.906 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7637 21:45:50.906 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7638 21:45:50.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7639 21:45:50.906 0.00730272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7640 21:45:50.906 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7641 21:45:50.906 0.00104336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7642 21:45:50.906 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7643 21:45:50.906 0.00094301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7644 21:45:50.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7645 21:45:50.906 0.00102163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7646 21:45:50.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7647 21:45:50.906 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7648 21:45:50.906 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7649 21:45:50.906 0.00135546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7650 21:45:50.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7651 21:45:50.906 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7652 21:45:50.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7653 21:45:50.922 0.00150795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7654 21:45:50.922 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7655 21:45:50.922 0.00115793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7656 21:45:50.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7657 21:45:50.922 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7658 21:45:50.922 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7659 21:45:50.922 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7660 21:45:50.922 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7661 21:45:50.922 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7662 21:45:50.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7663 21:45:50.922 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7664 21:45:50.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7665 21:45:50.922 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7666 21:45:50.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7667 21:45:50.922 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7668 21:45:50.922 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7669 21:45:50.922 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7670 21:45:50.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7671 21:45:50.922 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7672 21:45:50.922 0.00012089 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7673 21:45:50.922 0.00135506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7674 21:45:50.938 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7675 21:45:50.938 0.00119348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7676 21:45:50.938 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7677 21:45:50.938 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7678 21:45:50.938 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7679 21:45:50.938 0.00149768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7680 21:45:50.938 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7681 21:45:50.938 0.00107536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7682 21:45:50.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7683 21:45:50.938 0.00136691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7684 21:45:50.938 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7685 21:45:50.938 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7686 21:45:50.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7687 21:45:50.938 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7688 21:45:50.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7689 21:45:50.938 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7690 21:45:50.938 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7691 21:45:50.938 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7692 21:45:50.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7693 21:45:50.938 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7694 21:45:50.938 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7695 21:45:50.938 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7696 21:45:50.953 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7697 21:45:50.953 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7698 21:45:50.953 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7699 21:45:50.953 0.00132030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7700 21:45:50.953 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7701 21:45:50.953 0.00157867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7702 21:45:50.953 0.00013867 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7703 21:45:50.953 0.00102716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7704 21:45:50.953 0.00009205 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7705 21:45:50.953 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7706 21:45:50.953 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7707 21:45:50.953 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7708 21:45:50.953 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7709 21:45:50.953 0.00137482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7710 21:45:50.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7711 21:45:50.953 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7712 21:45:50.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7713 21:45:50.953 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7714 21:45:50.953 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7715 21:45:50.953 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7716 21:45:50.969 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7717 21:45:50.969 0.00123062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7718 21:45:50.969 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7719 21:45:50.969 0.00126499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7720 21:45:50.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7721 21:45:50.969 0.00125314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7722 21:45:50.969 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7723 21:45:50.969 0.00122627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7724 21:45:50.969 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7725 21:45:50.969 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7726 21:45:50.969 0.00011496 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7728 21:45:50.969 0.00006519 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7729 21:45:50.969 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7730 21:45:50.969 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7731 21:45:50.969 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7732 21:45:50.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7733 21:45:50.969 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7734 21:45:50.969 0.00004622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7735 21:45:50.969 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7736 21:45:50.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7737 21:45:50.969 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7738 21:45:50.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7739 21:45:50.985 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7740 21:45:50.985 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7741 21:45:50.985 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7742 21:45:50.985 0.00014143 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7743 21:45:50.985 0.00113185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7744 21:45:50.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7745 21:45:50.985 0.00139773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7746 21:45:50.985 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7747 21:45:50.985 0.00145817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7748 21:45:50.985 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7749 21:45:50.985 0.00109393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7750 21:45:50.985 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7751 21:45:50.985 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7752 21:45:50.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7753 21:45:50.985 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7754 21:45:50.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7755 21:45:50.985 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7756 21:45:50.985 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7757 21:45:50.985 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7758 21:45:50.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7759 21:45:50.985 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7760 21:45:51.000 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7761 21:45:51.000 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7762 21:45:51.000 0.00006479 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7763 21:45:51.000 0.00128869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7764 21:45:51.000 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7765 21:45:51.000 0.00108840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7766 21:45:51.000 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7767 21:45:51.000 0.00121244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7768 21:45:51.000 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7769 21:45:51.000 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7770 21:45:51.000 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7771 21:45:51.000 0.00153363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7772 21:45:51.000 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7773 21:45:51.000 0.00101610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7774 21:45:51.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7775 21:45:51.000 0.00169877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7776 21:45:51.000 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 7777 21:45:51.000 0.00015723 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 7778 21:45:51.000 0.00006637 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 7779 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 7780 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 7781 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7782 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7783 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7784 21:45:51.000 0.00005531 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7785 21:45:51.000 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7786 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 7787 21:45:51.000 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7788 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7789 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7790 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7791 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7792 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7793 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7794 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7795 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7796 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7797 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7798 21:45:51.000 0.00005728 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7799 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7800 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7801 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7802 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 7803 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7804 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7805 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7806 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7807 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7808 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7809 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7810 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7811 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7812 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7813 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7814 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7815 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7816 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7817 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7818 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7819 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7820 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7821 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7822 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7823 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7824 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7825 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7826 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7827 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7828 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7829 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 7830 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 7831 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 7832 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7833 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 7834 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 7835 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7836 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7837 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7838 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7839 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7840 21:45:51.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7841 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7842 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7843 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7844 21:45:51.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 7845 21:45:51.000 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 7846 21:45:51.000 0.00020385 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 7847 21:45:51.000 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7848 21:45:51.000 0.00182242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7849 21:45:51.000 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7850 21:45:51.000 0.00107220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7851 21:45:51.016 0.00021610 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 7852 21:45:51.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7853 21:45:51.016 0.00022202 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7854 21:45:51.016 0.00016948 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 04 7855 21:45:51.016 0.00011338 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 7856 21:45:51.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7857 21:45:51.016 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7858 21:45:51.016 0.00017620 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 7859 21:45:51.016 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7860 21:45:51.016 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7861 21:45:51.016 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7862 21:45:51.016 0.00605235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7863 21:45:51.016 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7864 21:45:51.016 0.00091536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7865 21:45:51.016 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7866 21:45:51.016 0.00103941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7867 21:45:51.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7868 21:45:51.016 0.00108286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7869 21:45:51.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7870 21:45:51.016 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7871 21:45:51.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7872 21:45:51.016 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7873 21:45:51.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7874 21:45:51.016 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7875 21:45:51.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7876 21:45:51.016 0.00140326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7877 21:45:51.031 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7878 21:45:51.031 0.00107773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7879 21:45:51.031 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7880 21:45:51.031 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7881 21:45:51.031 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7882 21:45:51.031 0.00138667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7883 21:45:51.031 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7884 21:45:51.031 0.00135664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7885 21:45:51.031 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7886 21:45:51.031 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7887 21:45:51.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7888 21:45:51.031 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7889 21:45:51.031 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7890 21:45:51.031 0.00141432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7891 21:45:51.031 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7892 21:45:51.031 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7893 21:45:51.031 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7894 21:45:51.031 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7895 21:45:51.031 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7896 21:45:51.031 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7897 21:45:51.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7898 21:45:51.047 0.00147595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7899 21:45:51.047 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7900 21:45:51.047 0.00107733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7901 21:45:51.047 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7902 21:45:51.047 0.00112277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7903 21:45:51.047 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7904 21:45:51.047 0.00141037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7905 21:45:51.047 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7906 21:45:51.047 0.00143882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7907 21:45:51.047 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7908 21:45:51.047 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7909 21:45:51.047 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7910 21:45:51.047 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7911 21:45:51.047 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7912 21:45:51.047 0.00150321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7913 21:45:51.047 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7914 21:45:51.047 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7915 21:45:51.047 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7916 21:45:51.047 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7917 21:45:51.047 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7918 21:45:51.047 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7919 21:45:51.063 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7920 21:45:51.063 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7921 21:45:51.063 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7922 21:45:51.063 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7923 21:45:51.063 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7924 21:45:51.063 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7925 21:45:51.063 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7926 21:45:51.063 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7927 21:45:51.063 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7928 21:45:51.063 0.00118084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7929 21:45:51.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7930 21:45:51.063 0.00138035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7931 21:45:51.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7932 21:45:51.063 0.00137837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7933 21:45:51.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7934 21:45:51.063 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7935 21:45:51.063 0.00007783 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7936 21:45:51.063 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7937 21:45:51.063 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7938 21:45:51.063 0.00116583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7939 21:45:51.063 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7940 21:45:51.063 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7941 21:45:51.078 0.00004227 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7942 21:45:51.078 0.00127091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7943 21:45:51.078 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7944 21:45:51.078 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7945 21:45:51.078 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7946 21:45:51.078 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7947 21:45:51.078 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7948 21:45:51.078 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7949 21:45:51.078 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7950 21:45:51.078 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7951 21:45:51.078 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7952 21:45:51.078 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7953 21:45:51.078 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7954 21:45:51.078 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7955 21:45:51.078 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7956 21:45:51.078 0.00120099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7957 21:45:51.078 0.00018449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7958 21:45:51.078 0.00123180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7959 21:45:51.078 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7960 21:45:51.078 0.00117886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7961 21:45:51.078 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7962 21:45:51.078 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7963 21:45:51.094 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7964 21:45:51.094 0.00140840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7965 21:45:51.094 0.00007901 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7966 21:45:51.094 0.00120533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7967 21:45:51.094 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7968 21:45:51.094 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7969 21:45:51.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7970 21:45:51.094 0.00136059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7971 21:45:51.094 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7972 21:45:51.094 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7973 21:45:51.094 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7974 21:45:51.094 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7975 21:45:51.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7976 21:45:51.094 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7977 21:45:51.094 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7978 21:45:51.094 0.00119743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7979 21:45:51.094 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7980 21:45:51.094 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7981 21:45:51.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7982 21:45:51.094 0.00139417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7983 21:45:51.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7984 21:45:51.094 0.00143131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7985 21:45:51.110 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7986 21:45:51.110 0.00126499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7987 21:45:51.110 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7988 21:45:51.110 0.00118519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7989 21:45:51.110 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7990 21:45:51.110 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7991 21:45:51.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7992 21:45:51.110 0.00146489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7993 21:45:51.110 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7994 21:45:51.110 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7995 21:45:51.110 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7996 21:45:51.110 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7997 21:45:51.110 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 7998 21:45:51.110 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 7999 21:45:51.110 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 8000 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 8001 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 04 8002 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8003 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8004 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8005 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8006 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 8007 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 8008 21:45:51.110 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8009 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8010 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 8011 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 8012 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8013 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8014 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8015 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8016 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8017 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8018 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8019 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8020 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8021 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8022 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 8023 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 8024 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8025 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8026 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 47 8027 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 8028 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8029 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8030 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8031 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8032 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8033 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8034 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8035 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8036 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8037 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8038 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8039 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8040 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8041 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8042 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8043 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8044 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8045 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8046 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8047 21:45:51.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8048 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8049 21:45:51.110 0.00009560 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8050 21:45:51.110 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8051 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8052 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8053 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 8054 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8055 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8056 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8057 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 8058 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8059 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8060 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8061 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8062 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8063 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8064 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8065 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8066 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8067 21:45:51.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8068 21:45:51.110 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 8069 21:45:51.110 0.00024454 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 8070 21:45:51.110 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8071 21:45:51.110 0.00193580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8072 21:45:51.110 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8073 21:45:51.110 0.00319526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8074 21:45:51.126 0.00042469 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 8075 21:45:51.126 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8076 21:45:51.126 0.00038598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8077 21:45:51.126 0.00029116 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 14 8078 21:45:51.126 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8079 21:45:51.126 0.00034528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8080 21:45:51.126 0.00028919 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 8081 21:45:51.126 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8082 21:45:51.126 0.00120573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8083 21:45:51.126 0.00025837 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 8084 21:45:51.126 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8085 21:45:51.126 0.00471546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8086 21:45:51.126 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8087 21:45:51.126 0.00102637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8088 21:45:51.126 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8089 21:45:51.126 0.00098291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8090 21:45:51.126 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8091 21:45:51.126 0.00102558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8092 21:45:51.126 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8093 21:45:51.126 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8094 21:45:51.126 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8095 21:45:51.126 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8096 21:45:51.126 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8097 21:45:51.126 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8098 21:45:51.141 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8099 21:45:51.141 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8100 21:45:51.141 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8101 21:45:51.141 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8102 21:45:51.141 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8103 21:45:51.141 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8104 21:45:51.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8105 21:45:51.141 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8106 21:45:51.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8107 21:45:51.141 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8108 21:45:51.141 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8109 21:45:51.141 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8110 21:45:51.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8111 21:45:51.141 0.00113225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8112 21:45:51.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8113 21:45:51.141 0.00140840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8114 21:45:51.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8115 21:45:51.141 0.00146765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8116 21:45:51.141 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8117 21:45:51.141 0.00120968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8118 21:45:51.141 0.00019279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8119 21:45:51.141 0.00115082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8120 21:45:51.157 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8121 21:45:51.157 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8122 21:45:51.157 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8123 21:45:51.157 0.00118953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8124 21:45:51.157 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8125 21:45:51.157 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8126 21:45:51.157 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8127 21:45:51.157 0.00140879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8128 21:45:51.157 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8129 21:45:51.157 0.00110262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8130 21:45:51.157 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8131 21:45:51.157 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8132 21:45:51.157 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8133 21:45:51.157 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8134 21:45:51.157 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8135 21:45:51.157 0.00142815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8136 21:45:51.157 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8137 21:45:51.157 0.00119506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8138 21:45:51.157 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8139 21:45:51.157 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8140 21:45:51.172 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8141 21:45:51.172 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8142 21:45:51.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8143 21:45:51.172 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8144 21:45:51.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8145 21:45:51.172 0.00150519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8146 21:45:51.172 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8147 21:45:51.172 0.00097541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8148 21:45:51.172 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8149 21:45:51.172 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8150 21:45:51.172 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8151 21:45:51.172 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8152 21:45:51.172 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8153 21:45:51.172 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8154 21:45:51.172 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8155 21:45:51.172 0.00138825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8156 21:45:51.172 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8157 21:45:51.172 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8158 21:45:51.172 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8159 21:45:51.172 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8160 21:45:51.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8161 21:45:51.172 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8162 21:45:51.187 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8163 21:45:51.187 0.00140484 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8164 21:45:51.187 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8165 21:45:51.187 0.00119822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8166 21:45:51.187 0.00009798 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8167 21:45:51.187 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8168 21:45:51.187 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8169 21:45:51.187 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8170 21:45:51.187 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8171 21:45:51.187 0.00111724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8172 21:45:51.187 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8173 21:45:51.187 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8174 21:45:51.187 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8175 21:45:51.187 0.00138153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8176 21:45:51.187 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8177 21:45:51.187 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8178 21:45:51.187 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8179 21:45:51.187 0.00137126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8180 21:45:51.187 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8181 21:45:51.187 0.00150440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8182 21:45:51.187 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8183 21:45:51.187 0.00123101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8184 21:45:51.203 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8185 21:45:51.203 0.00116030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8186 21:45:51.203 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8187 21:45:51.203 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8188 21:45:51.203 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8189 21:45:51.203 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8190 21:45:51.203 0.00012444 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8191 21:45:51.203 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8192 21:45:51.203 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8193 21:45:51.203 0.00096040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8194 21:45:51.203 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8195 21:45:51.203 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8196 21:45:51.203 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8197 21:45:51.203 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8198 21:45:51.203 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8199 21:45:51.203 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8200 21:45:51.203 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8201 21:45:51.203 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8202 21:45:51.203 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8203 21:45:51.203 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8204 21:45:51.203 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8205 21:45:51.203 0.00135546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8206 21:45:51.219 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8207 21:45:51.219 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8208 21:45:51.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8209 21:45:51.219 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8210 21:45:51.219 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8211 21:45:51.219 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8212 21:45:51.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8213 21:45:51.219 0.00152770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8214 21:45:51.219 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8215 21:45:51.219 0.00112198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8216 21:45:51.219 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8217 21:45:51.219 0.00117452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8218 21:45:51.219 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8219 21:45:51.219 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8220 21:45:51.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8221 21:45:51.219 0.00100385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8222 21:45:51.219 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 8223 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 8224 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 8225 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8226 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8227 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 8228 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8229 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8230 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8231 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 8232 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 8233 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8234 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8235 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8236 21:45:51.219 0.00006242 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8237 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8238 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8239 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8240 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8241 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8242 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8243 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4C 8244 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8245 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8246 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8247 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 8248 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 8249 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8250 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8251 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8252 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8253 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8254 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8255 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8256 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8257 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8258 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8259 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8260 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8261 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8262 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8263 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8264 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8265 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8266 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8267 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8268 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8269 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8270 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8271 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8272 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8273 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8274 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8275 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8276 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 8277 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 8278 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8279 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 8280 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8281 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8282 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8283 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8284 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8285 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8286 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8287 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8288 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8289 21:45:51.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8290 21:45:51.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8291 21:45:51.219 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 8292 21:45:51.219 0.00019595 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 8293 21:45:51.219 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8294 21:45:51.219 0.00197017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8297 21:45:51.250 0.00023625 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 8298 21:45:51.250 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8299 21:45:51.250 0.00025521 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 04 8300 21:45:51.250 0.00024257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8301 21:45:51.250 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8302 21:45:51.250 0.00034410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8303 21:45:51.250 0.00030815 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 8304 21:45:51.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8305 21:45:51.250 0.00030617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8306 21:45:51.250 0.00028326 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 8307 21:45:51.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8308 21:45:51.250 0.00568376 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8309 21:45:51.250 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8310 21:45:51.250 0.00104573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8311 21:45:51.250 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8312 21:45:51.250 0.00102716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8313 21:45:51.250 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8314 21:45:51.250 0.00080593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8315 21:45:51.250 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8316 21:45:51.250 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8317 21:45:51.250 0.00011812 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8318 21:45:51.250 0.00116267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8319 21:45:51.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8320 21:45:51.250 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8321 21:45:51.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8322 21:45:51.266 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8323 21:45:51.266 0.00020622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8324 21:45:51.266 0.00117728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8325 21:45:51.266 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8326 21:45:51.266 0.00113896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8327 21:45:51.266 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8328 21:45:51.266 0.00135546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8329 21:45:51.266 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8330 21:45:51.266 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8331 21:45:51.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8332 21:45:51.266 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8333 21:45:51.266 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8334 21:45:51.266 0.00148543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8335 21:45:51.266 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8336 21:45:51.266 0.00110538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8337 21:45:51.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8338 21:45:51.266 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8339 21:45:51.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8340 21:45:51.266 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8341 21:45:51.266 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8342 21:45:51.266 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8343 21:45:51.282 0.00005452 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8344 21:45:51.282 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8345 21:45:51.282 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8346 21:45:51.282 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8347 21:45:51.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8348 21:45:51.282 0.00122706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8349 21:45:51.282 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8350 21:45:51.282 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8351 21:45:51.282 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8352 21:45:51.282 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8353 21:45:51.282 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8354 21:45:51.282 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8355 21:45:51.282 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8356 21:45:51.282 0.00149096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8357 21:45:51.282 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8358 21:45:51.282 0.00144988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8359 21:45:51.282 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8360 21:45:51.282 0.00109472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8361 21:45:51.282 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8362 21:45:51.282 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8363 21:45:51.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8364 21:45:51.282 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8365 21:45:51.297 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8366 21:45:51.297 0.00118874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8367 21:45:51.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8368 21:45:51.297 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8369 21:45:51.297 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8370 21:45:51.297 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8371 21:45:51.297 0.00007941 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8372 21:45:51.297 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8373 21:45:51.297 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8374 21:45:51.297 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8375 21:45:51.297 0.00009877 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8376 21:45:51.297 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8377 21:45:51.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8378 21:45:51.297 0.00120178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8379 21:45:51.297 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8380 21:45:51.297 0.00144909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8381 21:45:51.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8382 21:45:51.297 0.00135427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8383 21:45:51.297 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8384 21:45:51.297 0.00120454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8385 21:45:51.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8386 21:45:51.297 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8387 21:45:51.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8388 21:45:51.313 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8389 21:45:51.313 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8390 21:45:51.313 0.00137679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8391 21:45:51.313 0.00007506 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8392 21:45:51.313 0.00122706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8393 21:45:51.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8394 21:45:51.313 0.00141314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8395 21:45:51.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8396 21:45:51.313 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8397 21:45:51.313 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8398 21:45:51.313 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8399 21:45:51.313 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8400 21:45:51.313 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8401 21:45:51.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8402 21:45:51.313 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8403 21:45:51.313 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8404 21:45:51.313 0.00147240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8405 21:45:51.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8406 21:45:51.313 0.00106706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8407 21:45:51.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8408 21:45:51.313 0.00143407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8409 21:45:51.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8410 21:45:51.329 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8411 21:45:51.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8412 21:45:51.329 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8413 21:45:51.329 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8414 21:45:51.329 0.00141709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8415 21:45:51.329 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8416 21:45:51.329 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8417 21:45:51.329 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8418 21:45:51.329 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8419 21:45:51.329 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8420 21:45:51.329 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8421 21:45:51.329 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8422 21:45:51.329 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8423 21:45:51.329 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8424 21:45:51.329 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8425 21:45:51.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8426 21:45:51.329 0.00144198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8427 21:45:51.329 0.00004859 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8428 21:45:51.329 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8429 21:45:51.344 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8430 21:45:51.344 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8431 21:45:51.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8432 21:45:51.344 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8433 21:45:51.344 0.00015447 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8434 21:45:51.344 0.00113936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8435 21:45:51.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8436 21:45:51.344 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8437 21:45:51.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8438 21:45:51.344 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8439 21:45:51.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8440 21:45:51.344 0.00117926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8441 21:45:51.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8442 21:45:51.344 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8443 21:45:51.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8444 21:45:51.344 0.00185126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8445 21:45:51.344 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 8446 21:45:51.344 0.00005649 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 8447 21:45:51.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 04 8448 21:45:51.344 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 8449 21:45:51.344 0.00000435 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8450 21:45:51.344 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8452 21:45:51.344 0.00001936 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8453 21:45:51.344 0.00008375 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8454 21:45:51.344 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8455 21:45:51.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 18 8456 21:45:51.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8457 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8458 21:45:51.344 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8459 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8460 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8461 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8462 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8463 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8464 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8465 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8466 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8467 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 8468 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8469 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8470 21:45:51.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8471 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 8472 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8473 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8474 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8475 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8476 21:45:51.344 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8477 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8478 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8479 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8480 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8481 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8482 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8483 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 8484 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8485 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8486 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8487 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 8488 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8489 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8490 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8491 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8492 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8493 21:45:51.344 0.00005649 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8494 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8495 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8496 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8497 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8498 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8499 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 56 8500 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8501 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8502 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8503 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 56 8504 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8505 21:45:51.344 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8506 21:45:51.344 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8507 21:45:51.344 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8508 21:45:51.344 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8509 21:45:51.344 0.00002410 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8510 21:45:51.344 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8511 21:45:51.344 0.00005926 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8512 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8513 21:45:51.344 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8514 21:45:51.344 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 8515 21:45:51.344 0.00018805 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 8516 21:45:51.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8517 21:45:51.344 0.00197254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8518 21:45:51.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8519 21:45:51.344 0.00169205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8520 21:45:51.360 0.00018528 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 8521 21:45:51.360 0.00014499 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 14 8522 21:45:51.360 0.00021649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8523 21:45:51.360 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8524 21:45:51.360 0.00028761 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 8525 21:45:51.360 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8526 21:45:51.360 0.00012919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8527 21:45:51.360 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8528 21:45:51.360 0.00027970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8529 21:45:51.360 0.00025600 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 8530 21:45:51.360 0.00008059 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8531 21:45:51.360 0.00470677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8532 21:45:51.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8533 21:45:51.360 0.00099556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8534 21:45:51.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8535 21:45:51.360 0.00099358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8536 21:45:51.360 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8537 21:45:51.360 0.00095170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8538 21:45:51.360 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8539 21:45:51.360 0.00144395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8540 21:45:51.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8541 21:45:51.360 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8542 21:45:51.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8543 21:45:51.360 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8544 21:45:51.360 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8545 21:45:51.360 0.00156010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8546 21:45:51.376 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8547 21:45:51.376 0.00096079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8548 21:45:51.376 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8549 21:45:51.376 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8550 21:45:51.376 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8551 21:45:51.376 0.00122667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8552 21:45:51.376 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8553 21:45:51.376 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8554 21:45:51.376 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8555 21:45:51.376 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8556 21:45:51.376 0.00012207 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8557 21:45:51.376 0.00112079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8558 21:45:51.376 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8559 21:45:51.376 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8560 21:45:51.376 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8561 21:45:51.376 0.00126894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8562 21:45:51.376 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8563 21:45:51.376 0.00134519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8564 21:45:51.376 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8565 21:45:51.376 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8566 21:45:51.391 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8567 21:45:51.391 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8568 21:45:51.391 0.00009600 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8569 21:45:51.391 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8570 21:45:51.391 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8572 21:45:51.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8573 21:45:51.391 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8574 21:45:51.391 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8575 21:45:51.391 0.00122430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8576 21:45:51.391 0.00014696 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8577 21:45:51.391 0.00124286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8578 21:45:51.391 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8579 21:45:51.391 0.00120375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8580 21:45:51.391 0.00011101 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8582 21:45:51.391 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8583 21:45:51.391 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8584 21:45:51.391 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8585 21:45:51.391 0.00139022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8586 21:45:51.391 0.00012365 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8587 21:45:51.391 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8588 21:45:51.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8589 21:45:51.406 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8590 21:45:51.406 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8591 21:45:51.406 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8592 21:45:51.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8593 21:45:51.406 0.00152533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8594 21:45:51.406 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8595 21:45:51.406 0.00144711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8596 21:45:51.406 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8597 21:45:51.406 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8598 21:45:51.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8599 21:45:51.406 0.00119348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8600 21:45:51.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8601 21:45:51.406 0.00138667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8602 21:45:51.406 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8603 21:45:51.406 0.00122311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8604 21:45:51.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8605 21:45:51.406 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8606 21:45:51.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8607 21:45:51.406 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8609 21:45:51.406 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8610 21:45:51.422 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8611 21:45:51.422 0.00113383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8612 21:45:51.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8613 21:45:51.422 0.00162568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8614 21:45:51.422 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8615 21:45:51.422 0.00105165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8616 21:45:51.422 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8618 21:45:51.422 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8619 21:45:51.422 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8620 21:45:51.422 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8621 21:45:51.422 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8622 21:45:51.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8623 21:45:51.422 0.00143012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8624 21:45:51.422 0.00010272 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8625 21:45:51.422 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8626 21:45:51.422 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8627 21:45:51.422 0.00118874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8628 21:45:51.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8629 21:45:51.422 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8630 21:45:51.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8631 21:45:51.422 0.00137640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8632 21:45:51.437 0.00006756 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8633 21:45:51.437 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8634 21:45:51.437 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8635 21:45:51.437 0.00135743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8636 21:45:51.437 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8637 21:45:51.437 0.00112277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8638 21:45:51.437 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8639 21:45:51.437 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8640 21:45:51.437 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8641 21:45:51.437 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8642 21:45:51.437 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8643 21:45:51.437 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8644 21:45:51.437 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8645 21:45:51.437 0.00122193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8646 21:45:51.437 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8647 21:45:51.437 0.00132978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8648 21:45:51.437 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8649 21:45:51.437 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8650 21:45:51.437 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8651 21:45:51.437 0.00139496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8652 21:45:51.453 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8653 21:45:51.453 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8654 21:45:51.453 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8655 21:45:51.453 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8656 21:45:51.453 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8657 21:45:51.453 0.00117136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8658 21:45:51.453 0.00006202 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8659 21:45:51.453 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8660 21:45:51.453 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8661 21:45:51.453 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8662 21:45:51.453 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8663 21:45:51.453 0.00092326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8664 21:45:51.453 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8665 21:45:51.453 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8666 21:45:51.453 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8667 21:45:51.453 0.00153047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8668 21:45:51.453 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 8669 21:45:51.453 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 8670 21:45:51.453 0.00004662 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 8671 21:45:51.453 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 8672 21:45:51.453 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8673 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8674 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 8675 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 8676 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8677 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 8678 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8679 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8680 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8681 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8682 21:45:51.453 0.00004780 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8683 21:45:51.453 0.00004069 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8684 21:45:51.453 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8685 21:45:51.453 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8686 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8687 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8688 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8689 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8690 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 8691 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 8692 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8693 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 8694 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8695 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8696 21:45:51.453 0.00004583 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8697 21:45:51.453 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8698 21:45:51.453 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8699 21:45:51.453 0.00005096 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8700 21:45:51.453 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8701 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8702 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8703 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8704 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8705 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8706 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 8707 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 8708 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8709 21:45:51.453 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 34 8710 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8711 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8712 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8713 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8714 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8715 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8716 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8717 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8718 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8719 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8720 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8721 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 8722 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 8723 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 8724 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8725 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 8726 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8727 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8728 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8729 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8730 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8731 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8732 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8733 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8734 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8735 21:45:51.453 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8736 21:45:51.453 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8737 21:45:51.453 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 8738 21:45:51.453 0.00016435 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 8739 21:45:51.453 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8740 21:45:51.453 0.00195556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8741 21:45:51.453 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8742 21:45:51.453 0.00180583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8743 21:45:51.469 0.00016474 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 8744 21:45:51.469 0.00012721 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 04 8745 21:45:51.469 0.00008336 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8746 21:45:51.469 0.00007625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8747 21:45:51.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8748 21:45:51.469 0.00017896 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 8749 21:45:51.469 0.00023941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8750 21:45:51.469 0.00015881 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 8751 21:45:51.469 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8752 21:45:51.469 0.00009402 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8753 21:45:51.469 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8754 21:45:51.469 0.00614756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8755 21:45:51.469 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8756 21:45:51.469 0.00066291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8757 21:45:51.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8758 21:45:51.469 0.00093946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8759 21:45:51.469 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8760 21:45:51.469 0.00090904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8761 21:45:51.469 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8762 21:45:51.469 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8763 21:45:51.469 0.00006716 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8764 21:45:51.469 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8765 21:45:51.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8766 21:45:51.469 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8767 21:45:51.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8768 21:45:51.469 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8769 21:45:51.485 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8770 21:45:51.485 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8771 21:45:51.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8772 21:45:51.485 0.00117847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8773 21:45:51.485 0.00009047 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8774 21:45:51.485 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8775 21:45:51.485 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8776 21:45:51.485 0.00114054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8777 21:45:51.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8778 21:45:51.485 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8779 21:45:51.485 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8780 21:45:51.485 0.00117057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8781 21:45:51.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8782 21:45:51.485 0.00127328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8783 21:45:51.485 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8784 21:45:51.485 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8785 21:45:51.485 0.00023427 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8786 21:45:51.485 0.00114173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8787 21:45:51.485 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8788 21:45:51.485 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8789 21:45:51.485 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8790 21:45:51.485 0.00151388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8791 21:45:51.500 0.00004622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8792 21:45:51.500 0.00245017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8793 21:45:51.500 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8794 21:45:51.500 0.00023467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8795 21:45:51.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8796 21:45:51.500 0.00103190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8797 21:45:51.500 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8798 21:45:51.500 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8799 21:45:51.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8800 21:45:51.500 0.00122627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8801 21:45:51.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8802 21:45:51.500 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8803 21:45:51.500 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8804 21:45:51.500 0.00105561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8805 21:45:51.500 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8806 21:45:51.500 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8807 21:45:51.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8808 21:45:51.500 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8809 21:45:51.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8810 21:45:51.500 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8811 21:45:51.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8812 21:45:51.500 0.00125511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8813 21:45:51.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8814 21:45:51.516 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8815 21:45:51.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8816 21:45:51.516 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8817 21:45:51.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8818 21:45:51.516 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8819 21:45:51.516 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8820 21:45:51.516 0.00125748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8821 21:45:51.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8822 21:45:51.516 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8823 21:45:51.516 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8824 21:45:51.516 0.00144553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8825 21:45:51.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8826 21:45:51.516 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8827 21:45:51.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8828 21:45:51.516 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8829 21:45:51.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8830 21:45:51.516 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8831 21:45:51.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8832 21:45:51.516 0.00144869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8833 21:45:51.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8834 21:45:51.532 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8835 21:45:51.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8836 21:45:51.532 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8837 21:45:51.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8838 21:45:51.532 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8839 21:45:51.532 0.00007941 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8840 21:45:51.532 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8841 21:45:51.532 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8842 21:45:51.532 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8843 21:45:51.532 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8844 21:45:51.532 0.00119111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8845 21:45:51.532 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8846 21:45:51.532 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8847 21:45:51.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8848 21:45:51.532 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8849 21:45:51.532 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8850 21:45:51.532 0.00145462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8851 21:45:51.532 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8852 21:45:51.532 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8853 21:45:51.532 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8854 21:45:51.532 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8855 21:45:51.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8856 21:45:51.547 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8857 21:45:51.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8858 21:45:51.547 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8859 21:45:51.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8860 21:45:51.547 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8861 21:45:51.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8862 21:45:51.547 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8863 21:45:51.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8864 21:45:51.547 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8865 21:45:51.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8866 21:45:51.547 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8867 21:45:51.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8868 21:45:51.547 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8869 21:45:51.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8870 21:45:51.547 0.00153916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8871 21:45:51.547 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8872 21:45:51.547 0.00106548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8873 21:45:51.547 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8874 21:45:51.547 0.00116148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8875 21:45:51.547 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8876 21:45:51.547 0.00124168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8877 21:45:51.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8878 21:45:51.563 0.00122943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8879 21:45:51.563 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8880 21:45:51.563 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8881 21:45:51.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8882 21:45:51.563 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8883 21:45:51.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8884 21:45:51.563 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8885 21:45:51.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8886 21:45:51.563 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8887 21:45:51.563 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8888 21:45:51.563 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8889 21:45:51.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8890 21:45:51.563 0.00146528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8891 21:45:51.563 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 8892 21:45:51.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 8893 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 04 8894 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 8895 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 8896 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8897 21:45:51.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 68 8898 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8899 21:45:51.563 0.00004346 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8900 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8901 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 68 8902 21:45:51.563 0.00003240 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8903 21:45:51.563 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8904 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8905 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8906 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8907 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8908 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8909 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8910 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8911 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8912 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8913 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 81 8914 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8915 21:45:51.563 0.00003872 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8916 21:45:51.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 8917 21:45:51.563 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 81 8918 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8919 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8920 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8921 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8922 21:45:51.563 0.00003832 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8923 21:45:51.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8924 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8925 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8926 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8927 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8928 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8929 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 93 8930 21:45:51.563 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8931 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8932 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 8933 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 93 8934 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 60 8935 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8936 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8937 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8938 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8939 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8940 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8941 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 8942 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 8943 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 44 8944 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8945 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8946 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8947 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8948 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8949 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8950 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8951 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8952 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8953 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8954 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8955 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8956 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8957 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8958 21:45:51.563 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8959 21:45:51.563 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 8960 21:45:51.563 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 8961 21:45:51.563 0.00023111 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 8962 21:45:51.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8963 21:45:51.563 0.00215625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8964 21:45:51.563 0.00012721 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8965 21:45:51.563 0.00285195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8966 21:45:51.579 0.00025402 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 8967 21:45:51.579 0.00000000 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 Length: 1, Data: 14 8971 21:45:51.579 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8972 21:45:51.579 0.00019556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8973 21:45:51.579 0.00010232 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 8974 21:45:51.579 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8975 21:45:51.579 0.00584534 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8976 21:45:51.579 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8977 21:45:51.579 0.00091220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8978 21:45:51.579 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8979 21:45:51.579 0.00107733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8980 21:45:51.579 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8981 21:45:51.579 0.00102795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8982 21:45:51.579 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8983 21:45:51.579 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8984 21:45:51.579 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8985 21:45:51.579 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8986 21:45:51.579 0.00009047 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8987 21:45:51.579 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8988 21:45:51.579 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8989 21:45:51.579 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8990 21:45:51.594 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8991 21:45:51.594 0.00139773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8992 21:45:51.594 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8993 21:45:51.594 0.00118558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8994 21:45:51.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8995 21:45:51.594 0.00141274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8996 21:45:51.594 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8997 21:45:51.594 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 8998 21:45:51.594 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 8999 21:45:51.594 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9000 21:45:51.594 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9001 21:45:51.594 0.00149728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9002 21:45:51.594 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9003 21:45:51.594 0.00096711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9004 21:45:51.594 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9005 21:45:51.594 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9006 21:45:51.594 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9007 21:45:51.594 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9008 21:45:51.594 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9009 21:45:51.594 0.00144790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9010 21:45:51.610 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9011 21:45:51.610 0.00089679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9012 21:45:51.610 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9013 21:45:51.610 0.00113067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9014 21:45:51.610 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9015 21:45:51.610 0.00127091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9016 21:45:51.610 0.00010864 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9017 21:45:51.610 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9018 21:45:51.610 0.00010667 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9019 21:45:51.610 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9020 21:45:51.610 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9021 21:45:51.610 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9022 21:45:51.610 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9023 21:45:51.610 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9024 21:45:51.610 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9025 21:45:51.610 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9026 21:45:51.610 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9027 21:45:51.610 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9028 21:45:51.610 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9029 21:45:51.610 0.00118716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9030 21:45:51.610 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9031 21:45:51.610 0.00163832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9032 21:45:51.626 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9033 21:45:51.626 0.00105403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9034 21:45:51.626 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9035 21:45:51.626 0.00111842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9036 21:45:51.626 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9037 21:45:51.626 0.00124168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9038 21:45:51.626 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9039 21:45:51.626 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9040 21:45:51.626 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9041 21:45:51.626 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9042 21:45:51.626 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9043 21:45:51.626 0.00118993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9044 21:45:51.626 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9045 21:45:51.626 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9046 21:45:51.626 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9047 21:45:51.626 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9048 21:45:51.626 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9049 21:45:51.626 0.00176198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9050 21:45:51.626 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9051 21:45:51.626 0.00097146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9052 21:45:51.626 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9053 21:45:51.626 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9054 21:45:51.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9055 21:45:51.641 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9056 21:45:51.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9057 21:45:51.641 0.00139773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9058 21:45:51.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9059 21:45:51.641 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9060 21:45:51.641 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9061 21:45:51.641 0.00120059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9062 21:45:51.641 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9063 21:45:51.641 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9064 21:45:51.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9065 21:45:51.641 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9066 21:45:51.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9067 21:45:51.641 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9068 21:45:51.641 0.00012879 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9069 21:45:51.641 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9070 21:45:51.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9071 21:45:51.641 0.00141511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9072 21:45:51.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9073 21:45:51.641 0.00112948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9074 21:45:51.641 0.00022598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9075 21:45:51.656 0.00105482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9076 21:45:51.656 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9077 21:45:51.656 0.00121284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9078 21:45:51.656 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9079 21:45:51.656 0.00146884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9080 21:45:51.656 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9081 21:45:51.656 0.00096119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9082 21:45:51.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9083 21:45:51.656 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9084 21:45:51.656 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9085 21:45:51.656 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9086 21:45:51.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9087 21:45:51.656 0.00118440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9088 21:45:51.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9089 21:45:51.656 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9090 21:45:51.656 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9091 21:45:51.656 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9092 21:45:51.656 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9093 21:45:51.656 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9094 21:45:51.656 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9095 21:45:51.656 0.00144277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9096 21:45:51.672 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9097 21:45:51.672 0.00116069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9098 21:45:51.672 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9099 21:45:51.672 0.00133886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9100 21:45:51.672 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9101 21:45:51.672 0.00146489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9102 21:45:51.672 0.00006953 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9103 21:45:51.672 0.00105284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9104 21:45:51.672 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9105 21:45:51.672 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9106 21:45:51.672 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9107 21:45:51.672 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9108 21:45:51.672 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9109 21:45:51.672 0.00118400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9110 21:45:51.672 0.00015012 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9111 21:45:51.672 0.00010706 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 9112 21:45:51.672 0.00088968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9113 21:45:51.672 0.00002449 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 9114 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 9115 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 9116 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 9117 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 9118 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 9119 21:45:51.672 0.00002370 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 9120 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9121 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 36 9122 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9123 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9124 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9125 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9126 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9127 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9128 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9129 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9130 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9131 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9132 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9133 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 9134 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 9135 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 9136 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9137 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 37 9138 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9139 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9140 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9141 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9142 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9143 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9144 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9145 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9146 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9147 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9148 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9149 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 9150 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 4D 9151 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 9152 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9153 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 38 9154 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9155 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9156 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9157 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9158 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9159 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9160 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9161 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9162 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9163 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9164 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9165 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9166 21:45:51.672 0.00002212 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9167 21:45:51.672 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9168 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9169 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9170 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9171 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9172 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9173 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9174 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9175 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9176 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9177 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9178 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9179 21:45:51.672 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9180 21:45:51.672 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9181 21:45:51.672 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 9182 21:45:51.672 0.00016830 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 9183 21:45:51.672 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9184 21:45:51.672 0.00193778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9185 21:45:51.672 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9186 21:45:51.672 0.00258766 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9187 21:45:51.688 0.00016277 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 9188 21:45:51.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9189 21:45:51.688 0.00030301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9190 21:45:51.688 0.00023111 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 05 9191 21:45:51.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9192 21:45:51.688 0.00013985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9193 21:45:51.688 0.00010983 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 9194 21:45:51.688 0.00011615 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 9195 21:45:51.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9196 21:45:51.688 0.00009956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9197 21:45:51.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9198 21:45:51.688 0.00704988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9199 21:45:51.688 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9200 21:45:51.688 0.00103309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9201 21:45:51.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9202 21:45:51.688 0.00097027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9203 21:45:51.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9204 21:45:51.688 0.00114528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9205 21:45:51.688 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9206 21:45:51.688 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9207 21:45:51.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9208 21:45:51.688 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9209 21:45:51.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9210 21:45:51.688 0.00140444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9211 21:45:51.704 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9212 21:45:51.704 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9213 21:45:51.704 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9214 21:45:51.704 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9215 21:45:51.704 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9216 21:45:51.704 0.00115714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9217 21:45:51.704 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9219 21:45:51.704 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9220 21:45:51.704 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9221 21:45:51.704 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9222 21:45:51.704 0.00144316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9223 21:45:51.704 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9224 21:45:51.704 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9225 21:45:51.704 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9226 21:45:51.704 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9227 21:45:51.704 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9228 21:45:51.704 0.00133965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9229 21:45:51.704 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9230 21:45:51.704 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9231 21:45:51.704 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9232 21:45:51.704 0.00120059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9233 21:45:51.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9234 21:45:51.719 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9235 21:45:51.719 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9236 21:45:51.719 0.00149136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9237 21:45:51.719 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9238 21:45:51.719 0.00091062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9239 21:45:51.719 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9240 21:45:51.719 0.00122074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9241 21:45:51.719 0.00006281 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9242 21:45:51.719 0.00120454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9243 21:45:51.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9244 21:45:51.719 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9245 21:45:51.719 0.00008178 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9246 21:45:51.719 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9247 21:45:51.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9248 21:45:51.719 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9249 21:45:51.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9250 21:45:51.719 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9251 21:45:51.719 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9252 21:45:51.719 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9253 21:45:51.719 0.00008257 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9254 21:45:51.719 0.00142973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9255 21:45:51.735 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9256 21:45:51.735 0.00101215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9257 21:45:51.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9258 21:45:51.735 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9259 21:45:51.735 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9260 21:45:51.735 0.00123141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9261 21:45:51.735 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9262 21:45:51.735 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9263 21:45:51.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9264 21:45:51.735 0.00145541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9265 21:45:51.735 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9266 21:45:51.735 0.00092840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9267 21:45:51.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9268 21:45:51.735 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9269 21:45:51.735 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9270 21:45:51.735 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9271 21:45:51.735 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9272 21:45:51.735 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9273 21:45:51.735 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9274 21:45:51.735 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9275 21:45:51.750 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9276 21:45:51.750 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9277 21:45:51.750 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9278 21:45:51.750 0.00125353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9279 21:45:51.750 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9280 21:45:51.750 0.00137403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9281 21:45:51.750 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9282 21:45:51.750 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9283 21:45:51.750 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9284 21:45:51.750 0.00122193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9285 21:45:51.750 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9286 21:45:51.750 0.00147911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9287 21:45:51.750 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9288 21:45:51.750 0.00112711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9289 21:45:51.750 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9290 21:45:51.750 0.00122311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9291 21:45:51.750 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9292 21:45:51.750 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9293 21:45:51.750 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9294 21:45:51.750 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9295 21:45:51.750 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9296 21:45:51.750 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9297 21:45:51.766 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9298 21:45:51.766 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9299 21:45:51.766 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9300 21:45:51.766 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9301 21:45:51.766 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9302 21:45:51.766 0.00148899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9303 21:45:51.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9304 21:45:51.766 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9305 21:45:51.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9306 21:45:51.766 0.00124168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9307 21:45:51.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9308 21:45:51.766 0.00122983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9309 21:45:51.766 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9310 21:45:51.766 0.00143368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9311 21:45:51.766 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9312 21:45:51.766 0.00105363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9314 21:45:51.766 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9315 21:45:51.766 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9316 21:45:51.766 0.00144040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9317 21:45:51.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9318 21:45:51.766 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9319 21:45:51.782 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9320 21:45:51.782 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9321 21:45:51.782 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9322 21:45:51.782 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9323 21:45:51.782 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9324 21:45:51.782 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9325 21:45:51.782 0.00014894 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9326 21:45:51.782 0.00125432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9327 21:45:51.782 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9328 21:45:51.782 0.00124761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9329 21:45:51.782 0.00006637 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9330 21:45:51.782 0.00114805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9331 21:45:51.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9332 21:45:51.782 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9333 21:45:51.782 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9334 21:45:51.782 0.00092089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9335 21:45:51.782 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 9336 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 9337 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 9338 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 9339 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 9340 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9341 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9342 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9343 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9344 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9345 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9346 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9347 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9348 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9349 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9350 21:45:51.782 0.00005649 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9351 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9352 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9353 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9354 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9355 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9356 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9357 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9358 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9359 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9360 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9361 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9362 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9363 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9364 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9365 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9366 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9367 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9368 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9369 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9370 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9371 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9372 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9373 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9374 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9375 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9376 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9377 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9378 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9379 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9380 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9381 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9382 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9383 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9384 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9385 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9386 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9387 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9388 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9389 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9390 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9391 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9392 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9393 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9394 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9395 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9396 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9397 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9398 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9399 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9400 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9401 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9402 21:45:51.782 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9403 21:45:51.782 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9404 21:45:51.782 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 9405 21:45:51.782 0.00015605 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 9406 21:45:51.782 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9407 21:45:51.782 0.00210410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9408 21:45:51.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9409 21:45:51.782 0.00208909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9410 21:45:51.797 0.00018173 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 9411 21:45:51.797 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9412 21:45:51.797 0.00022400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9413 21:45:51.797 0.00015723 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 15 9414 21:45:51.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9415 21:45:51.797 0.00020464 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 9416 21:45:51.797 0.00022123 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9417 21:45:51.797 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9418 21:45:51.797 0.00023506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9419 21:45:51.797 0.00015565 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 9420 21:45:51.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9421 21:45:51.797 0.00722134 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9422 21:45:51.797 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9423 21:45:51.797 0.00093748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9424 21:45:51.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9425 21:45:51.797 0.00099516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9426 21:45:51.797 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9427 21:45:51.797 0.00119309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9428 21:45:51.797 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9429 21:45:51.797 0.00106627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9430 21:45:51.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9431 21:45:51.797 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9432 21:45:51.797 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9433 21:45:51.797 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9434 21:45:51.813 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9435 21:45:51.813 0.00069649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9436 21:45:51.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9437 21:45:51.813 0.00140642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9438 21:45:51.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9439 21:45:51.813 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9440 21:45:51.813 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9441 21:45:51.813 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9442 21:45:51.813 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9443 21:45:51.813 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9444 21:45:51.813 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9445 21:45:51.813 0.00128000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9446 21:45:51.813 0.00007269 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9447 21:45:51.813 0.00119625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9448 21:45:51.813 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9449 21:45:51.813 0.00153877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9450 21:45:51.813 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9451 21:45:51.813 0.00108958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9452 21:45:51.813 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9453 21:45:51.813 0.00108919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9454 21:45:51.829 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9455 21:45:51.829 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9456 21:45:51.829 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9457 21:45:51.829 0.00119190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9458 21:45:51.829 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9459 21:45:51.829 0.00117847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9460 21:45:51.829 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9461 21:45:51.829 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9462 21:45:51.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9463 21:45:51.829 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9464 21:45:51.829 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9465 21:45:51.829 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9466 21:45:51.829 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9467 21:45:51.829 0.00144395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9468 21:45:51.829 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9469 21:45:51.829 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9470 21:45:51.829 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9471 21:45:51.829 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9472 21:45:51.829 0.00007546 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9473 21:45:51.829 0.00132030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9474 21:45:51.829 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9475 21:45:51.829 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9476 21:45:51.844 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9477 21:45:51.844 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9478 21:45:51.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9479 21:45:51.844 0.00130489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9480 21:45:51.844 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9481 21:45:51.844 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9482 21:45:51.844 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9483 21:45:51.844 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9484 21:45:51.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9485 21:45:51.844 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9486 21:45:51.844 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9487 21:45:51.844 0.00136691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9488 21:45:51.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9489 21:45:51.844 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9490 21:45:51.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9491 21:45:51.844 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9492 21:45:51.844 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9493 21:45:51.844 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9494 21:45:51.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9495 21:45:51.844 0.00150835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9496 21:45:51.844 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9497 21:45:51.844 0.00113778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9498 21:45:51.860 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9499 21:45:51.860 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9500 21:45:51.860 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9501 21:45:51.860 0.00118835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9502 21:45:51.860 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9503 21:45:51.860 0.00119151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9504 21:45:51.860 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9505 21:45:51.860 0.00140365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9506 21:45:51.860 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9507 21:45:51.860 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9508 21:45:51.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9509 21:45:51.860 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9510 21:45:51.860 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9511 21:45:51.860 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9512 21:45:51.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9513 21:45:51.860 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9514 21:45:51.860 0.00007230 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9515 21:45:51.860 0.00113343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9516 21:45:51.860 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9518 21:45:51.860 0.00010430 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9519 21:45:51.860 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9520 21:45:51.876 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9521 21:45:51.876 0.00096909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9522 21:45:51.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9523 21:45:51.876 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9524 21:45:51.876 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9525 21:45:51.876 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9526 21:45:51.876 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9527 21:45:51.876 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9528 21:45:51.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9529 21:45:51.876 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9530 21:45:51.876 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9531 21:45:51.876 0.00113738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9532 21:45:51.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9533 21:45:51.876 0.00139180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9534 21:45:51.876 0.00013748 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9535 21:45:51.876 0.00115951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9536 21:45:51.876 0.00006874 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9537 21:45:51.876 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9538 21:45:51.876 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9539 21:45:51.876 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9540 21:45:51.891 0.00104968 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9541 21:45:51.891 0.00042311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9542 21:45:51.891 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9543 21:45:51.891 0.00121442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9544 21:45:51.891 0.00009363 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9545 21:45:51.891 0.00120020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9546 21:45:51.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9547 21:45:51.891 0.00141432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9548 21:45:51.891 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9549 21:45:51.891 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9550 21:45:51.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9551 21:45:51.891 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9552 21:45:51.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9553 21:45:51.891 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9554 21:45:51.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9555 21:45:51.891 0.00122983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9556 21:45:51.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9557 21:45:51.891 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9558 21:45:51.891 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 9559 21:45:51.891 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 9560 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 15 9561 21:45:51.891 0.00004780 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 9562 21:45:51.891 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 9563 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9564 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9565 21:45:51.891 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9566 21:45:51.891 0.00002212 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9567 21:45:51.891 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9568 21:45:51.891 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9569 21:45:51.891 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9570 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9571 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9572 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9573 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9574 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9575 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9576 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9577 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9578 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9579 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9580 21:45:51.891 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9581 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9582 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9583 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9584 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9585 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9586 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9587 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9588 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9589 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9590 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9591 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9592 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9593 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9594 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9595 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9596 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9597 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9598 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9599 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9600 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9601 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9602 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9603 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9604 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9605 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9606 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9607 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9608 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9609 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9610 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9611 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9612 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9613 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9614 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9615 21:45:51.891 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9616 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9617 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9618 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9619 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9620 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9621 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9622 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9623 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9624 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9625 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9626 21:45:51.891 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9627 21:45:51.891 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 9628 21:45:51.891 0.00023506 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 9629 21:45:51.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9630 21:45:51.891 0.00194884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9631 21:45:51.891 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9632 21:45:51.891 0.00220168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9633 21:45:51.906 0.00016356 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 9634 21:45:51.906 0.00015131 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 05 9635 21:45:51.906 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9636 21:45:51.906 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9637 21:45:51.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9638 21:45:51.906 0.00013630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9639 21:45:51.906 0.00010351 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 9640 21:45:51.906 0.00011615 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 9641 21:45:51.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9642 21:45:51.906 0.00006084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9643 21:45:51.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9644 21:45:51.906 0.00748326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9645 21:45:51.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9646 21:45:51.906 0.00095921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9647 21:45:51.906 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9648 21:45:51.906 0.00107338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9649 21:45:51.906 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9650 21:45:51.906 0.00100188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9651 21:45:51.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9652 21:45:51.906 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9653 21:45:51.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9654 21:45:51.906 0.00138153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9655 21:45:51.922 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9656 21:45:51.922 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9657 21:45:51.922 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9658 21:45:51.922 0.00143249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9659 21:45:51.922 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9660 21:45:51.922 0.00101847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9661 21:45:51.922 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9662 21:45:51.922 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9663 21:45:51.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9664 21:45:51.922 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9665 21:45:51.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9666 21:45:51.922 0.00127447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9667 21:45:51.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9668 21:45:51.922 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9669 21:45:51.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9670 21:45:51.922 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9671 21:45:51.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9672 21:45:51.922 0.00134558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9673 21:45:51.922 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9674 21:45:51.922 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9675 21:45:51.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9676 21:45:51.922 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9677 21:45:51.937 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9678 21:45:51.937 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9679 21:45:51.937 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9680 21:45:51.937 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9681 21:45:51.937 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9682 21:45:51.937 0.00150874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9683 21:45:51.937 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9684 21:45:51.937 0.00100899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9685 21:45:51.937 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9686 21:45:51.937 0.00132978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9687 21:45:51.937 0.00006084 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9688 21:45:51.937 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9689 21:45:51.937 0.00006914 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9690 21:45:51.937 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9691 21:45:51.937 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9692 21:45:51.937 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9693 21:45:51.937 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9694 21:45:51.937 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9695 21:45:51.937 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9696 21:45:51.937 0.00149136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9697 21:45:51.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9698 21:45:51.953 0.00120454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9699 21:45:51.953 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9700 21:45:51.953 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9701 21:45:51.953 0.00002607 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9702 21:45:51.953 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9703 21:45:51.953 0.00015763 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9704 21:45:51.953 0.00121284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9705 21:45:51.953 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9706 21:45:51.953 0.00120296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9707 21:45:51.953 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9708 21:45:51.953 0.00115832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9709 21:45:51.953 0.00010469 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9711 21:45:51.953 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9712 21:45:51.953 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9713 21:45:51.953 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9714 21:45:51.953 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9715 21:45:51.953 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9716 21:45:51.953 0.00135862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9717 21:45:51.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9718 21:45:51.953 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9719 21:45:51.969 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9720 21:45:51.969 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9721 21:45:51.969 0.00018212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9722 21:45:51.969 0.00112119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9723 21:45:51.969 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9724 21:45:51.969 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9725 21:45:51.969 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9726 21:45:51.969 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9727 21:45:51.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9728 21:45:51.969 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9729 21:45:51.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9730 21:45:51.969 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9731 21:45:51.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9732 21:45:51.969 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9733 21:45:51.969 0.00012089 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9734 21:45:51.969 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9735 21:45:51.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9736 21:45:51.969 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9737 21:45:51.969 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9739 21:45:51.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9740 21:45:51.969 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9741 21:45:51.984 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9742 21:45:51.984 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9743 21:45:51.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9744 21:45:51.984 0.00119190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9745 21:45:51.984 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9746 21:45:51.984 0.00128909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9747 21:45:51.984 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9748 21:45:51.984 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9749 21:45:51.984 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9750 21:45:51.984 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9751 21:45:51.984 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9752 21:45:51.984 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9753 21:45:51.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9754 21:45:51.984 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9755 21:45:51.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9756 21:45:51.984 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9757 21:45:51.984 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9758 21:45:51.984 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9759 21:45:51.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9760 21:45:51.984 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9761 21:45:51.984 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9762 21:45:51.984 0.00138272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9763 21:45:52.000 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9764 21:45:52.000 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9765 21:45:52.000 0.00011891 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9766 21:45:52.000 0.00111803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9767 21:45:52.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9768 21:45:52.000 0.00138035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9769 21:45:52.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9770 21:45:52.000 0.00117728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9771 21:45:52.000 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9772 21:45:52.000 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9773 21:45:52.000 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9774 21:45:52.000 0.00143091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9775 21:45:52.000 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9776 21:45:52.000 0.00095803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9777 21:45:52.000 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9778 21:45:52.000 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9779 21:45:52.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9780 21:45:52.000 0.00104889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9781 21:45:52.000 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 9782 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 9783 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 9784 21:45:52.000 0.00004504 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 9785 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 9786 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9787 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9788 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9789 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9790 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9791 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9792 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9793 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9794 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9795 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9796 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9797 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9798 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9799 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9800 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9801 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9802 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9803 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9804 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9805 21:45:52.000 0.00000000 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9806 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9807 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9808 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9809 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9810 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9811 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9812 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9813 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9814 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9815 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9816 21:45:52.000 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9817 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9818 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9819 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9820 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9821 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9822 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9823 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9824 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9825 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9826 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9827 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9828 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9829 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9830 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9831 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9832 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9833 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9834 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9835 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9836 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9837 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9838 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9839 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9840 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9841 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9842 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9843 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9844 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9845 21:45:52.000 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9846 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9847 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9848 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9849 21:45:52.000 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 9850 21:45:52.000 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 9851 21:45:52.000 0.00017936 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 9852 21:45:52.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9853 21:45:52.000 0.00188247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9854 21:45:52.016 0.00020267 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 9855 21:45:52.016 0.00013630 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 15 9856 21:45:52.016 0.00009798 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9857 21:45:52.016 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9858 21:45:52.016 0.00017343 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 9859 21:45:52.016 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9860 21:45:52.016 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9861 21:45:52.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9862 21:45:52.016 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9863 21:45:52.016 0.00013590 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 9864 21:45:52.016 0.00094143 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9865 21:45:52.016 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9866 21:45:52.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9867 21:45:52.016 0.00508761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9868 21:45:52.016 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9869 21:45:52.016 0.00077116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9870 21:45:52.016 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9871 21:45:52.016 0.00111961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9872 21:45:52.016 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9873 21:45:52.016 0.00080830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9874 21:45:52.016 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9875 21:45:52.016 0.00112277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9876 21:45:52.016 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9877 21:45:52.016 0.00125630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9880 21:45:52.016 0.00011694 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9881 21:45:52.016 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9882 21:45:52.031 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9883 21:45:52.031 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9884 21:45:52.031 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9885 21:45:52.031 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9886 21:45:52.031 0.00007546 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9887 21:45:52.031 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9888 21:45:52.031 0.00010193 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9889 21:45:52.031 0.00124958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9890 21:45:52.031 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9891 21:45:52.031 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9892 21:45:52.031 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9893 21:45:52.031 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9894 21:45:52.031 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9895 21:45:52.031 0.00117847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9896 21:45:52.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9897 21:45:52.031 0.00157393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9898 21:45:52.031 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9899 21:45:52.031 0.00112079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9900 21:45:52.031 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9901 21:45:52.031 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9902 21:45:52.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9903 21:45:52.031 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9904 21:45:52.047 0.00013432 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9905 21:45:52.047 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9906 21:45:52.047 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9907 21:45:52.047 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9908 21:45:52.047 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9909 21:45:52.047 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9910 21:45:52.047 0.00009126 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9911 21:45:52.047 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9912 21:45:52.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9913 21:45:52.047 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9914 21:45:52.047 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9915 21:45:52.047 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9917 21:45:52.047 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9918 21:45:52.047 0.00006479 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9919 21:45:52.047 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9920 21:45:52.047 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9921 21:45:52.047 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9922 21:45:52.047 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9923 21:45:52.047 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9924 21:45:52.047 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9925 21:45:52.047 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9926 21:45:52.063 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9927 21:45:52.063 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9928 21:45:52.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9929 21:45:52.063 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9930 21:45:52.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9931 21:45:52.063 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9932 21:45:52.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9933 21:45:52.063 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9934 21:45:52.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9935 21:45:52.063 0.00150440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9936 21:45:52.063 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9937 21:45:52.063 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9938 21:45:52.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9939 21:45:52.063 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9940 21:45:52.063 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9941 21:45:52.063 0.00150045 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9942 21:45:52.063 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9943 21:45:52.063 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9944 21:45:52.063 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9946 21:45:52.063 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9947 21:45:52.063 0.00141551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9948 21:45:52.079 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9949 21:45:52.079 0.00122509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9950 21:45:52.079 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9951 21:45:52.079 0.00118953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9952 21:45:52.079 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9953 21:45:52.079 0.00122864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9954 21:45:52.079 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9955 21:45:52.079 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9956 21:45:52.079 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9957 21:45:52.079 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9958 21:45:52.079 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9959 21:45:52.079 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9960 21:45:52.079 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9961 21:45:52.079 0.00135664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9962 21:45:52.079 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9963 21:45:52.079 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9964 21:45:52.079 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9965 21:45:52.079 0.00147042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9966 21:45:52.079 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9967 21:45:52.079 0.00091417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9968 21:45:52.094 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9969 21:45:52.094 0.00114489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9970 21:45:52.094 0.00007506 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9971 21:45:52.094 0.00129778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9972 21:45:52.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9973 21:45:52.094 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9974 21:45:52.094 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9975 21:45:52.094 0.00144751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9976 21:45:52.094 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9977 21:45:52.094 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9978 21:45:52.094 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9979 21:45:52.094 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9980 21:45:52.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9981 21:45:52.094 0.00139101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9982 21:45:52.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9983 21:45:52.094 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9984 21:45:52.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9985 21:45:52.094 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9986 21:45:52.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9987 21:45:52.094 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9988 21:45:52.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9989 21:45:52.094 0.00116306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9990 21:45:52.110 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9991 21:45:52.110 0.00125077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9992 21:45:52.110 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9993 21:45:52.110 0.00149926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9994 21:45:52.110 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9995 21:45:52.110 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9996 21:45:52.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9997 21:45:52.110 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 9998 21:45:52.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 9999 21:45:52.110 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10000 21:45:52.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10001 21:45:52.110 0.00120217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10003 21:45:52.110 0.00158143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10004 21:45:52.110 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 10005 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 10006 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 15 10007 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 10008 21:45:52.110 0.00008020 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 10009 21:45:52.110 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10010 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10011 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10012 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10013 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10014 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10015 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10016 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10017 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10018 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10019 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10020 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10021 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10022 21:45:52.110 0.00007585 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10023 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10024 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10025 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10026 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10027 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10028 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10029 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10030 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10031 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10032 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10033 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10034 21:45:52.110 0.00009679 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10035 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10036 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10037 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10038 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10039 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10040 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10041 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10042 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10043 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10044 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10045 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10046 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10047 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10048 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10049 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10050 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10051 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10052 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10053 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10054 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10055 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10056 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10057 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10058 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10059 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10060 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10061 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10062 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10063 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10064 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10065 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10066 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10067 21:45:52.110 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10068 21:45:52.110 0.00004425 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10069 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10070 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10071 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10072 21:45:52.110 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10073 21:45:52.110 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 10074 21:45:52.110 0.00019279 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 10075 21:45:52.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10076 21:45:52.110 0.00195832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10077 21:45:52.110 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10078 21:45:52.110 0.00334578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10079 21:45:52.126 0.00041363 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 10080 21:45:52.126 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10081 21:45:52.126 0.00023348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10082 21:45:52.126 0.00017383 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 05 10083 21:45:52.126 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10084 21:45:52.126 0.00034410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10085 21:45:52.126 0.00031091 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 10086 21:45:52.126 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10087 21:45:52.126 0.00028444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10088 21:45:52.126 0.00025442 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 10089 21:45:52.126 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10090 21:45:52.126 0.00479408 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10091 21:45:52.126 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10092 21:45:52.126 0.00094578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10093 21:45:52.126 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10094 21:45:52.126 0.00099556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10095 21:45:52.126 0.00007506 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10096 21:45:52.126 0.00094894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10097 21:45:52.126 0.00012879 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10098 21:45:52.126 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10099 21:45:52.126 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10101 21:45:52.126 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10102 21:45:52.126 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10103 21:45:52.126 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10104 21:45:52.126 0.00144830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10105 21:45:52.141 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10106 21:45:52.141 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10107 21:45:52.141 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10108 21:45:52.141 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10109 21:45:52.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10110 21:45:52.141 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10111 21:45:52.141 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10112 21:45:52.141 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10113 21:45:52.141 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10114 21:45:52.141 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10115 21:45:52.141 0.00011220 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10116 21:45:52.141 0.00115082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10117 21:45:52.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10118 21:45:52.141 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10119 21:45:52.141 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10120 21:45:52.141 0.00143407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10121 21:45:52.141 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10122 21:45:52.141 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10123 21:45:52.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10124 21:45:52.141 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10125 21:45:52.157 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10126 21:45:52.157 0.00154825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10127 21:45:52.157 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10128 21:45:52.157 0.00091931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10129 21:45:52.157 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10130 21:45:52.157 0.00142064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10131 21:45:52.157 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10132 21:45:52.157 0.00109946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10133 21:45:52.157 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10134 21:45:52.157 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10135 21:45:52.157 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10136 21:45:52.157 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10137 21:45:52.157 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10138 21:45:52.157 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10139 21:45:52.157 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10140 21:45:52.157 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10141 21:45:52.157 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10142 21:45:52.157 0.00164543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10143 21:45:52.157 0.00011259 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10144 21:45:52.157 0.00098212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10145 21:45:52.157 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10146 21:45:52.157 0.00116899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10147 21:45:52.173 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10148 21:45:52.173 0.00143328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10149 21:45:52.173 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10150 21:45:52.173 0.00149452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10151 21:45:52.173 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10152 21:45:52.173 0.00104296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10153 21:45:52.173 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10154 21:45:52.173 0.00101610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10155 21:45:52.173 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10156 21:45:52.173 0.00124682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10157 21:45:52.173 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10158 21:45:52.173 0.00122469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10159 21:45:52.173 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10160 21:45:52.173 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10161 21:45:52.173 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10162 21:45:52.173 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10163 21:45:52.173 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10164 21:45:52.173 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10165 21:45:52.173 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10166 21:45:52.173 0.00141195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10167 21:45:52.173 0.00044761 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10168 21:45:52.173 0.00087072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10169 21:45:52.188 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10170 21:45:52.188 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10171 21:45:52.188 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10172 21:45:52.188 0.00140168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10173 21:45:52.188 0.00010706 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10174 21:45:52.188 0.00149452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10175 21:45:52.188 0.00008178 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10176 21:45:52.188 0.00094696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10177 21:45:52.188 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10178 21:45:52.188 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10179 21:45:52.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10180 21:45:52.188 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10181 21:45:52.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10182 21:45:52.188 0.00126499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10183 21:45:52.188 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10184 21:45:52.188 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10185 21:45:52.188 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10186 21:45:52.188 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10187 21:45:52.188 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10188 21:45:52.188 0.00125314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10189 21:45:52.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10190 21:45:52.203 0.00139457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10191 21:45:52.203 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10192 21:45:52.203 0.00136810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10193 21:45:52.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10194 21:45:52.203 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10195 21:45:52.203 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10196 21:45:52.203 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10197 21:45:52.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10198 21:45:52.203 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10199 21:45:52.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10200 21:45:52.203 0.00126222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10201 21:45:52.203 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10202 21:45:52.203 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10203 21:45:52.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10204 21:45:52.203 0.00125946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10205 21:45:52.203 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10206 21:45:52.203 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10207 21:45:52.203 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10208 21:45:52.203 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10209 21:45:52.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10210 21:45:52.203 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10211 21:45:52.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10212 21:45:52.219 0.00121561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10213 21:45:52.219 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10214 21:45:52.219 0.00109985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10215 21:45:52.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10216 21:45:52.219 0.00147595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10217 21:45:52.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10218 21:45:52.219 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10219 21:45:52.219 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10220 21:45:52.219 0.00119625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10221 21:45:52.219 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10222 21:45:52.219 0.00099951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10223 21:45:52.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10224 21:45:52.219 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10225 21:45:52.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10226 21:45:52.219 0.00207091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10227 21:45:52.219 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 10228 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 10229 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 10230 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 10231 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 10232 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10233 21:45:52.219 0.00008770 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10234 21:45:52.219 0.00008691 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10235 21:45:52.219 0.00007506 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10236 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10237 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10238 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10239 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10240 21:45:52.219 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10241 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10242 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10243 21:45:52.219 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10244 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10245 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10246 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10247 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10248 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10249 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10250 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10251 21:45:52.219 0.00008494 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10252 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10253 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10254 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10255 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10256 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10257 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10258 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10259 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10260 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10261 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10262 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10263 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10264 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10265 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10266 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10267 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10268 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10269 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10270 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10271 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10272 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10273 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10274 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10275 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10276 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10277 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10278 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10279 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10280 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10281 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10282 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10283 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10284 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10285 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10286 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10287 21:45:52.219 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10288 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10289 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10290 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10291 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10292 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10293 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10294 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10295 21:45:52.219 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10296 21:45:52.219 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 10297 21:45:52.219 0.00013985 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 10298 21:45:52.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10299 21:45:52.219 0.00202193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10300 21:45:52.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10301 21:45:52.219 0.00096079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10302 21:45:52.234 0.00015407 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 10303 21:45:52.234 0.00011536 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 15 10304 21:45:52.234 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10305 21:45:52.234 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10306 21:45:52.234 0.00017778 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 10307 21:45:52.234 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10308 21:45:52.234 0.00015763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10309 21:45:52.234 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10310 21:45:52.234 0.00030775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10311 21:45:52.234 0.00027101 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 10312 21:45:52.234 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10314 21:45:52.234 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10315 21:45:52.234 0.00106469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10316 21:45:52.234 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10317 21:45:52.234 0.00098528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10318 21:45:52.234 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10319 21:45:52.234 0.00108998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10320 21:45:52.234 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10321 21:45:52.234 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10322 21:45:52.234 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10323 21:45:52.234 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10324 21:45:52.234 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10325 21:45:52.234 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10326 21:45:52.234 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10327 21:45:52.234 0.00141867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10328 21:45:52.250 0.00083082 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10329 21:45:52.250 0.00059773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10330 21:45:52.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10331 21:45:52.250 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10332 21:45:52.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10333 21:45:52.250 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10334 21:45:52.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10335 21:45:52.250 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10336 21:45:52.250 0.00008138 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10337 21:45:52.250 0.00117689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10338 21:45:52.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10339 21:45:52.250 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10340 21:45:52.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10341 21:45:52.250 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10342 21:45:52.250 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10343 21:45:52.250 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10344 21:45:52.250 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10345 21:45:52.250 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10346 21:45:52.250 0.00009126 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10347 21:45:52.250 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10348 21:45:52.266 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10349 21:45:52.266 0.00114331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10350 21:45:52.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10351 21:45:52.266 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10352 21:45:52.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10353 21:45:52.266 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10354 21:45:52.266 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10355 21:45:52.266 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10356 21:45:52.266 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10357 21:45:52.266 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10358 21:45:52.266 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10359 21:45:52.266 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10360 21:45:52.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10361 21:45:52.266 0.00152415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10362 21:45:52.266 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10363 21:45:52.266 0.00098844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10364 21:45:52.266 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10365 21:45:52.266 0.00118874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10366 21:45:52.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10367 21:45:52.266 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10369 21:45:52.266 0.00125393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10370 21:45:52.281 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10371 21:45:52.281 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10372 21:45:52.281 0.00020148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10373 21:45:52.281 0.00106588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10374 21:45:52.281 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10375 21:45:52.281 0.00123141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10376 21:45:52.281 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10377 21:45:52.281 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10378 21:45:52.281 0.00016711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10379 21:45:52.281 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10380 21:45:52.281 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10381 21:45:52.281 0.00116425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10382 21:45:52.281 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10383 21:45:52.281 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10384 21:45:52.281 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10385 21:45:52.281 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10386 21:45:52.281 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10387 21:45:52.281 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10388 21:45:52.281 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10389 21:45:52.281 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10390 21:45:52.281 0.00009442 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10391 21:45:52.281 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10392 21:45:52.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10393 21:45:52.297 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10394 21:45:52.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10395 21:45:52.297 0.00136968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10396 21:45:52.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10397 21:45:52.297 0.00133965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10398 21:45:52.297 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10399 21:45:52.297 0.00143091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10400 21:45:52.297 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10401 21:45:52.297 0.00116425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10403 21:45:52.297 0.00109630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10404 21:45:52.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10405 21:45:52.297 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10406 21:45:52.297 0.00012563 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10407 21:45:52.297 0.00120059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10408 21:45:52.297 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10409 21:45:52.297 0.00107299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10410 21:45:52.297 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10411 21:45:52.297 0.00117096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10412 21:45:52.297 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10413 21:45:52.297 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10414 21:45:52.313 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10415 21:45:52.313 0.00132188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10416 21:45:52.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10417 21:45:52.313 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10418 21:45:52.313 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10419 21:45:52.313 0.00148978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10420 21:45:52.313 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10421 21:45:52.313 0.00117412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10422 21:45:52.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10423 21:45:52.313 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10424 21:45:52.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10425 21:45:52.313 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10426 21:45:52.313 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10427 21:45:52.313 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10428 21:45:52.313 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10429 21:45:52.313 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10430 21:45:52.313 0.00018844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10431 21:45:52.313 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10432 21:45:52.313 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10433 21:45:52.313 0.00107615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10434 21:45:52.313 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10435 21:45:52.313 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10436 21:45:52.328 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10437 21:45:52.328 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10438 21:45:52.328 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10439 21:45:52.328 0.00118400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10440 21:45:52.328 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10441 21:45:52.328 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10442 21:45:52.328 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10443 21:45:52.328 0.00138153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10444 21:45:52.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10445 21:45:52.328 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10446 21:45:52.328 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10447 21:45:52.328 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10448 21:45:52.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10449 21:45:52.328 0.00110617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10450 21:45:52.328 0.00001383 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 10451 21:45:52.328 0.00002449 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 10452 21:45:52.328 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 15 10453 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 10454 21:45:52.328 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 10455 21:45:52.328 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10456 21:45:52.328 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10457 21:45:52.328 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10458 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10459 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10460 21:45:52.328 0.00003753 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10461 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10462 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10463 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10464 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10465 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10466 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10467 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10468 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10469 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10470 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10471 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10472 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10473 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10474 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10475 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10476 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10477 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10478 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10479 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10480 21:45:52.328 0.00004030 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10481 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10482 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10483 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10484 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10485 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10486 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10487 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10488 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10489 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10490 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10491 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10492 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10493 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10494 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10495 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10496 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10497 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10498 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10499 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10500 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10501 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10502 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10503 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10504 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10505 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10506 21:45:52.328 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10507 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10508 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10509 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10510 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10511 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10512 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10513 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10514 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10515 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10516 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10517 21:45:52.328 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10518 21:45:52.328 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10519 21:45:52.328 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 10520 21:45:52.328 0.00017659 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 10521 21:45:52.328 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10522 21:45:52.328 0.00192711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10523 21:45:52.328 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10524 21:45:52.328 0.00330351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10525 21:45:52.344 0.00032316 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 10526 21:45:52.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10527 21:45:52.344 0.00026035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10528 21:45:52.344 0.00022953 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 05 10529 21:45:52.344 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10530 21:45:52.344 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10531 21:45:52.344 0.00026548 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 10532 21:45:52.344 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10533 21:45:52.344 0.00025165 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 10534 21:45:52.344 0.00030854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10535 21:45:52.344 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10536 21:45:52.344 0.00493195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10537 21:45:52.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10538 21:45:52.344 0.00118203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10539 21:45:52.344 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10540 21:45:52.344 0.00098370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10541 21:45:52.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10542 21:45:52.344 0.00105482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10543 21:45:52.344 0.00009798 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10544 21:45:52.344 0.00127526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10545 21:45:52.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10546 21:45:52.344 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10547 21:45:52.344 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10548 21:45:52.344 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10549 21:45:52.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10550 21:45:52.344 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10551 21:45:52.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10552 21:45:52.360 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10553 21:45:52.360 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10554 21:45:52.360 0.00143289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10555 21:45:52.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10556 21:45:52.360 0.00133965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10557 21:45:52.360 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10558 21:45:52.360 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10559 21:45:52.360 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10560 21:45:52.360 0.00124919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10561 21:45:52.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10562 21:45:52.360 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10563 21:45:52.360 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10564 21:45:52.360 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10565 21:45:52.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10566 21:45:52.360 0.00144079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10567 21:45:52.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10568 21:45:52.360 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10569 21:45:52.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10570 21:45:52.360 0.00154351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10571 21:45:52.375 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10572 21:45:52.375 0.00106153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10573 21:45:52.375 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10574 21:45:52.375 0.00123733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10575 21:45:52.375 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10576 21:45:52.375 0.00115635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10577 21:45:52.375 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10578 21:45:52.375 0.00124958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10579 21:45:52.375 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10580 21:45:52.375 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10581 21:45:52.375 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10582 21:45:52.375 0.00120217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10583 21:45:52.375 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10584 21:45:52.375 0.00116464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10585 21:45:52.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10586 21:45:52.375 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10587 21:45:52.375 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10588 21:45:52.375 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10589 21:45:52.375 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10590 21:45:52.375 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10591 21:45:52.375 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10592 21:45:52.375 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10593 21:45:52.391 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10594 21:45:52.391 0.00140682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10595 21:45:52.391 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10596 21:45:52.391 0.00102558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10597 21:45:52.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10598 21:45:52.391 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10599 21:45:52.391 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10600 21:45:52.391 0.00122825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10601 21:45:52.391 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10602 21:45:52.391 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10603 21:45:52.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10604 21:45:52.391 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10605 21:45:52.391 0.00006163 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10606 21:45:52.391 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10607 21:45:52.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10608 21:45:52.391 0.00138746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10609 21:45:52.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10610 21:45:52.391 0.00126538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10611 21:45:52.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10612 21:45:52.391 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10613 21:45:52.391 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10614 21:45:52.391 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10615 21:45:52.407 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10616 21:45:52.407 0.00123417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10617 21:45:52.407 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10618 21:45:52.407 0.00149689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10619 21:45:52.407 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10620 21:45:52.407 0.00108168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10621 21:45:52.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10622 21:45:52.407 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10623 21:45:52.407 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10624 21:45:52.407 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10625 21:45:52.407 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10626 21:45:52.407 0.00116346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10627 21:45:52.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10628 21:45:52.407 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10629 21:45:52.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10630 21:45:52.407 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10631 21:45:52.407 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10632 21:45:52.407 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10633 21:45:52.407 0.00014341 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10634 21:45:52.407 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10635 21:45:52.422 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10636 21:45:52.422 0.00102637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10637 21:45:52.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10638 21:45:52.422 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10639 21:45:52.422 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10640 21:45:52.422 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10641 21:45:52.422 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10642 21:45:52.422 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10643 21:45:52.422 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10644 21:45:52.422 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10645 21:45:52.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10646 21:45:52.422 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10647 21:45:52.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10648 21:45:52.422 0.00143763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10649 21:45:52.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10650 21:45:52.422 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10651 21:45:52.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10652 21:45:52.422 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10653 21:45:52.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10654 21:45:52.422 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10655 21:45:52.422 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10656 21:45:52.422 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10657 21:45:52.438 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10658 21:45:52.438 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10659 21:45:52.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10660 21:45:52.438 0.00122627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10661 21:45:52.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10662 21:45:52.438 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10663 21:45:52.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10664 21:45:52.438 0.00139062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10665 21:45:52.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10666 21:45:52.438 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10667 21:45:52.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10668 21:45:52.438 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10669 21:45:52.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10670 21:45:52.438 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10671 21:45:52.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10672 21:45:52.438 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10673 21:45:52.438 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 10674 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 10675 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 10676 21:45:52.438 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 10677 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 10678 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10679 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10680 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10681 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10682 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10683 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10684 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10685 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10686 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10687 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10688 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10689 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10690 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10691 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10692 21:45:52.438 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10693 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10694 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10695 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10696 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10697 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10698 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10699 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10700 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10701 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10702 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10703 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10704 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10705 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10706 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10707 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10708 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10709 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10710 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10711 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10712 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10713 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10714 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10715 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10716 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10717 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10718 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10719 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10720 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10721 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10722 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10723 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10724 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10725 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10726 21:45:52.438 0.00002923 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10727 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10728 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10729 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10730 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10731 21:45:52.438 0.00003951 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10732 21:45:52.438 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10733 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10734 21:45:52.438 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10735 21:45:52.438 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10736 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10737 21:45:52.438 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10738 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10739 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10740 21:45:52.438 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10741 21:45:52.438 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10742 21:45:52.438 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 10743 21:45:52.438 0.00019951 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 10744 21:45:52.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10745 21:45:52.438 0.00195003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10746 21:45:52.438 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10747 21:45:52.438 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 10748 21:45:52.453 0.00029511 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 10749 21:45:52.453 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10750 21:45:52.453 0.00020859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10751 21:45:52.453 0.00017383 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 15 10752 21:45:52.453 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10753 21:45:52.453 0.00025877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10755 21:45:52.453 0.00028128 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 10756 21:45:52.453 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10757 21:45:52.453 0.00023704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10758 21:45:52.453 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10759 21:45:52.453 0.00458074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10760 21:45:52.453 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10761 21:45:52.453 0.00082963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10762 21:45:52.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10763 21:45:52.453 0.00106904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10764 21:45:52.453 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10765 21:45:52.453 0.00093077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10766 21:45:52.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10767 21:45:52.453 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10768 21:45:52.453 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10769 21:45:52.453 0.00122864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10770 21:45:52.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10771 21:45:52.453 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10772 21:45:52.453 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10773 21:45:52.453 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10774 21:45:52.469 0.00007151 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10775 21:45:52.469 0.00131121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10776 21:45:52.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10777 21:45:52.469 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10778 21:45:52.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10779 21:45:52.469 0.00148188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10780 21:45:52.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10781 21:45:52.469 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10782 21:45:52.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10783 21:45:52.469 0.00122114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10784 21:45:52.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10785 21:45:52.469 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10786 21:45:52.469 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10787 21:45:52.469 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10788 21:45:52.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10789 21:45:52.469 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10790 21:45:52.469 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10791 21:45:52.469 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10792 21:45:52.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10793 21:45:52.469 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10794 21:45:52.484 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10795 21:45:52.484 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10796 21:45:52.484 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10797 21:45:52.484 0.00106983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10798 21:45:52.484 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10799 21:45:52.484 0.00145343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10800 21:45:52.484 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10801 21:45:52.484 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10802 21:45:52.484 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10803 21:45:52.484 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10804 21:45:52.484 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10805 21:45:52.484 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10806 21:45:52.484 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10807 21:45:52.484 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10808 21:45:52.484 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10809 21:45:52.484 0.00147753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10810 21:45:52.484 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10811 21:45:52.484 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10812 21:45:52.484 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10813 21:45:52.484 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10814 21:45:52.484 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10815 21:45:52.484 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10816 21:45:52.500 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10817 21:45:52.500 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10818 21:45:52.500 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10819 21:45:52.500 0.00131556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10820 21:45:52.500 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10821 21:45:52.500 0.00118795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10822 21:45:52.500 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10823 21:45:52.500 0.00121205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10824 21:45:52.500 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10825 21:45:52.500 0.00120731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10826 21:45:52.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10827 21:45:52.500 0.00148701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10828 21:45:52.500 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10829 21:45:52.500 0.00107338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10830 21:45:52.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10831 21:45:52.500 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10832 21:45:52.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10833 21:45:52.500 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10834 21:45:52.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10835 21:45:52.500 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10836 21:45:52.500 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10837 21:45:52.500 0.00139891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10838 21:45:52.516 0.00002607 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10839 21:45:52.516 0.00113185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10840 21:45:52.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10841 21:45:52.516 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10842 21:45:52.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10843 21:45:52.516 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10844 21:45:52.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10845 21:45:52.516 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10847 21:45:52.516 0.00118084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10848 21:45:52.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10849 21:45:52.516 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10850 21:45:52.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10851 21:45:52.516 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10852 21:45:52.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10853 21:45:52.516 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10854 21:45:52.516 0.00019279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10855 21:45:52.516 0.00109037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10856 21:45:52.516 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10857 21:45:52.516 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10858 21:45:52.516 0.00009007 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10859 21:45:52.516 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10860 21:45:52.532 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10861 21:45:52.532 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10862 21:45:52.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10863 21:45:52.532 0.00141788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10864 21:45:52.532 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10865 21:45:52.532 0.00125314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10866 21:45:52.532 0.00007111 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10867 21:45:52.532 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10868 21:45:52.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10869 21:45:52.532 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10870 21:45:52.532 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10871 21:45:52.532 0.00125511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10872 21:45:52.532 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10873 21:45:52.532 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10874 21:45:52.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10875 21:45:52.532 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10876 21:45:52.532 0.00002607 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10877 21:45:52.532 0.00124840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10878 21:45:52.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10879 21:45:52.532 0.00146686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10880 21:45:52.532 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10881 21:45:52.532 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10882 21:45:52.547 0.00006637 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10883 21:45:52.547 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10884 21:45:52.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10885 21:45:52.547 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10886 21:45:52.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10887 21:45:52.547 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10888 21:45:52.547 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10889 21:45:52.547 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10890 21:45:52.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10891 21:45:52.547 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10892 21:45:52.547 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10893 21:45:52.547 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10894 21:45:52.547 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10895 21:45:52.547 0.00244583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10896 21:45:52.547 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 10897 21:45:52.547 0.00005926 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 10898 21:45:52.547 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 15 10899 21:45:52.547 0.00003358 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 10900 21:45:52.547 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 10901 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10902 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10903 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10904 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10905 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10906 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10907 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10908 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10909 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10910 21:45:52.547 0.00002489 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10911 21:45:52.547 0.00005333 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10912 21:45:52.547 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10913 21:45:52.547 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10914 21:45:52.547 0.00006993 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10915 21:45:52.547 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10916 21:45:52.547 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10917 21:45:52.547 0.00002686 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10918 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10919 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10920 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10921 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10922 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10923 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10924 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10925 21:45:52.547 0.00005175 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10926 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10927 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10928 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10929 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10930 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10931 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10932 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10933 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10934 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10935 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10936 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10937 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10938 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10939 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10940 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10941 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10942 21:45:52.547 0.00004188 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10943 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10944 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10945 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10946 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10947 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10948 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10949 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10950 21:45:52.547 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10951 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10952 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10953 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10954 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10955 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10956 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10957 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10958 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10959 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10960 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10961 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10962 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10963 21:45:52.547 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10964 21:45:52.547 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 10965 21:45:52.547 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 10966 21:45:52.547 0.00045788 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 10967 21:45:52.547 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10968 21:45:52.547 0.00196978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10969 21:45:52.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10970 21:45:52.547 0.00186548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10971 21:45:52.563 0.00024494 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 10972 21:45:52.563 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10973 21:45:52.563 0.00024928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10974 21:45:52.563 0.00023664 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 10975 21:45:52.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10976 21:45:52.563 0.00033146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10977 21:45:52.563 0.00030301 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 10978 21:45:52.563 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10979 21:45:52.563 0.00027536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10980 21:45:52.563 0.00016593 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 10981 21:45:52.563 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10982 21:45:52.563 0.00517373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10983 21:45:52.563 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10984 21:45:52.563 0.00106706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10985 21:45:52.563 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10986 21:45:52.563 0.00094775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10987 21:45:52.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10988 21:45:52.563 0.00094459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10989 21:45:52.563 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10990 21:45:52.563 0.00122390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10991 21:45:52.563 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10992 21:45:52.563 0.00139141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10993 21:45:52.563 0.00012919 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10994 21:45:52.563 0.00104257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10995 21:45:52.563 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10996 21:45:52.563 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10997 21:45:52.579 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 10998 21:45:52.579 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 10999 21:45:52.579 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11000 21:45:52.579 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11001 21:45:52.579 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11002 21:45:52.579 0.00124761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11003 21:45:52.579 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11004 21:45:52.579 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11005 21:45:52.579 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11006 21:45:52.579 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11007 21:45:52.579 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11008 21:45:52.579 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11009 21:45:52.579 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11010 21:45:52.579 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11011 21:45:52.579 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11012 21:45:52.579 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11013 21:45:52.579 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11014 21:45:52.579 0.00126222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11015 21:45:52.579 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11016 21:45:52.579 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11017 21:45:52.594 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11018 21:45:52.594 0.00066963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11019 21:45:52.594 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11020 21:45:52.594 0.00115674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11021 21:45:52.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11022 21:45:52.594 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11023 21:45:52.594 0.00009007 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11024 21:45:52.594 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11025 21:45:52.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11026 21:45:52.594 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11027 21:45:52.594 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11028 21:45:52.594 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11029 21:45:52.594 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11030 21:45:52.594 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11031 21:45:52.594 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11032 21:45:52.594 0.00116385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11033 21:45:52.594 0.00011220 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11034 21:45:52.594 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11035 21:45:52.594 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11036 21:45:52.594 0.00153798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11037 21:45:52.594 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11038 21:45:52.594 0.00100069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11039 21:45:52.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11040 21:45:52.610 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11041 21:45:52.610 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11042 21:45:52.610 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11043 21:45:52.610 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11044 21:45:52.610 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11045 21:45:52.610 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11046 21:45:52.610 0.00139891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11047 21:45:52.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11048 21:45:52.610 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11049 21:45:52.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11050 21:45:52.610 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11051 21:45:52.610 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11052 21:45:52.610 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11053 21:45:52.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11054 21:45:52.610 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11055 21:45:52.610 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11056 21:45:52.610 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11057 21:45:52.610 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11058 21:45:52.610 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11059 21:45:52.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11060 21:45:52.610 0.00158854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11061 21:45:52.626 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11062 21:45:52.626 0.00094262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11063 21:45:52.626 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11064 21:45:52.626 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11065 21:45:52.626 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11066 21:45:52.626 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11067 21:45:52.626 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11068 21:45:52.626 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11069 21:45:52.626 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11070 21:45:52.626 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11071 21:45:52.626 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11072 21:45:52.626 0.00138746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11073 21:45:52.626 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11074 21:45:52.626 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11075 21:45:52.626 0.00010864 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11076 21:45:52.626 0.00121995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11077 21:45:52.626 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11078 21:45:52.626 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11079 21:45:52.626 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11080 21:45:52.626 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11081 21:45:52.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11082 21:45:52.641 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11083 21:45:52.641 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11084 21:45:52.641 0.00113264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11085 21:45:52.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11086 21:45:52.641 0.00141472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11087 21:45:52.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11088 21:45:52.641 0.00126894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11089 21:45:52.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11090 21:45:52.641 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11091 21:45:52.641 0.00011931 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11092 21:45:52.641 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11093 21:45:52.641 0.00006281 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11094 21:45:52.641 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11095 21:45:52.641 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11096 21:45:52.641 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11097 21:45:52.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11098 21:45:52.641 0.00124682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11099 21:45:52.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11100 21:45:52.641 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11101 21:45:52.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11102 21:45:52.641 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11103 21:45:52.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11104 21:45:52.656 0.00143012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11105 21:45:52.656 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11106 21:45:52.656 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11107 21:45:52.656 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11108 21:45:52.656 0.00112158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11109 21:45:52.656 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11110 21:45:52.656 0.00141590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11111 21:45:52.656 0.00011733 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11112 21:45:52.656 0.00114015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11113 21:45:52.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11114 21:45:52.656 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11115 21:45:52.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11116 21:45:52.656 0.00141314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11117 21:45:52.656 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11118 21:45:52.656 0.00093748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11119 21:45:52.656 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 11120 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 11121 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 11122 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11123 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 11124 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11125 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11126 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11127 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11128 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11129 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11130 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11131 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11132 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11133 21:45:52.656 0.00006005 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11134 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11135 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11136 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11137 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11138 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11139 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11140 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11141 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11142 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11143 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11144 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11145 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11146 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11147 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11148 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11149 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11150 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11151 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11152 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11153 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11154 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11155 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11156 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11157 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11158 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11159 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11160 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11161 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11162 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11163 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11164 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11165 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11166 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11167 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11168 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11169 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11170 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11171 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11172 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11173 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11174 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11175 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11176 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11177 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11178 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11179 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11180 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11181 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11182 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11183 21:45:52.656 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11184 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11185 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11186 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11187 21:45:52.656 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11188 21:45:52.656 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 11189 21:45:52.656 0.00014933 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 11190 21:45:52.656 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11191 21:45:52.656 0.00180227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11192 21:45:52.656 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11193 21:45:52.656 0.00311348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11194 21:45:52.672 0.00071980 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 11195 21:45:52.672 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11196 21:45:52.672 0.00285393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11197 21:45:52.672 0.00273580 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 16 11198 21:45:52.672 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11199 21:45:52.672 0.00043220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11200 21:45:52.672 0.00024770 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 11201 21:45:52.672 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11202 21:45:52.672 0.00037373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11203 21:45:52.672 0.00032316 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 11204 21:45:52.672 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11205 21:45:52.672 0.00447131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11206 21:45:52.672 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11207 21:45:52.672 0.00114133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11208 21:45:52.672 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11209 21:45:52.672 0.00084820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11210 21:45:52.672 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11211 21:45:52.672 0.00102400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11212 21:45:52.672 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11213 21:45:52.672 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11214 21:45:52.672 0.00007151 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11215 21:45:52.672 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11216 21:45:52.688 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11217 21:45:52.688 0.00107259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11218 21:45:52.688 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11219 21:45:52.688 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11220 21:45:52.688 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11221 21:45:52.688 0.00139970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11222 21:45:52.688 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11223 21:45:52.688 0.00114449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11224 21:45:52.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11225 21:45:52.688 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11226 21:45:52.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11227 21:45:52.688 0.00138035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11228 21:45:52.688 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11229 21:45:52.688 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11230 21:45:52.688 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11231 21:45:52.688 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11232 21:45:52.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11233 21:45:52.688 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11234 21:45:52.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11235 21:45:52.688 0.00143645 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11236 21:45:52.688 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11237 21:45:52.688 0.00121007 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11238 21:45:52.703 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11239 21:45:52.703 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11240 21:45:52.703 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11241 21:45:52.703 0.00142380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11242 21:45:52.703 0.00008770 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11243 21:45:52.703 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11244 21:45:52.703 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11245 21:45:52.703 0.00116978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11246 21:45:52.703 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11247 21:45:52.703 0.00107457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11248 21:45:52.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11249 21:45:52.703 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11250 21:45:52.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11251 21:45:52.703 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11252 21:45:52.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11253 21:45:52.703 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11254 21:45:52.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11255 21:45:52.703 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11256 21:45:52.703 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11257 21:45:52.703 0.00134519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11258 21:45:52.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11259 21:45:52.703 0.00136849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11260 21:45:52.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11261 21:45:52.719 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11262 21:45:52.719 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11263 21:45:52.719 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11264 21:45:52.719 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11265 21:45:52.719 0.00131793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11266 21:45:52.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11267 21:45:52.719 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11268 21:45:52.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11269 21:45:52.719 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11270 21:45:52.719 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11271 21:45:52.719 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11272 21:45:52.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11273 21:45:52.719 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11274 21:45:52.719 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11275 21:45:52.719 0.00147082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11276 21:45:52.719 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11277 21:45:52.719 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11278 21:45:52.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11279 21:45:52.719 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11280 21:45:52.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11281 21:45:52.719 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11282 21:45:52.735 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11283 21:45:52.735 0.00101886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11284 21:45:52.735 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11285 21:45:52.735 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11286 21:45:52.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11287 21:45:52.735 0.00136968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11288 21:45:52.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11289 21:45:52.735 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11290 21:45:52.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11291 21:45:52.735 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11292 21:45:52.735 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11293 21:45:52.735 0.00120533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11294 21:45:52.735 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11295 21:45:52.735 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11296 21:45:52.735 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11297 21:45:52.735 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11298 21:45:52.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11299 21:45:52.735 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11300 21:45:52.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11301 21:45:52.735 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11302 21:45:52.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11303 21:45:52.735 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11304 21:45:52.750 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11305 21:45:52.750 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11306 21:45:52.750 0.00005886 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11307 21:45:52.750 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11308 21:45:52.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11309 21:45:52.750 0.00127328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11310 21:45:52.750 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11311 21:45:52.750 0.00136573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11312 21:45:52.750 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11313 21:45:52.750 0.00153245 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11314 21:45:52.750 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11315 21:45:52.750 0.00093748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11316 21:45:52.750 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11317 21:45:52.750 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11318 21:45:52.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11319 21:45:52.750 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11320 21:45:52.750 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11321 21:45:52.750 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11322 21:45:52.750 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11323 21:45:52.750 0.00120296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11325 21:45:52.766 0.00118835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11326 21:45:52.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11327 21:45:52.766 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11328 21:45:52.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11329 21:45:52.766 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11330 21:45:52.766 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11331 21:45:52.766 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11332 21:45:52.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11333 21:45:52.766 0.00131793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11334 21:45:52.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11335 21:45:52.766 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11336 21:45:52.766 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11337 21:45:52.766 0.00150045 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11338 21:45:52.766 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11339 21:45:52.766 0.00119862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11340 21:45:52.766 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11341 21:45:52.766 0.00121284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11342 21:45:52.766 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 11343 21:45:52.766 0.00004267 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 11345 21:45:52.766 0.00002765 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11346 21:45:52.766 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 11347 21:45:52.766 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11348 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11349 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11350 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11351 21:45:52.766 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11352 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11353 21:45:52.766 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11354 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11355 21:45:52.766 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11356 21:45:52.766 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11357 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11358 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11359 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11360 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11361 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11362 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11363 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11364 21:45:52.766 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11365 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11366 21:45:52.766 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11367 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11368 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11369 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11370 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11371 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11372 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11373 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11374 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11375 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11376 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11377 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11378 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11379 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11380 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11381 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11382 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11383 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11384 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11385 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11386 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11387 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11388 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11389 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11390 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11391 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11392 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11393 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11394 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11395 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11396 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11397 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11398 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11399 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11400 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11401 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11402 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11403 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11404 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11405 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11406 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11407 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11408 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11409 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11410 21:45:52.766 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11411 21:45:52.766 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 11412 21:45:52.766 0.00021728 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 11413 21:45:52.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11414 21:45:52.766 0.00201995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11415 21:45:52.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11416 21:45:52.766 0.00073482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11417 21:45:52.781 0.00020425 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 11418 21:45:52.781 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11419 21:45:52.781 0.00037412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11420 21:45:52.781 0.00029590 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 11421 21:45:52.781 0.00016830 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 11422 21:45:52.781 0.00011891 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11423 21:45:52.781 0.00011496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11424 21:45:52.781 0.00019161 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 11425 21:45:52.781 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11426 21:45:52.781 0.00009916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11427 21:45:52.781 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11428 21:45:52.781 0.00601442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11429 21:45:52.781 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11430 21:45:52.781 0.00097580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11431 21:45:52.781 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11432 21:45:52.781 0.00087427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11433 21:45:52.781 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11434 21:45:52.781 0.00099832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11435 21:45:52.781 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11436 21:45:52.781 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11437 21:45:52.781 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11438 21:45:52.781 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11439 21:45:52.781 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11440 21:45:52.781 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11441 21:45:52.781 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11442 21:45:52.781 0.00142183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11443 21:45:52.797 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11444 21:45:52.797 0.00118124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11445 21:45:52.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11446 21:45:52.797 0.00125353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11447 21:45:52.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11448 21:45:52.797 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11449 21:45:52.797 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11450 21:45:52.797 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11451 21:45:52.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11452 21:45:52.797 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11453 21:45:52.797 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11454 21:45:52.797 0.00143921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11455 21:45:52.797 0.00009165 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11456 21:45:52.797 0.00141827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11457 21:45:52.797 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11458 21:45:52.797 0.00098291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11459 21:45:52.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11460 21:45:52.797 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11461 21:45:52.797 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11462 21:45:52.797 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11463 21:45:52.813 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11464 21:45:52.813 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11465 21:45:52.813 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11466 21:45:52.813 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11467 21:45:52.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11468 21:45:52.813 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11469 21:45:52.813 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11470 21:45:52.813 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11471 21:45:52.813 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11472 21:45:52.813 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11473 21:45:52.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11474 21:45:52.813 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11475 21:45:52.813 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11476 21:45:52.813 0.00146726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11477 21:45:52.813 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11478 21:45:52.813 0.00123338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11479 21:45:52.813 0.00003872 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11480 21:45:52.813 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11481 21:45:52.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11482 21:45:52.813 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11483 21:45:52.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11484 21:45:52.813 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11485 21:45:52.828 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11486 21:45:52.828 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11487 21:45:52.828 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11488 21:45:52.828 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11489 21:45:52.828 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11490 21:45:52.828 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11491 21:45:52.828 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11492 21:45:52.828 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11493 21:45:52.828 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11494 21:45:52.828 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11495 21:45:52.828 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11496 21:45:52.828 0.00139891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11497 21:45:52.828 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11498 21:45:52.828 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11499 21:45:52.828 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11500 21:45:52.828 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11501 21:45:52.828 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11502 21:45:52.828 0.00144435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11505 21:45:52.828 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11506 21:45:52.828 0.00123891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11507 21:45:52.844 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11508 21:45:52.844 0.00120059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11509 21:45:52.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11510 21:45:52.844 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11511 21:45:52.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11512 21:45:52.844 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11513 21:45:52.844 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11514 21:45:52.844 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11515 21:45:52.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11516 21:45:52.844 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11517 21:45:52.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11518 21:45:52.844 0.00139101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11519 21:45:52.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11520 21:45:52.844 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11521 21:45:52.844 0.00007704 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11522 21:45:52.844 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11523 21:45:52.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11524 21:45:52.844 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11525 21:45:52.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11526 21:45:52.844 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11527 21:45:52.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11528 21:45:52.844 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11529 21:45:52.860 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11530 21:45:52.860 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11531 21:45:52.860 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11532 21:45:52.860 0.00115358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11533 21:45:52.860 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11534 21:45:52.860 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11535 21:45:52.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11536 21:45:52.860 0.00137284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11537 21:45:52.860 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11538 21:45:52.860 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11539 21:45:52.860 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11540 21:45:52.860 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11541 21:45:52.860 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11542 21:45:52.860 0.00140207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11543 21:45:52.860 0.00010904 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11544 21:45:52.860 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11545 21:45:52.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11546 21:45:52.860 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11547 21:45:52.860 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11548 21:45:52.860 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11549 21:45:52.875 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11550 21:45:52.875 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11551 21:45:52.875 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11552 21:45:52.875 0.00096277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11553 21:45:52.875 0.00007269 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11554 21:45:52.875 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11555 21:45:52.875 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11556 21:45:52.875 0.00117096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11557 21:45:52.875 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11558 21:45:52.875 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11559 21:45:52.875 0.00012010 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11560 21:45:52.875 0.00115121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11561 21:45:52.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11562 21:45:52.875 0.00133965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11563 21:45:52.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11564 21:45:52.875 0.00097304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11565 21:45:52.875 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 11566 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 11567 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 11568 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 11569 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 11570 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 11571 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 87 11572 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 11573 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 11574 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 11575 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 87 11576 21:45:52.875 0.00007862 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 49 11577 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 11578 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11579 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11580 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 11581 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 11582 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11583 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11584 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 11585 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11586 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11587 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 11588 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 56 11589 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 11590 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11591 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 11592 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 11593 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 14 11594 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11595 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11596 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11597 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11598 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11599 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11600 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 11601 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11602 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11603 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11604 21:45:52.875 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 05 11605 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 11606 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11607 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11608 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 11609 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 11610 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11611 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11612 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11613 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11614 21:45:52.875 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11615 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11616 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 11617 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11618 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11619 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 11620 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 11621 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 11622 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11623 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 25 11624 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 19 11625 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 11626 21:45:52.875 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11627 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11628 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 11629 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 11630 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11631 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11632 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 11633 21:45:52.875 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11634 21:45:52.875 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 11635 21:45:52.875 0.00014143 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 11636 21:45:52.875 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11637 21:45:52.875 0.00199309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11638 21:45:52.875 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11639 21:45:52.875 0.00309412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11640 21:45:52.891 0.00034094 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 11641 21:45:52.891 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11642 21:45:52.891 0.00050449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11643 21:45:52.891 0.00037847 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 16 11644 21:45:52.891 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11645 21:45:52.891 0.00035556 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 11646 21:45:52.891 0.00041798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11647 21:45:52.891 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11648 21:45:52.891 0.00038835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11649 21:45:52.891 0.00026074 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 11650 21:45:52.891 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11651 21:45:52.891 0.00372069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11652 21:45:52.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11653 21:45:52.891 0.00105205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11654 21:45:52.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11655 21:45:52.891 0.00101412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11656 21:45:52.891 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11657 21:45:52.891 0.00097146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11658 21:45:52.891 0.00004859 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11659 21:45:52.891 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11660 21:45:52.891 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11661 21:45:52.891 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11662 21:45:52.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11663 21:45:52.891 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11664 21:45:52.891 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11665 21:45:52.891 0.00145027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11666 21:45:52.907 0.00007743 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11667 21:45:52.907 0.00145343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11668 21:45:52.907 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11669 21:45:52.907 0.00117610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11670 21:45:52.907 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11671 21:45:52.907 0.00101926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11672 21:45:52.907 0.00008375 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11673 21:45:52.907 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11674 21:45:52.907 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11675 21:45:52.907 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11676 21:45:52.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11677 21:45:52.907 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11678 21:45:52.907 0.00009165 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11679 21:45:52.907 0.00120533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11680 21:45:52.907 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11681 21:45:52.907 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11682 21:45:52.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11683 21:45:52.907 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11684 21:45:52.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11685 21:45:52.907 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11686 21:45:52.907 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11687 21:45:52.907 0.00139773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11688 21:45:52.922 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11689 21:45:52.922 0.00112909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11690 21:45:52.922 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11691 21:45:52.922 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11692 21:45:52.922 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11693 21:45:52.922 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11694 21:45:52.922 0.00013867 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11695 21:45:52.922 0.00102795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11696 21:45:52.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11697 21:45:52.922 0.00137126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11698 21:45:52.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11699 21:45:52.922 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11700 21:45:52.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11701 21:45:52.922 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11702 21:45:52.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11703 21:45:52.922 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11704 21:45:52.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11705 21:45:52.922 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11706 21:45:52.922 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11707 21:45:52.922 0.00108049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11708 21:45:52.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11709 21:45:52.938 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11710 21:45:52.938 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11712 21:45:52.938 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11713 21:45:52.938 0.00147161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11714 21:45:52.938 0.00007111 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11715 21:45:52.938 0.00103743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11716 21:45:52.938 0.00006440 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11717 21:45:52.938 0.00119704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11718 21:45:52.938 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11719 21:45:52.938 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11720 21:45:52.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11721 21:45:52.938 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11722 21:45:52.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11723 21:45:52.938 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11724 21:45:52.938 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11725 21:45:52.938 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11726 21:45:52.938 0.00007822 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11727 21:45:52.938 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11728 21:45:52.938 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11730 21:45:52.954 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11731 21:45:52.954 0.00143289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11732 21:45:52.954 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11733 21:45:52.954 0.00125195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11734 21:45:52.954 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11735 21:45:52.954 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11736 21:45:52.954 0.00010074 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11737 21:45:52.954 0.00110262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11738 21:45:52.954 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11739 21:45:52.954 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11740 21:45:52.954 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11741 21:45:52.954 0.00126104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11742 21:45:52.954 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11743 21:45:52.954 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11744 21:45:52.954 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11745 21:45:52.954 0.00145501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11746 21:45:52.954 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11747 21:45:52.954 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11748 21:45:52.954 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11749 21:45:52.954 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11750 21:45:52.954 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11751 21:45:52.954 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11752 21:45:52.969 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11753 21:45:52.969 0.00092326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11754 21:45:52.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11755 21:45:52.969 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11756 21:45:52.969 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11757 21:45:52.969 0.00119467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11758 21:45:52.969 0.00020780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11759 21:45:52.969 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11760 21:45:52.969 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11761 21:45:52.969 0.00105837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11762 21:45:52.969 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11763 21:45:52.969 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11764 21:45:52.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11765 21:45:52.969 0.00125748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11766 21:45:52.969 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11767 21:45:52.969 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11768 21:45:52.969 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11769 21:45:52.969 0.00123496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11770 21:45:52.969 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11771 21:45:52.969 0.00132188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11772 21:45:52.984 0.00012958 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11773 21:45:52.984 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11774 21:45:52.984 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11775 21:45:52.984 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11776 21:45:52.984 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11777 21:45:52.984 0.00114607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11778 21:45:52.984 0.00010193 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11779 21:45:52.984 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11780 21:45:52.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11781 21:45:52.984 0.00123496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11782 21:45:52.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11783 21:45:52.984 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11784 21:45:52.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11785 21:45:52.984 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11786 21:45:52.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11787 21:45:52.984 0.00178528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11788 21:45:52.984 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 11789 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 11790 21:45:52.984 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 16 11791 21:45:52.984 0.00006360 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 11792 21:45:52.984 0.00003832 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 11793 21:45:52.984 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 49 11794 21:45:52.984 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 11795 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 11796 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 11797 21:45:52.984 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 11798 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11799 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11800 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11801 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11802 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11803 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11804 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11805 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11806 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11807 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11808 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11809 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 11810 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 11811 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11812 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11813 21:45:52.984 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11814 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11815 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11816 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11817 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11818 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11819 21:45:52.984 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11820 21:45:52.984 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11821 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11822 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11823 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11824 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11825 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 11826 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 11827 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11828 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11829 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11830 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11831 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11832 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11833 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11834 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11835 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11836 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11837 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11838 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11839 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11840 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11841 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 11842 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 11843 21:45:52.984 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11844 21:45:52.984 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 11845 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 33 11846 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11847 21:45:52.984 0.00005728 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11848 21:45:52.984 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11849 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11850 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11851 21:45:52.984 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11852 21:45:52.984 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11853 21:45:52.984 0.00003200 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11854 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11855 21:45:52.984 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 11856 21:45:52.984 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 11857 21:45:52.984 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 11858 21:45:52.984 0.00020978 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 11859 21:45:52.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11860 21:45:52.984 0.00203812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11861 21:45:52.984 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11862 21:45:52.984 0.00160119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11863 21:45:53.000 0.00019516 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 11864 21:45:53.000 0.00022242 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 11865 21:45:53.000 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11866 21:45:53.000 0.00014143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11867 21:45:53.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11868 21:45:53.000 0.00021728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11869 21:45:53.000 0.00021689 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 11870 21:45:53.000 0.00015961 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 11871 21:45:53.000 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11872 21:45:53.000 0.00009363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11873 21:45:53.000 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11874 21:45:53.000 0.00687289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11875 21:45:53.000 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11876 21:45:53.000 0.00096672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11877 21:45:53.000 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11878 21:45:53.000 0.00064553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11879 21:45:53.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11880 21:45:53.000 0.00091259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11881 21:45:53.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11882 21:45:53.000 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11883 21:45:53.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11884 21:45:53.000 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11885 21:45:53.000 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11886 21:45:53.000 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11887 21:45:53.016 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11888 21:45:53.016 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11889 21:45:53.016 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11890 21:45:53.016 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11891 21:45:53.016 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11892 21:45:53.016 0.00119427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11893 21:45:53.016 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11894 21:45:53.016 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11895 21:45:53.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11896 21:45:53.016 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11897 21:45:53.016 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11898 21:45:53.016 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11899 21:45:53.016 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11900 21:45:53.016 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11901 21:45:53.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11902 21:45:53.016 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11903 21:45:53.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11904 21:45:53.016 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11905 21:45:53.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11906 21:45:53.016 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11907 21:45:53.016 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11908 21:45:53.016 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11909 21:45:53.031 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11910 21:45:53.031 0.00142775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11911 21:45:53.031 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11912 21:45:53.031 0.00122311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11913 21:45:53.031 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11914 21:45:53.031 0.00136849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11915 21:45:53.031 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11916 21:45:53.031 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11917 21:45:53.031 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11918 21:45:53.031 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11919 21:45:53.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11920 21:45:53.031 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11921 21:45:53.031 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11922 21:45:53.031 0.00125393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11923 21:45:53.031 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11924 21:45:53.031 0.00142222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11925 21:45:53.031 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11926 21:45:53.031 0.00112040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11927 21:45:53.031 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11928 21:45:53.031 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11929 21:45:53.031 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11930 21:45:53.031 0.00143210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11931 21:45:53.047 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11932 21:45:53.047 0.00131556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11933 21:45:53.047 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11934 21:45:53.047 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11935 21:45:53.047 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11936 21:45:53.047 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11937 21:45:53.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11938 21:45:53.047 0.00143645 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11939 21:45:53.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11940 21:45:53.047 0.00124207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11941 21:45:53.047 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11942 21:45:53.047 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11943 21:45:53.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11944 21:45:53.047 0.00146212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11945 21:45:53.047 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11946 21:45:53.047 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11947 21:45:53.047 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11948 21:45:53.047 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11949 21:45:53.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11950 21:45:53.047 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11951 21:45:53.047 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11952 21:45:53.047 0.00135546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11953 21:45:53.063 0.00016316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11954 21:45:53.063 0.00114765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11955 21:45:53.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11956 21:45:53.063 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11957 21:45:53.063 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11958 21:45:53.063 0.00126222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11959 21:45:53.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11960 21:45:53.063 0.00124919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11961 21:45:53.063 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11962 21:45:53.063 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11963 21:45:53.063 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11964 21:45:53.063 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11965 21:45:53.063 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11966 21:45:53.063 0.00124128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11967 21:45:53.063 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11968 21:45:53.063 0.00150361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11970 21:45:53.063 0.00097817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11971 21:45:53.063 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11972 21:45:53.063 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11973 21:45:53.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11974 21:45:53.063 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11975 21:45:53.078 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11976 21:45:53.078 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11977 21:45:53.078 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11978 21:45:53.078 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11979 21:45:53.078 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11980 21:45:53.078 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11981 21:45:53.078 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11982 21:45:53.078 0.00129778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11983 21:45:53.078 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11984 21:45:53.078 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11985 21:45:53.078 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11986 21:45:53.078 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11987 21:45:53.078 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11988 21:45:53.078 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11989 21:45:53.078 0.00008375 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11990 21:45:53.078 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11991 21:45:53.078 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11992 21:45:53.078 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11993 21:45:53.078 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11994 21:45:53.078 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11995 21:45:53.094 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11996 21:45:53.094 0.00139062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11997 21:45:53.094 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 11998 21:45:53.094 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 11999 21:45:53.094 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12000 21:45:53.094 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12001 21:45:53.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12002 21:45:53.094 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12003 21:45:53.094 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12004 21:45:53.094 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12005 21:45:53.094 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12006 21:45:53.094 0.00136178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12007 21:45:53.094 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12008 21:45:53.094 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12009 21:45:53.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12010 21:45:53.094 0.00156365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12011 21:45:53.094 0.00001383 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 12012 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 12013 21:45:53.094 0.00001620 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 12014 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 12015 21:45:53.094 0.00006756 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 12016 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12017 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 12018 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 12019 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 12020 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12021 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 12022 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 19 12023 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 12024 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12025 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12026 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 12027 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 12028 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12029 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12030 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 12031 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12032 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 12033 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 12 12034 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 13 12035 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 12036 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 50 12037 21:45:53.094 0.00005096 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 12 12038 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 29 12039 21:45:53.094 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 12040 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12041 21:45:53.094 0.00004464 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12042 21:45:53.094 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 12043 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 12044 21:45:53.094 0.00003437 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12045 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12046 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 12047 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12048 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12049 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 12050 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 13 12051 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 12052 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12053 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 12054 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 29 12055 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 43 12056 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12057 21:45:53.094 0.00004109 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12058 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 75 12059 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 03 12060 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12061 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12062 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 01 12063 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12064 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12065 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12066 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12067 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12068 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12069 21:45:53.094 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12070 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12071 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12072 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12073 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12074 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12075 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12076 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12077 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12078 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12079 21:45:53.094 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12080 21:45:53.094 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 12081 21:45:53.094 0.00016316 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 12082 21:45:53.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12083 21:45:53.094 0.00211121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12084 21:45:53.094 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12085 21:45:53.094 0.00208356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12086 21:45:53.110 0.00031012 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 12087 21:45:53.110 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12088 21:45:53.110 0.00025323 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12089 21:45:53.110 0.00022716 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 16 12090 21:45:53.110 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12091 21:45:53.110 0.00020662 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 12092 21:45:53.110 0.00012365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12093 21:45:53.110 0.00012523 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 12094 21:45:53.110 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12095 21:45:53.110 0.00007111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12096 21:45:53.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12097 21:45:53.110 0.00577659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12098 21:45:53.110 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12099 21:45:53.110 0.00102953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12100 21:45:53.110 0.00011180 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12101 21:45:53.110 0.00095289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12102 21:45:53.110 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12103 21:45:53.110 0.00100227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12104 21:45:53.110 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12105 21:45:53.110 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12106 21:45:53.110 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12107 21:45:53.110 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12108 21:45:53.110 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12109 21:45:53.110 0.00143803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12110 21:45:53.126 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12111 21:45:53.126 0.00119743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12112 21:45:53.126 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12113 21:45:53.126 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12114 21:45:53.126 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12115 21:45:53.126 0.00116662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12116 21:45:53.126 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12117 21:45:53.126 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12118 21:45:53.126 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12119 21:45:53.126 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12120 21:45:53.126 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12121 21:45:53.126 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12122 21:45:53.126 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12123 21:45:53.126 0.00118914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12124 21:45:53.126 0.00004859 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12125 21:45:53.126 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12126 21:45:53.126 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12127 21:45:53.126 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12128 21:45:53.126 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12129 21:45:53.126 0.00124168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12130 21:45:53.126 0.00007862 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12131 21:45:53.141 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12132 21:45:53.141 0.00009165 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12133 21:45:53.141 0.00122193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12134 21:45:53.141 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12135 21:45:53.141 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12136 21:45:53.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12137 21:45:53.141 0.00134835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12138 21:45:53.141 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12139 21:45:53.141 0.00120770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12140 21:45:53.141 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12141 21:45:53.141 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12142 21:45:53.141 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12143 21:45:53.141 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12144 21:45:53.141 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12145 21:45:53.141 0.00136059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12146 21:45:53.141 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12147 21:45:53.141 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12148 21:45:53.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12149 21:45:53.141 0.00141037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12150 21:45:53.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12151 21:45:53.141 0.00141195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12152 21:45:53.156 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12153 21:45:53.156 0.00135190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12154 21:45:53.156 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12155 21:45:53.156 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12156 21:45:53.156 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12157 21:45:53.156 0.00120770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12158 21:45:53.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12159 21:45:53.156 0.00140089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12160 21:45:53.156 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12161 21:45:53.156 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12162 21:45:53.156 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12163 21:45:53.156 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12164 21:45:53.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12165 21:45:53.156 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12166 21:45:53.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12167 21:45:53.156 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12168 21:45:53.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12169 21:45:53.156 0.00126104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12170 21:45:53.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12171 21:45:53.156 0.00147872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12172 21:45:53.156 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12173 21:45:53.156 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12174 21:45:53.172 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12175 21:45:53.172 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12176 21:45:53.172 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12177 21:45:53.172 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12178 21:45:53.172 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12179 21:45:53.172 0.00118795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12180 21:45:53.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12181 21:45:53.172 0.00125235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12182 21:45:53.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12183 21:45:53.172 0.00120020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12184 21:45:53.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12185 21:45:53.172 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12186 21:45:53.172 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12187 21:45:53.172 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12188 21:45:53.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12189 21:45:53.172 0.00121640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12190 21:45:53.172 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12191 21:45:53.172 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12192 21:45:53.172 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12193 21:45:53.172 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12194 21:45:53.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12195 21:45:53.172 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12196 21:45:53.188 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12197 21:45:53.188 0.00120533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12198 21:45:53.188 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12199 21:45:53.188 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12200 21:45:53.188 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12201 21:45:53.188 0.00147516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12202 21:45:53.188 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12203 21:45:53.188 0.00111882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12204 21:45:53.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12205 21:45:53.188 0.00122706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12206 21:45:53.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12207 21:45:53.188 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12208 21:45:53.188 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12209 21:45:53.188 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12210 21:45:53.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12211 21:45:53.188 0.00125274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12212 21:45:53.188 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12214 21:45:53.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12215 21:45:53.188 0.00158341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12216 21:45:53.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12217 21:45:53.203 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12218 21:45:53.203 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12219 21:45:53.203 0.00118519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12220 21:45:53.203 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12221 21:45:53.203 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12222 21:45:53.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12223 21:45:53.203 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12224 21:45:53.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12225 21:45:53.203 0.00144277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12226 21:45:53.203 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12227 21:45:53.203 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12228 21:45:53.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12229 21:45:53.203 0.00143328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12230 21:45:53.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12231 21:45:53.203 0.00144672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12232 21:45:53.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12233 21:45:53.203 0.00114449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12234 21:45:53.203 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 12235 21:45:53.203 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 12236 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 16 12237 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 12238 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 12239 21:45:53.203 0.00008691 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 12240 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 12241 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12242 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 12243 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 35 12244 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12245 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12246 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12247 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12248 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12249 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12250 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12251 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12252 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12253 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12254 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12255 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 12256 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 12257 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12258 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 31 12259 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 39 12260 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 41 12261 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12262 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12263 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12264 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12265 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12266 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12267 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12268 21:45:53.203 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12269 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12270 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12271 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 52 12272 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 55 12273 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12274 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 12275 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 32 12276 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12277 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12278 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12279 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12280 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12281 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12282 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12283 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12284 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12285 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12286 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12287 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12288 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12289 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12290 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12291 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12292 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12293 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12294 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12295 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12296 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12297 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12298 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12299 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12300 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12301 21:45:53.203 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12302 21:45:53.203 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12303 21:45:53.203 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 12304 21:45:53.203 0.00014064 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 12305 21:45:53.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12306 21:45:53.203 0.00189630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12307 21:45:53.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12308 21:45:53.203 0.00078064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12309 21:45:53.219 0.00019161 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 12310 21:45:53.219 0.00012642 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 12311 21:45:53.219 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12312 21:45:53.219 0.00013353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12313 21:45:53.219 0.00018449 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 12314 21:45:53.219 0.00010035 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12315 21:45:53.219 0.00006084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12316 21:45:53.219 0.00017778 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 12317 21:45:53.219 0.00009047 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12318 21:45:53.219 0.00008494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12319 21:45:53.219 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12320 21:45:53.219 0.00652761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12321 21:45:53.219 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12322 21:45:53.219 0.00093116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12323 21:45:53.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12324 21:45:53.219 0.00102479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12325 21:45:53.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12326 21:45:53.219 0.00103032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12327 21:45:53.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12328 21:45:53.219 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12329 21:45:53.219 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12330 21:45:53.219 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12331 21:45:53.219 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12332 21:45:53.219 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12333 21:45:53.234 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12334 21:45:53.234 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12335 21:45:53.234 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12336 21:45:53.234 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12337 21:45:53.234 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12338 21:45:53.234 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12339 21:45:53.234 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12340 21:45:53.234 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12341 21:45:53.234 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12342 21:45:53.234 0.00130489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12343 21:45:53.234 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12344 21:45:53.234 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12345 21:45:53.234 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12346 21:45:53.234 0.00113501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12347 21:45:53.234 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12348 21:45:53.234 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12349 21:45:53.234 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12350 21:45:53.234 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12351 21:45:53.234 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12352 21:45:53.234 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12353 21:45:53.234 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12354 21:45:53.234 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12355 21:45:53.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12356 21:45:53.250 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12357 21:45:53.250 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12358 21:45:53.250 0.00117215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12359 21:45:53.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12360 21:45:53.250 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12361 21:45:53.250 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12362 21:45:53.250 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12363 21:45:53.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12364 21:45:53.250 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12365 21:45:53.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12366 21:45:53.250 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12367 21:45:53.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12368 21:45:53.250 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12369 21:45:53.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12370 21:45:53.250 0.00146054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12371 21:45:53.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12372 21:45:53.250 0.00126578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12373 21:45:53.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12374 21:45:53.250 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12375 21:45:53.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12376 21:45:53.250 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12377 21:45:53.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12378 21:45:53.266 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12380 21:45:53.266 0.00128869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12381 21:45:53.266 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12382 21:45:53.266 0.00140405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12383 21:45:53.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12384 21:45:53.266 0.00119546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12385 21:45:53.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12386 21:45:53.266 0.00141827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12387 21:45:53.266 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12388 21:45:53.266 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12389 21:45:53.266 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12390 21:45:53.266 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12391 21:45:53.266 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12392 21:45:53.266 0.00135664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12393 21:45:53.266 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12394 21:45:53.266 0.00124998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12395 21:45:53.266 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12396 21:45:53.266 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12397 21:45:53.266 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12398 21:45:53.266 0.00142183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12399 21:45:53.281 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12400 21:45:53.281 0.00142459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12401 21:45:53.281 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12402 21:45:53.281 0.00125630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12403 21:45:53.281 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12404 21:45:53.281 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12405 21:45:53.281 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12406 21:45:53.281 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12407 21:45:53.281 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12408 21:45:53.281 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12409 21:45:53.281 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12410 21:45:53.281 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12411 21:45:53.281 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12412 21:45:53.281 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12413 21:45:53.281 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12414 21:45:53.281 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12415 21:45:53.281 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12416 21:45:53.281 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12417 21:45:53.281 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12418 21:45:53.281 0.00124603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12419 21:45:53.297 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12420 21:45:53.297 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12421 21:45:53.297 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12422 21:45:53.297 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12423 21:45:53.297 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12424 21:45:53.297 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12425 21:45:53.297 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12426 21:45:53.297 0.00147279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12427 21:45:53.297 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12428 21:45:53.297 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12429 21:45:53.297 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12430 21:45:53.297 0.00125630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12431 21:45:53.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12432 21:45:53.297 0.00117768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12433 21:45:53.297 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12434 21:45:53.297 0.00150519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12435 21:45:53.297 0.00011101 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12436 21:45:53.297 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12437 21:45:53.297 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12438 21:45:53.297 0.00110696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12439 21:45:53.297 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12440 21:45:53.297 0.00111407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12441 21:45:53.312 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12442 21:45:53.312 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12443 21:45:53.312 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12444 21:45:53.312 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12445 21:45:53.312 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12446 21:45:53.312 0.00119822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12447 21:45:53.312 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12448 21:45:53.312 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12449 21:45:53.312 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12450 21:45:53.312 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12451 21:45:53.312 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12452 21:45:53.312 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12453 21:45:53.312 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12454 21:45:53.312 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12455 21:45:53.312 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12456 21:45:53.312 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 12457 21:45:53.312 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 12458 21:45:53.312 0.00009679 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 12459 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 12460 21:45:53.312 0.00005570 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 12461 21:45:53.312 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 12462 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12463 21:45:53.312 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12464 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12465 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12466 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12467 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12468 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12469 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12470 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12471 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12472 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12473 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12474 21:45:53.312 0.00002489 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12475 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12476 21:45:53.312 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12477 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12478 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12479 21:45:53.312 0.00003595 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12480 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12481 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12482 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12483 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12484 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12485 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12486 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12487 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12488 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12489 21:45:53.312 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12490 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12491 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12492 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12493 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12494 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12495 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12496 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12497 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12498 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12499 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12500 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12501 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12502 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12503 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12504 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12505 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12506 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12507 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12508 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12509 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12510 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12511 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12512 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12513 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12514 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12515 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12516 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12517 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12518 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12519 21:45:53.312 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12520 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12521 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12522 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12523 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12524 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12525 21:45:53.312 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12526 21:45:53.312 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 12527 21:45:53.312 0.00000000 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 Length: 1, Data: 06 12528 21:45:53.312 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12529 21:45:53.312 0.00199625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12530 21:45:53.312 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12531 21:45:53.312 0.00205314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12532 21:45:53.328 0.00021412 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 12533 21:45:53.328 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12534 21:45:53.328 0.00020030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12535 21:45:53.328 0.00015131 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 16 12536 21:45:53.328 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12537 21:45:53.328 0.00024454 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 12538 21:45:53.328 0.00025719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12539 21:45:53.328 0.00021373 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 12540 21:45:53.328 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12541 21:45:53.328 0.00004504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12542 21:45:53.328 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12543 21:45:53.328 0.00472534 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12544 21:45:53.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12545 21:45:53.328 0.00101728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12546 21:45:53.328 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12547 21:45:53.328 0.00098331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12548 21:45:53.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12549 21:45:53.328 0.00099437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12550 21:45:53.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12551 21:45:53.328 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12552 21:45:53.328 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12553 21:45:53.328 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12554 21:45:53.328 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12555 21:45:53.328 0.00137244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12556 21:45:53.328 0.00018489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12557 21:45:53.328 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12558 21:45:53.344 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12559 21:45:53.344 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12560 21:45:53.344 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12561 21:45:53.344 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12562 21:45:53.344 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12563 21:45:53.344 0.00119348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12564 21:45:53.344 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12565 21:45:53.344 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12566 21:45:53.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12567 21:45:53.344 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12568 21:45:53.344 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12569 21:45:53.344 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12570 21:45:53.344 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12571 21:45:53.344 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12572 21:45:53.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12573 21:45:53.344 0.00150203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12574 21:45:53.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12575 21:45:53.344 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12576 21:45:53.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12577 21:45:53.344 0.00115556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12580 21:45:53.359 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12581 21:45:53.359 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12582 21:45:53.359 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12583 21:45:53.359 0.00118005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12584 21:45:53.359 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12585 21:45:53.359 0.00112988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12586 21:45:53.359 0.00007783 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12587 21:45:53.359 0.00112711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12588 21:45:53.359 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12589 21:45:53.359 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12590 21:45:53.359 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12591 21:45:53.359 0.00137244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12592 21:45:53.359 0.00005689 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12593 21:45:53.359 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12594 21:45:53.359 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12595 21:45:53.359 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12596 21:45:53.359 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12597 21:45:53.359 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12598 21:45:53.359 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12599 21:45:53.359 0.00165886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12600 21:45:53.375 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12601 21:45:53.375 0.00087901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12602 21:45:53.375 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12603 21:45:53.375 0.00123575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12604 21:45:53.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12605 21:45:53.375 0.00141748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12606 21:45:53.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12607 21:45:53.375 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12608 21:45:53.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12609 21:45:53.375 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12610 21:45:53.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12611 21:45:53.375 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12613 21:45:53.375 0.00120810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12614 21:45:53.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12615 21:45:53.375 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12616 21:45:53.375 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12617 21:45:53.375 0.00120059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12618 21:45:53.375 0.00007230 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12619 21:45:53.375 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12620 21:45:53.375 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12621 21:45:53.375 0.00122153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12622 21:45:53.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12623 21:45:53.391 0.00164741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12624 21:45:53.391 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12625 21:45:53.391 0.00104968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12626 21:45:53.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12627 21:45:53.391 0.00145225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12628 21:45:53.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12629 21:45:53.391 0.00129778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12630 21:45:53.391 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12631 21:45:53.391 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12632 21:45:53.391 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12633 21:45:53.391 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12634 21:45:53.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12635 21:45:53.391 0.00141235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12636 21:45:53.391 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12637 21:45:53.391 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12638 21:45:53.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12639 21:45:53.391 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12640 21:45:53.391 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12641 21:45:53.391 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12642 21:45:53.391 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12643 21:45:53.391 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12644 21:45:53.406 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12645 21:45:53.406 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12646 21:45:53.406 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12647 21:45:53.406 0.00127091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12648 21:45:53.406 0.00014815 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12649 21:45:53.406 0.00110815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12650 21:45:53.406 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12651 21:45:53.406 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12652 21:45:53.406 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12653 21:45:53.406 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12654 21:45:53.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12655 21:45:53.406 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12656 21:45:53.406 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12657 21:45:53.406 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12658 21:45:53.406 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12659 21:45:53.406 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12660 21:45:53.406 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12661 21:45:53.406 0.00138074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12662 21:45:53.406 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12663 21:45:53.406 0.00116622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12664 21:45:53.406 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12665 21:45:53.406 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12666 21:45:53.422 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12667 21:45:53.422 0.00123022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12668 21:45:53.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12669 21:45:53.422 0.00155417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12670 21:45:53.422 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12671 21:45:53.422 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12672 21:45:53.422 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12673 21:45:53.422 0.00111210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12674 21:45:53.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12675 21:45:53.422 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12676 21:45:53.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12677 21:45:53.422 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12678 21:45:53.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12679 21:45:53.422 0.00138074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12680 21:45:53.422 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 12681 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 12682 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 16 12683 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 12684 21:45:53.422 0.00004701 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 12685 21:45:53.422 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12686 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12687 21:45:53.422 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12688 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12689 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12690 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12691 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12692 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12693 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12694 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12695 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12696 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12697 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12698 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12699 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12700 21:45:53.422 0.00004346 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12701 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12702 21:45:53.422 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12703 21:45:53.422 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12704 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12705 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12706 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12707 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12708 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12709 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12710 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12711 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12712 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12713 21:45:53.422 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12714 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12715 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12716 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12717 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12718 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12719 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12720 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12721 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12722 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12723 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12724 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12725 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12726 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12727 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12728 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12729 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12730 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12731 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12732 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12733 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12734 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12735 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12736 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12737 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12738 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12739 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12740 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12741 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12742 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12743 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12744 21:45:53.422 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12745 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12746 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12747 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12748 21:45:53.422 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12749 21:45:53.422 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 12750 21:45:53.422 0.00023743 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 12751 21:45:53.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12752 21:45:53.422 0.00192474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12753 21:45:53.422 0.00006084 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12754 21:45:53.422 0.00240948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12755 21:45:53.438 0.00019002 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 12756 21:45:53.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12757 21:45:53.438 0.00024494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12758 21:45:53.438 0.00018844 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 07 12759 21:45:53.438 0.00029709 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 12760 21:45:53.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12761 21:45:53.438 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12762 21:45:53.438 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12763 21:45:53.438 0.00023901 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 12764 21:45:53.438 0.00024968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12765 21:45:53.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12766 21:45:53.438 0.00534835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12767 21:45:53.438 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12768 21:45:53.438 0.00101768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12769 21:45:53.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12770 21:45:53.438 0.00105165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12771 21:45:53.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12772 21:45:53.438 0.00101570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12773 21:45:53.438 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12774 21:45:53.438 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12775 21:45:53.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12776 21:45:53.438 0.00140089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12777 21:45:53.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12778 21:45:53.438 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12779 21:45:53.438 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12780 21:45:53.438 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12781 21:45:53.453 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12782 21:45:53.453 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12783 21:45:53.453 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12784 21:45:53.453 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12785 21:45:53.453 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12786 21:45:53.453 0.00149017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12787 21:45:53.453 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12788 21:45:53.453 0.00102677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12789 21:45:53.453 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12790 21:45:53.453 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12791 21:45:53.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12792 21:45:53.453 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12793 21:45:53.453 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12794 21:45:53.453 0.00121284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12795 21:45:53.453 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12796 21:45:53.453 0.00113857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12797 21:45:53.453 0.00015052 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12798 21:45:53.453 0.00117491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12799 21:45:53.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12800 21:45:53.453 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12801 21:45:53.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12802 21:45:53.469 0.00111131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12803 21:45:53.469 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12804 21:45:53.469 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12805 21:45:53.469 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12806 21:45:53.469 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12807 21:45:53.469 0.00013867 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12808 21:45:53.469 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12809 21:45:53.469 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12810 21:45:53.469 0.00094578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12811 21:45:53.469 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12812 21:45:53.469 0.00114212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12813 21:45:53.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12814 21:45:53.469 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12815 21:45:53.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12816 21:45:53.469 0.00142538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12817 21:45:53.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12818 21:45:53.469 0.00126578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12819 21:45:53.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12820 21:45:53.469 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12821 21:45:53.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12822 21:45:53.469 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12823 21:45:53.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12824 21:45:53.485 0.00139101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12825 21:45:53.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12826 21:45:53.485 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12827 21:45:53.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12828 21:45:53.485 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12829 21:45:53.485 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12830 21:45:53.485 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12831 21:45:53.485 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12832 21:45:53.485 0.00152296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12833 21:45:53.485 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12834 21:45:53.485 0.00118519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12835 21:45:53.485 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12836 21:45:53.485 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12837 21:45:53.485 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12838 21:45:53.485 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12839 21:45:53.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12840 21:45:53.485 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12841 21:45:53.485 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12842 21:45:53.485 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12843 21:45:53.485 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12844 21:45:53.485 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12845 21:45:53.500 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12846 21:45:53.500 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12847 21:45:53.500 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12848 21:45:53.500 0.00151941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12849 21:45:53.500 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12850 21:45:53.500 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12851 21:45:53.500 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12852 21:45:53.500 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12853 21:45:53.500 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12854 21:45:53.500 0.00144435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12855 21:45:53.500 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12856 21:45:53.500 0.00116267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12857 21:45:53.500 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12858 21:45:53.500 0.00117373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12859 21:45:53.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12860 21:45:53.500 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12861 21:45:53.500 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12862 21:45:53.500 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12863 21:45:53.500 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12864 21:45:53.500 0.00133965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12865 21:45:53.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12866 21:45:53.500 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12867 21:45:53.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12868 21:45:53.516 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12869 21:45:53.516 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12870 21:45:53.516 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12871 21:45:53.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12872 21:45:53.516 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12873 21:45:53.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12874 21:45:53.516 0.00143486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12875 21:45:53.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12876 21:45:53.516 0.00145936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12877 21:45:53.516 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12878 21:45:53.516 0.00110736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12879 21:45:53.516 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12881 21:45:53.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12882 21:45:53.516 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12883 21:45:53.516 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12884 21:45:53.516 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12885 21:45:53.516 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12886 21:45:53.516 0.00141393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12887 21:45:53.531 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12888 21:45:53.531 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12889 21:45:53.531 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12890 21:45:53.531 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12891 21:45:53.531 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12892 21:45:53.531 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12893 21:45:53.531 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12894 21:45:53.531 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12895 21:45:53.531 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12896 21:45:53.531 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12897 21:45:53.531 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12898 21:45:53.531 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12899 21:45:53.531 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12900 21:45:53.531 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12901 21:45:53.531 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12902 21:45:53.531 0.00155575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12903 21:45:53.531 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 12904 21:45:53.531 0.00005096 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 12905 21:45:53.531 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 07 12906 21:45:53.531 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 12907 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 12908 21:45:53.531 0.00003635 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12909 21:45:53.531 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12910 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12911 21:45:53.531 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12913 21:45:53.531 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12914 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12915 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12916 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12917 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12918 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12919 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12920 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12921 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12922 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12923 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12924 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12925 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12926 21:45:53.531 0.00001343 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12927 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12928 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12929 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12930 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12931 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12932 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12933 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12934 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12935 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12936 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12937 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12938 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12939 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12940 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12941 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12942 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12943 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12944 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12945 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12946 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12947 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12948 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12949 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12950 21:45:53.531 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12951 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12952 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12953 21:45:53.531 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12954 21:45:53.531 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12955 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12956 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12957 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12958 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12959 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12960 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12961 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12962 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12963 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12964 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12965 21:45:53.531 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12966 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12967 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12968 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12969 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12970 21:45:53.531 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12971 21:45:53.531 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 12972 21:45:53.531 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 12973 21:45:53.531 0.00017422 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 12974 21:45:53.531 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12975 21:45:53.531 0.00197057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12976 21:45:53.531 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12977 21:45:53.531 0.00200138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12978 21:45:53.547 0.00022914 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 12979 21:45:53.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12980 21:45:53.547 0.00030025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12981 21:45:53.547 0.00021965 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 17 12982 21:45:53.547 0.00025916 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 12983 21:45:53.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12984 21:45:53.547 0.00019358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12985 21:45:53.547 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12986 21:45:53.547 0.00023427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12987 21:45:53.547 0.00018015 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 12988 21:45:53.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12989 21:45:53.547 0.00478894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12990 21:45:53.547 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12991 21:45:53.547 0.00099714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12992 21:45:53.547 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12993 21:45:53.547 0.00096909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12994 21:45:53.547 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12995 21:45:53.547 0.00112869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12996 21:45:53.547 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12997 21:45:53.547 0.00117728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 12998 21:45:53.547 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 12999 21:45:53.547 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13000 21:45:53.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13001 21:45:53.547 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13002 21:45:53.547 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13003 21:45:53.547 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13004 21:45:53.563 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13005 21:45:53.563 0.00123891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13006 21:45:53.563 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13007 21:45:53.563 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13008 21:45:53.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13009 21:45:53.563 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13010 21:45:53.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13011 21:45:53.563 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13012 21:45:53.563 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13013 21:45:53.563 0.00142064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13014 21:45:53.563 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13015 21:45:53.563 0.00117333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13016 21:45:53.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13018 21:45:53.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13019 21:45:53.563 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13020 21:45:53.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13021 21:45:53.563 0.00122193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13022 21:45:53.563 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13023 21:45:53.563 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13024 21:45:53.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13025 21:45:53.563 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13026 21:45:53.578 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13027 21:45:53.578 0.00125195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13028 21:45:53.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13029 21:45:53.578 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13030 21:45:53.578 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13031 21:45:53.578 0.00142894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13032 21:45:53.578 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13033 21:45:53.578 0.00115240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13034 21:45:53.578 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13035 21:45:53.578 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13036 21:45:53.578 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13037 21:45:53.578 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13038 21:45:53.578 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13039 21:45:53.578 0.00125077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13040 21:45:53.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13041 21:45:53.578 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13042 21:45:53.578 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13043 21:45:53.578 0.00143645 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13044 21:45:53.578 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13045 21:45:53.578 0.00109709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13046 21:45:53.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13047 21:45:53.578 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13048 21:45:53.594 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13049 21:45:53.594 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13050 21:45:53.594 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13051 21:45:53.594 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13052 21:45:53.594 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13053 21:45:53.594 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13054 21:45:53.594 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13055 21:45:53.594 0.00122351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13056 21:45:53.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13057 21:45:53.594 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13058 21:45:53.594 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13059 21:45:53.594 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13060 21:45:53.594 0.00023388 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13061 21:45:53.594 0.00117175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13062 21:45:53.594 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13063 21:45:53.594 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13064 21:45:53.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13065 21:45:53.594 0.00146845 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13066 21:45:53.594 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13067 21:45:53.594 0.00120257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13068 21:45:53.610 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13069 21:45:53.610 0.00108523 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13070 21:45:53.610 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13071 21:45:53.610 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13072 21:45:53.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13073 21:45:53.610 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13074 21:45:53.610 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13075 21:45:53.610 0.00143803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13076 21:45:53.610 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13077 21:45:53.610 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13078 21:45:53.610 0.00014222 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13079 21:45:53.610 0.00117728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13080 21:45:53.610 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13081 21:45:53.610 0.00127328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13082 21:45:53.610 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13083 21:45:53.610 0.00117254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13084 21:45:53.610 0.00012563 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13085 21:45:53.610 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13086 21:45:53.610 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13087 21:45:53.610 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13088 21:45:53.610 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13089 21:45:53.610 0.00148780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13090 21:45:53.626 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13091 21:45:53.626 0.00088138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13092 21:45:53.626 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13093 21:45:53.626 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13094 21:45:53.626 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13095 21:45:53.626 0.00145699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13096 21:45:53.626 0.00005886 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13097 21:45:53.626 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13098 21:45:53.626 0.00010311 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13099 21:45:53.626 0.00119783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13100 21:45:53.626 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13101 21:45:53.626 0.00121640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13102 21:45:53.626 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13103 21:45:53.626 0.00144988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13104 21:45:53.626 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13105 21:45:53.626 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13106 21:45:53.626 0.00015052 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13107 21:45:53.626 0.00096514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13108 21:45:53.626 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13109 21:45:53.626 0.00140840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13110 21:45:53.626 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13111 21:45:53.626 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13112 21:45:53.641 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13113 21:45:53.641 0.00132188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13114 21:45:53.641 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13115 21:45:53.641 0.00121442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13116 21:45:53.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13117 21:45:53.641 0.00134203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13118 21:45:53.641 0.00009126 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13119 21:45:53.641 0.00118835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13120 21:45:53.641 0.00013156 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13121 21:45:53.641 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13122 21:45:53.641 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13123 21:45:53.641 0.00139457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13124 21:45:53.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13125 21:45:53.641 0.00152533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13126 21:45:53.641 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 13127 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 13128 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 17 13129 21:45:53.641 0.00005531 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 13130 21:45:53.641 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 13131 21:45:53.641 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13132 21:45:53.641 0.00002568 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13133 21:45:53.641 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13134 21:45:53.641 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13135 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13136 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13137 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13138 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13139 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13140 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13141 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13142 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13143 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13144 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13145 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13146 21:45:53.641 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13147 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13148 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13149 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13150 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13151 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13152 21:45:53.641 0.00004306 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13153 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13154 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13155 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13156 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13157 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13158 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13159 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13160 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13161 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13162 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13163 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13164 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13165 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13166 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13167 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13168 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13169 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13170 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13171 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13172 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13173 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13174 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13175 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13176 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13177 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13178 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13179 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13180 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13181 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13182 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13183 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13184 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13185 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13186 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13187 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13188 21:45:53.641 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13189 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13190 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13191 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13192 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13193 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13194 21:45:53.641 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13195 21:45:53.641 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 13196 21:45:53.641 0.00016435 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 13197 21:45:53.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13198 21:45:53.641 0.00181531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13199 21:45:53.641 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13200 21:45:53.641 0.00278321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13201 21:45:53.657 0.00021452 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 13202 21:45:53.657 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13203 21:45:53.657 0.00024849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13204 21:45:53.657 0.00016632 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 07 13205 21:45:53.657 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13206 21:45:53.657 0.00019319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13207 21:45:53.657 0.00015526 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 13208 21:45:53.657 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13209 21:45:53.657 0.00045788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13210 21:45:53.657 0.00039862 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 13211 21:45:53.657 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13212 21:45:53.657 0.00382617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13213 21:45:53.657 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13214 21:45:53.657 0.00103230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13215 21:45:53.657 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13216 21:45:53.657 0.00099200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13217 21:45:53.657 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13218 21:45:53.657 0.00100622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13219 21:45:53.657 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13220 21:45:53.657 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13221 21:45:53.657 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13222 21:45:53.657 0.00133886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13223 21:45:53.657 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13224 21:45:53.657 0.00124405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13225 21:45:53.657 0.00112198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13226 21:45:53.672 0.00024928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13227 21:45:53.672 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13228 21:45:53.672 0.00140800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13229 21:45:53.672 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13230 21:45:53.672 0.00118835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13231 21:45:53.672 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13232 21:45:53.672 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13233 21:45:53.672 0.00010193 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13234 21:45:53.672 0.00120573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13235 21:45:53.672 0.00005452 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13236 21:45:53.672 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13237 21:45:53.672 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13238 21:45:53.672 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13239 21:45:53.672 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13240 21:45:53.672 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13241 21:45:53.672 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13242 21:45:53.672 0.00108128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13243 21:45:53.672 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13244 21:45:53.672 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13245 21:45:53.672 0.00007546 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13246 21:45:53.672 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13247 21:45:53.672 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13248 21:45:53.672 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13249 21:45:53.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13250 21:45:53.688 0.00148583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13251 21:45:53.688 0.00009600 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13252 21:45:53.688 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13253 21:45:53.688 0.00015012 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13254 21:45:53.688 0.00093551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13255 21:45:53.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13256 21:45:53.688 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13257 21:45:53.688 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13258 21:45:53.688 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13259 21:45:53.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13260 21:45:53.688 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13261 21:45:53.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13262 21:45:53.688 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13263 21:45:53.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13264 21:45:53.688 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13265 21:45:53.688 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13266 21:45:53.688 0.00141985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13267 21:45:53.688 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13268 21:45:53.688 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13269 21:45:53.703 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13270 21:45:53.703 0.00136810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13271 21:45:53.703 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13272 21:45:53.703 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13273 21:45:53.703 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13274 21:45:53.703 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13275 21:45:53.703 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13276 21:45:53.703 0.00124405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13277 21:45:53.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13278 21:45:53.703 0.00136968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13279 21:45:53.703 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13280 21:45:53.703 0.00118835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13281 21:45:53.703 0.00014696 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13282 21:45:53.703 0.00113659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13283 21:45:53.703 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13284 21:45:53.703 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13285 21:45:53.703 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13286 21:45:53.703 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13287 21:45:53.703 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13288 21:45:53.703 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13289 21:45:53.703 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13290 21:45:53.703 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13291 21:45:53.719 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13292 21:45:53.719 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13293 21:45:53.719 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13294 21:45:53.719 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13295 21:45:53.719 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13296 21:45:53.719 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13297 21:45:53.719 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13298 21:45:53.719 0.00142183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13299 21:45:53.719 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13300 21:45:53.719 0.00110775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13301 21:45:53.719 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13302 21:45:53.719 0.00124642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13303 21:45:53.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13304 21:45:53.719 0.00143724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13305 21:45:53.719 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13306 21:45:53.719 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13307 21:45:53.719 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13308 21:45:53.719 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13309 21:45:53.719 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13310 21:45:53.719 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13311 21:45:53.719 0.00009956 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13312 21:45:53.719 0.00124444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13313 21:45:53.735 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13314 21:45:53.735 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13315 21:45:53.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13316 21:45:53.735 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13317 21:45:53.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13318 21:45:53.735 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13319 21:45:53.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13320 21:45:53.735 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13321 21:45:53.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13322 21:45:53.735 0.00141235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13323 21:45:53.735 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13324 21:45:53.735 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13325 21:45:53.735 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13326 21:45:53.735 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13327 21:45:53.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13328 21:45:53.735 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13329 21:45:53.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13330 21:45:53.735 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13331 21:45:53.735 0.00009047 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13332 21:45:53.735 0.00124207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13333 21:45:53.735 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13334 21:45:53.735 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13335 21:45:53.750 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13336 21:45:53.750 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13337 21:45:53.750 0.00013037 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13338 21:45:53.750 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13339 21:45:53.750 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13340 21:45:53.750 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13341 21:45:53.750 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13342 21:45:53.750 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13343 21:45:53.750 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13344 21:45:53.750 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13345 21:45:53.750 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13346 21:45:53.750 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13347 21:45:53.750 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13348 21:45:53.750 0.00218509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13349 21:45:53.750 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 13350 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 13351 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 07 13352 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 13353 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 13354 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13355 21:45:53.750 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13356 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13357 21:45:53.750 0.00004701 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13358 21:45:53.750 0.00005215 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13359 21:45:53.750 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13360 21:45:53.750 0.00001383 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13361 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13362 21:45:53.750 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13363 21:45:53.750 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13364 21:45:53.750 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13365 21:45:53.750 0.00002410 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13366 21:45:53.750 0.00001304 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13367 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13368 21:45:53.750 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13369 21:45:53.750 0.00002884 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13370 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13371 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13372 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13373 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13374 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13375 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13376 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13377 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13378 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13379 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13380 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13381 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13382 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13383 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13384 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13385 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13386 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13387 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13388 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13389 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13390 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13391 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13392 21:45:53.750 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13393 21:45:53.750 0.00000672 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13394 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13395 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13396 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13397 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13398 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13399 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13400 21:45:53.750 0.00002449 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13401 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13402 21:45:53.750 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13403 21:45:53.750 0.00001620 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13404 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13405 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13406 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13407 21:45:53.750 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13408 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13409 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13410 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13411 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13412 21:45:53.750 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13413 21:45:53.750 0.00005768 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13414 21:45:53.750 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13415 21:45:53.750 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13416 21:45:53.750 0.00001738 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13418 21:45:53.750 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 13419 21:45:53.750 0.00019635 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 13420 21:45:53.750 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13421 21:45:53.750 0.00194054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13422 21:45:53.750 0.00008494 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13423 21:45:53.750 0.00170153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13424 21:45:53.766 0.00017225 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 13425 21:45:53.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13426 21:45:53.766 0.00018133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13427 21:45:53.766 0.00012128 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 17 13428 21:45:53.766 0.00080751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13429 21:45:53.766 0.00023506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13430 21:45:53.766 0.00016790 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 13431 21:45:53.766 0.00013551 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 13432 21:45:53.766 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13433 21:45:53.766 0.00007388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13434 21:45:53.766 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13435 21:45:53.766 0.00520257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13436 21:45:53.766 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13437 21:45:53.766 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13438 21:45:53.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13439 21:45:53.766 0.00109393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13440 21:45:53.766 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13441 21:45:53.766 0.00083042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13442 21:45:53.766 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13443 21:45:53.766 0.00117412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13444 21:45:53.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13445 21:45:53.766 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13446 21:45:53.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13447 21:45:53.766 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13448 21:45:53.766 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13449 21:45:53.766 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13450 21:45:53.781 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13451 21:45:53.781 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13452 21:45:53.781 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13453 21:45:53.781 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13454 21:45:53.781 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13455 21:45:53.781 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13456 21:45:53.781 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13457 21:45:53.781 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13458 21:45:53.781 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13459 21:45:53.781 0.00123062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13460 21:45:53.781 0.00008533 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13461 21:45:53.781 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13462 21:45:53.781 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13463 21:45:53.781 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13464 21:45:53.781 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13465 21:45:53.781 0.00114607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13466 21:45:53.781 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13467 21:45:53.781 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13468 21:45:53.781 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13469 21:45:53.781 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13470 21:45:53.797 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13471 21:45:53.797 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13472 21:45:53.797 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13473 21:45:53.797 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13474 21:45:53.797 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13475 21:45:53.797 0.00137837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13478 21:45:53.797 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13479 21:45:53.797 0.00122272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13480 21:45:53.797 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13481 21:45:53.797 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13482 21:45:53.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13483 21:45:53.797 0.00148148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13484 21:45:53.797 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13485 21:45:53.797 0.00118440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13486 21:45:53.797 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13487 21:45:53.797 0.00113027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13488 21:45:53.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13489 21:45:53.797 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13490 21:45:53.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13491 21:45:53.797 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13492 21:45:53.813 0.00016277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13493 21:45:53.813 0.00114370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13496 21:45:53.813 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13497 21:45:53.813 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13498 21:45:53.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13499 21:45:53.813 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13500 21:45:53.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13501 21:45:53.813 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13502 21:45:53.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13503 21:45:53.813 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13504 21:45:53.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13505 21:45:53.813 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13506 21:45:53.813 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13507 21:45:53.813 0.00157274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13508 21:45:53.813 0.00019714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13509 21:45:53.813 0.00074627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13510 21:45:53.813 0.00007743 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13511 21:45:53.813 0.00111644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13512 21:45:53.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13513 21:45:53.813 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13514 21:45:53.829 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13515 21:45:53.829 0.00139773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13516 21:45:53.829 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13517 21:45:53.829 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13518 21:45:53.829 0.00008336 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13519 21:45:53.829 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13520 21:45:53.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13521 21:45:53.829 0.00136415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13522 21:45:53.829 0.00010311 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13523 21:45:53.829 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13524 21:45:53.829 0.00009916 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13525 21:45:53.829 0.00119546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13526 21:45:53.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13527 21:45:53.829 0.00141077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13528 21:45:53.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13529 21:45:53.829 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13530 21:45:53.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13531 21:45:53.829 0.00113580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13532 21:45:53.829 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13533 21:45:53.829 0.00151901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13534 21:45:53.829 0.00013551 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13535 21:45:53.829 0.00115082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13536 21:45:53.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13537 21:45:53.844 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13538 21:45:53.844 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13539 21:45:53.844 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13540 21:45:53.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13541 21:45:53.844 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13542 21:45:53.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13543 21:45:53.844 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13544 21:45:53.844 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13545 21:45:53.844 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13546 21:45:53.844 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13547 21:45:53.844 0.00126578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13548 21:45:53.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13549 21:45:53.844 0.00123417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13550 21:45:53.844 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13551 21:45:53.844 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13552 21:45:53.844 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13553 21:45:53.844 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13554 21:45:53.844 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13555 21:45:53.844 0.00118242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13556 21:45:53.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13557 21:45:53.844 0.00141314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13558 21:45:53.860 0.00010706 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13559 21:45:53.860 0.00127091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13560 21:45:53.860 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13561 21:45:53.860 0.00123417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13562 21:45:53.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13563 21:45:53.860 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13564 21:45:53.860 0.00020780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13565 21:45:53.860 0.00113738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13566 21:45:53.860 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13567 21:45:53.860 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13568 21:45:53.860 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13569 21:45:53.860 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13570 21:45:53.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13571 21:45:53.860 0.00158657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13572 21:45:53.860 0.00001264 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 13573 21:45:53.860 0.00009798 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 13574 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 17 13575 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 13576 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 13577 21:45:53.860 0.00007072 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13578 21:45:53.860 0.00007072 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13579 21:45:53.860 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13580 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13581 21:45:53.860 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13582 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13583 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13584 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13585 21:45:53.860 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13586 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13587 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13588 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13589 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13590 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13591 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13592 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13593 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13594 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13595 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13596 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13597 21:45:53.860 0.00002686 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13598 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13599 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13600 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13601 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13602 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13603 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13604 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13605 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13606 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13607 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13608 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13609 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13610 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13611 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13612 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13613 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13614 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13615 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13616 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13617 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13618 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13619 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13620 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13621 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13622 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13623 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13624 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13625 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13626 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13627 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13628 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13629 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13630 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13631 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13632 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13633 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13634 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13635 21:45:53.860 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13636 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13637 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13638 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13639 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13640 21:45:53.860 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13641 21:45:53.860 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 13642 21:45:53.860 0.00012168 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 13643 21:45:53.860 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13644 21:45:53.860 0.00197807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13645 21:45:53.860 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13646 21:45:53.860 0.00244306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13647 21:45:53.875 0.00041047 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 13648 21:45:53.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13649 21:45:53.875 0.00021728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13650 21:45:53.875 0.00014775 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 07 13651 21:45:53.875 0.00012919 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 13652 21:45:53.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13653 21:45:53.875 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13654 21:45:53.875 0.00008849 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 13655 21:45:53.875 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13656 21:45:53.875 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13657 21:45:53.875 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13658 21:45:53.875 0.00523180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13659 21:45:53.875 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13660 21:45:53.875 0.00086598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13661 21:45:53.875 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13662 21:45:53.875 0.00096198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13665 21:45:53.875 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13666 21:45:53.875 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13667 21:45:53.875 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13668 21:45:53.875 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13669 21:45:53.875 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13670 21:45:53.875 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13671 21:45:53.875 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13672 21:45:53.875 0.00157353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13673 21:45:53.891 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13674 21:45:53.891 0.00081343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13675 21:45:53.891 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13676 21:45:53.891 0.00124603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13677 21:45:53.891 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13678 21:45:53.891 0.00121995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13679 21:45:53.891 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13680 21:45:53.891 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13681 21:45:53.891 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13682 21:45:53.891 0.00123141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13683 21:45:53.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13684 21:45:53.891 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13685 21:45:53.891 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13686 21:45:53.891 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13687 21:45:53.891 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13688 21:45:53.891 0.00143447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13689 21:45:53.891 0.00176790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13690 21:45:53.891 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13691 21:45:53.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13692 21:45:53.891 0.00064988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13693 21:45:53.907 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13694 21:45:53.907 0.00156524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13695 21:45:53.907 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13696 21:45:53.907 0.00104020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13697 21:45:53.907 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13698 21:45:53.907 0.00111921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13699 21:45:53.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13700 21:45:53.907 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13701 21:45:53.907 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13702 21:45:53.907 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13703 21:45:53.907 0.00019319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13704 21:45:53.907 0.00115003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13705 21:45:53.907 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13706 21:45:53.907 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13707 21:45:53.907 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13708 21:45:53.907 0.00150163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13709 21:45:53.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13710 21:45:53.907 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13711 21:45:53.907 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13712 21:45:53.907 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13713 21:45:53.907 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13714 21:45:53.907 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13715 21:45:53.922 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13716 21:45:53.922 0.00140682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13717 21:45:53.922 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13718 21:45:53.922 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13719 21:45:53.922 0.00007348 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13720 21:45:53.922 0.00108207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13721 21:45:53.922 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13722 21:45:53.922 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13723 21:45:53.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13724 21:45:53.922 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13725 21:45:53.922 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13726 21:45:53.922 0.00124998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13727 21:45:53.922 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13728 21:45:53.922 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13729 21:45:53.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13730 21:45:53.922 0.00142104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13731 21:45:53.922 0.00006519 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13732 21:45:53.922 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13733 21:45:53.922 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13734 21:45:53.922 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13736 21:45:53.922 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13737 21:45:53.938 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13738 21:45:53.938 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13739 21:45:53.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13740 21:45:53.938 0.00144395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13741 21:45:53.938 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13742 21:45:53.938 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13743 21:45:53.938 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13744 21:45:53.938 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13745 21:45:53.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13746 21:45:53.938 0.00142262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13747 21:45:53.938 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13748 21:45:53.938 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13749 21:45:53.938 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13750 21:45:53.938 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13751 21:45:53.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13752 21:45:53.938 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13753 21:45:53.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13754 21:45:53.938 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13755 21:45:53.938 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13756 21:45:53.938 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13757 21:45:53.954 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13758 21:45:53.954 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13759 21:45:53.954 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13760 21:45:53.954 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13761 21:45:53.954 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13762 21:45:53.954 0.00145462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13763 21:45:53.954 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13764 21:45:53.954 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13765 21:45:53.954 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13766 21:45:53.954 0.00096435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13767 21:45:53.954 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13768 21:45:53.954 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13769 21:45:53.954 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13770 21:45:53.954 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13771 21:45:53.954 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13772 21:45:53.954 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13773 21:45:53.954 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13774 21:45:53.954 0.00131832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13775 21:45:53.954 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13776 21:45:53.954 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13777 21:45:53.954 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13778 21:45:53.954 0.00120217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13779 21:45:53.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13780 21:45:53.969 0.00140405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13781 21:45:53.969 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13782 21:45:53.969 0.00108444 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13783 21:45:53.969 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13784 21:45:53.969 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13785 21:45:53.969 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13786 21:45:53.969 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13787 21:45:53.969 0.00007269 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13788 21:45:53.969 0.00098607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13789 21:45:53.969 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13790 21:45:53.969 0.00118519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13791 21:45:53.969 0.00011733 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13792 21:45:53.969 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13793 21:45:53.969 0.00008573 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13794 21:45:53.969 0.00189116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13795 21:45:53.969 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 13796 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 13797 21:45:53.969 0.00004780 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 07 13798 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 13799 21:45:53.969 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 13800 21:45:53.969 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13801 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13802 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13803 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13804 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13805 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13806 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13807 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13808 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13809 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13810 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13811 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13812 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13813 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13814 21:45:53.969 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13815 21:45:53.969 0.00002212 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13816 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13817 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13818 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13819 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13820 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13821 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13822 21:45:53.969 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13823 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13824 21:45:53.969 0.00001383 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13825 21:45:53.969 0.00001620 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13826 21:45:53.969 0.00001580 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13827 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13828 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13829 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13830 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13831 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13832 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13833 21:45:53.969 0.00001936 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13834 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13835 21:45:53.969 0.00002449 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13836 21:45:53.969 0.00004701 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13837 21:45:53.969 0.00004780 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13838 21:45:53.969 0.00001422 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13839 21:45:53.969 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13840 21:45:53.969 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13841 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13842 21:45:53.969 0.00003951 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13843 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13844 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13845 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13846 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13847 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13848 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13849 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13850 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13851 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13852 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13853 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13854 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13855 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13856 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13857 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13858 21:45:53.969 0.00003358 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13859 21:45:53.969 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13860 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13861 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13862 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13863 21:45:53.969 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 13864 21:45:53.969 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 13865 21:45:53.969 0.00023190 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 13866 21:45:53.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13867 21:45:53.969 0.00187773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13868 21:45:53.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13869 21:45:53.969 0.00118795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13870 21:45:53.985 0.00014617 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 13871 21:45:53.985 0.00014617 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 17 13872 21:45:53.985 0.00006835 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13873 21:45:53.985 0.00009956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13874 21:45:53.985 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13875 21:45:53.985 0.00029551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13876 21:45:53.985 0.00027931 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 13877 21:45:53.985 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13878 21:45:53.985 0.00000000 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 Length: 1, Data: 40 13879 21:45:53.985 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 13882 21:45:53.985 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13883 21:45:53.985 0.00085926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13884 21:45:53.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13885 21:45:53.985 0.00101096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13886 21:45:53.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13887 21:45:53.985 0.00113067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13888 21:45:53.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13889 21:45:53.985 0.00124286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13890 21:45:53.985 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13891 21:45:53.985 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13892 21:45:53.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13893 21:45:53.985 0.00145857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13894 21:45:53.985 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13895 21:45:53.985 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13896 21:45:54.000 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13897 21:45:54.000 0.00121126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13898 21:45:54.000 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13899 21:45:54.000 0.00146331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13900 21:45:54.000 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13901 21:45:54.000 0.00115793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13902 21:45:54.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13903 21:45:54.000 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13904 21:45:54.000 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13905 21:45:54.000 0.00152849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13906 21:45:54.000 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13907 21:45:54.000 0.00113896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13908 21:45:54.000 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13909 21:45:54.000 0.00116741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13910 21:45:54.000 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13911 21:45:54.000 0.00141195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13912 21:45:54.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13913 21:45:54.000 0.00122825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13914 21:45:54.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13915 21:45:54.000 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13916 21:45:54.000 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13917 21:45:54.000 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13918 21:45:54.016 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13919 21:45:54.016 0.00122390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13920 21:45:54.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13921 21:45:54.016 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13922 21:45:54.016 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13923 21:45:54.016 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13924 21:45:54.016 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13925 21:45:54.016 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13926 21:45:54.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13927 21:45:54.016 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13928 21:45:54.016 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13929 21:45:54.016 0.00143486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13930 21:45:54.016 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13931 21:45:54.016 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13932 21:45:54.016 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13933 21:45:54.016 0.00145778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13934 21:45:54.016 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13935 21:45:54.016 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13936 21:45:54.016 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13937 21:45:54.016 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13938 21:45:54.032 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13939 21:45:54.032 0.00115595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13940 21:45:54.032 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13941 21:45:54.032 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13942 21:45:54.032 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13943 21:45:54.032 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13944 21:45:54.032 0.00012879 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13945 21:45:54.032 0.00120454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13947 21:45:54.032 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13948 21:45:54.032 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13949 21:45:54.032 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13950 21:45:54.032 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13951 21:45:54.032 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13952 21:45:54.032 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13953 21:45:54.032 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13954 21:45:54.032 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13955 21:45:54.032 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13956 21:45:54.032 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13957 21:45:54.032 0.00134519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13958 21:45:54.032 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13959 21:45:54.032 0.00148109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13960 21:45:54.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13961 21:45:54.047 0.00123852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13962 21:45:54.047 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13963 21:45:54.047 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13964 21:45:54.047 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13965 21:45:54.047 0.00124365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13966 21:45:54.047 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13967 21:45:54.047 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13968 21:45:54.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13969 21:45:54.047 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13970 21:45:54.047 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13971 21:45:54.047 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13972 21:45:54.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13973 21:45:54.047 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13974 21:45:54.047 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13975 21:45:54.047 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13976 21:45:54.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13977 21:45:54.047 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13978 21:45:54.047 0.00006440 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13979 21:45:54.047 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13980 21:45:54.047 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13981 21:45:54.047 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13982 21:45:54.063 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13983 21:45:54.063 0.00142933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13984 21:45:54.063 0.00019674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13985 21:45:54.063 0.00120691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13986 21:45:54.063 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13987 21:45:54.063 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13988 21:45:54.063 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13989 21:45:54.063 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13990 21:45:54.063 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13991 21:45:54.063 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13992 21:45:54.063 0.00008652 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13993 21:45:54.063 0.00119704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13994 21:45:54.063 0.00008889 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13995 21:45:54.063 0.00135427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13996 21:45:54.063 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13997 21:45:54.063 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 13998 21:45:54.063 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 13999 21:45:54.063 0.00101017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14000 21:45:54.063 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14001 21:45:54.063 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14002 21:45:54.063 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14003 21:45:54.063 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14004 21:45:54.079 0.00019319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14005 21:45:54.079 0.00105679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14006 21:45:54.079 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14007 21:45:54.079 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14008 21:45:54.079 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14009 21:45:54.079 0.00127565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14010 21:45:54.079 0.00006440 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14011 21:45:54.079 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14012 21:45:54.079 0.00006914 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14013 21:45:54.079 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14014 21:45:54.079 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14015 21:45:54.079 0.00115398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14016 21:45:54.079 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14017 21:45:54.079 0.00118874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14018 21:45:54.079 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 14019 21:45:54.079 0.00001422 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 14020 21:45:54.079 0.00004306 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 17 14021 21:45:54.079 0.00006005 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 14022 21:45:54.079 0.00002963 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 14023 21:45:54.079 0.00000356 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14024 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14025 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14026 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14027 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14028 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14029 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14030 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14031 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14032 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14033 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14034 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14035 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14036 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14037 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14038 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14039 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14040 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14041 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14042 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14043 21:45:54.079 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14044 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14045 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14046 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14047 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14048 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14049 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14050 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14051 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14052 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14053 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14054 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14055 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14056 21:45:54.079 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14057 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14058 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14059 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14060 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14061 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14062 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14063 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14064 21:45:54.079 0.00003832 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14065 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14066 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14067 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14068 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14069 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14070 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14071 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14072 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14073 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14074 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14075 21:45:54.079 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14076 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14077 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14078 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14079 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14080 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14081 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14082 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14083 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14084 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14085 21:45:54.079 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14086 21:45:54.079 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14087 21:45:54.079 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 14088 21:45:54.079 0.00014064 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 14089 21:45:54.079 0.00010114 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14090 21:45:54.079 0.00219536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14091 21:45:54.079 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14092 21:45:54.079 0.00288869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14093 21:45:54.094 0.00023111 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 14094 21:45:54.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14095 21:45:54.094 0.00022637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14096 21:45:54.094 0.00019595 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 07 14097 21:45:54.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14098 21:45:54.094 0.00025561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14099 21:45:54.094 0.00022558 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 14100 21:45:54.094 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14101 21:45:54.094 0.00025047 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 14102 21:45:54.094 0.00029077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14103 21:45:54.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14104 21:45:54.094 0.00473126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14105 21:45:54.094 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14106 21:45:54.094 0.00102598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14107 21:45:54.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14108 21:45:54.094 0.00093077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14109 21:45:54.094 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14110 21:45:54.094 0.00101965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14111 21:45:54.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14112 21:45:54.094 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14113 21:45:54.094 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14114 21:45:54.094 0.00147714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14115 21:45:54.094 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14116 21:45:54.094 0.00118914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14117 21:45:54.109 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14118 21:45:54.109 0.00114133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14119 21:45:54.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14120 21:45:54.109 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14121 21:45:54.109 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14122 21:45:54.109 0.00136059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14123 21:45:54.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14124 21:45:54.109 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14125 21:45:54.109 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14126 21:45:54.109 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14127 21:45:54.109 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14128 21:45:54.109 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14129 21:45:54.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14130 21:45:54.109 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14131 21:45:54.109 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14132 21:45:54.109 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14134 21:45:54.109 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14135 21:45:54.109 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14136 21:45:54.109 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14137 21:45:54.109 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14138 21:45:54.109 0.00139773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14139 21:45:54.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14140 21:45:54.125 0.00147121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14141 21:45:54.125 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14142 21:45:54.125 0.00116938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14143 21:45:54.125 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14144 21:45:54.125 0.00144079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14145 21:45:54.125 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14146 21:45:54.125 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14147 21:45:54.125 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14148 21:45:54.125 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14149 21:45:54.125 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14150 21:45:54.125 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14151 21:45:54.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14152 21:45:54.125 0.00142854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14153 21:45:54.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14154 21:45:54.125 0.00120178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14155 21:45:54.125 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14156 21:45:54.125 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14157 21:45:54.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14158 21:45:54.125 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14159 21:45:54.125 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14160 21:45:54.125 0.00126578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14161 21:45:54.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14162 21:45:54.141 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14163 21:45:54.141 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14164 21:45:54.141 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14165 21:45:54.141 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14166 21:45:54.141 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14168 21:45:54.141 0.00117057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14169 21:45:54.141 0.00009165 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14170 21:45:54.141 0.00124405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14171 21:45:54.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14172 21:45:54.141 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14173 21:45:54.141 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14174 21:45:54.141 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14175 21:45:54.141 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14176 21:45:54.141 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14177 21:45:54.141 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14178 21:45:54.141 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14179 21:45:54.141 0.00003832 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14180 21:45:54.141 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14181 21:45:54.141 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14182 21:45:54.141 0.00135427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14183 21:45:54.156 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14184 21:45:54.156 0.00142854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14185 21:45:54.156 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14186 21:45:54.156 0.00104533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14187 21:45:54.156 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14188 21:45:54.156 0.00109274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14189 21:45:54.156 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14190 21:45:54.156 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14191 21:45:54.156 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14192 21:45:54.156 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14193 21:45:54.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14194 21:45:54.156 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14195 21:45:54.156 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14196 21:45:54.156 0.00124286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14197 21:45:54.156 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14198 21:45:54.156 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14199 21:45:54.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14200 21:45:54.156 0.00121916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14201 21:45:54.156 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14202 21:45:54.156 0.00151032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14203 21:45:54.172 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14204 21:45:54.172 0.00104849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14205 21:45:54.172 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14206 21:45:54.172 0.00118242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14207 21:45:54.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14208 21:45:54.172 0.00140800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14209 21:45:54.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14210 21:45:54.172 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14211 21:45:54.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14212 21:45:54.172 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14213 21:45:54.172 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14214 21:45:54.172 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14215 21:45:54.172 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14216 21:45:54.172 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14217 21:45:54.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14218 21:45:54.172 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14219 21:45:54.172 0.00006084 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14220 21:45:54.172 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14221 21:45:54.172 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14222 21:45:54.172 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14223 21:45:54.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14224 21:45:54.172 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14225 21:45:54.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14226 21:45:54.188 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14227 21:45:54.188 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14228 21:45:54.188 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14229 21:45:54.188 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14230 21:45:54.188 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14231 21:45:54.188 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14232 21:45:54.188 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14233 21:45:54.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14234 21:45:54.188 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14235 21:45:54.188 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14236 21:45:54.188 0.00149452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14237 21:45:54.188 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14238 21:45:54.188 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14239 21:45:54.188 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14240 21:45:54.188 0.00183111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14241 21:45:54.188 0.00001264 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 14242 21:45:54.188 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 14243 21:45:54.188 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 07 14244 21:45:54.188 0.00006795 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 14245 21:45:54.188 0.00006756 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 14246 21:45:54.188 0.00001936 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14247 21:45:54.188 0.00008059 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14248 21:45:54.188 0.00005057 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14249 21:45:54.188 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14250 21:45:54.188 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14251 21:45:54.188 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14252 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14253 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14254 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14255 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14256 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14257 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14258 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14259 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14260 21:45:54.188 0.00003753 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14261 21:45:54.188 0.00004188 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14262 21:45:54.188 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14263 21:45:54.188 0.00004425 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14264 21:45:54.188 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14265 21:45:54.188 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14266 21:45:54.188 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14267 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14268 21:45:54.188 0.00003279 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14269 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14270 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14271 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14272 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14273 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14274 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14275 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14276 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14277 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14278 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14279 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14280 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14281 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14282 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14283 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14284 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14285 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14286 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14287 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14288 21:45:54.188 0.00004069 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14289 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14290 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14291 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14292 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14293 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14294 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14295 21:45:54.188 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14296 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14297 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14298 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14299 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14300 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14301 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14302 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14303 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14304 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14305 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14306 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14307 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14308 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14309 21:45:54.188 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14310 21:45:54.188 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 14311 21:45:54.188 0.00026588 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 14312 21:45:54.188 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14313 21:45:54.188 0.00185995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14314 21:45:54.188 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14315 21:45:54.188 0.00166756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14316 21:45:54.203 0.00024336 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 14317 21:45:54.203 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14318 21:45:54.203 0.00023862 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 17 14319 21:45:54.203 0.00021373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14320 21:45:54.203 0.00018607 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 14321 21:45:54.203 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14322 21:45:54.203 0.00014696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14323 21:45:54.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14324 21:45:54.203 0.00018844 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 14325 21:45:54.203 0.00092840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14326 21:45:54.203 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14327 21:45:54.203 0.00497778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14328 21:45:54.203 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14329 21:45:54.203 0.00085728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14330 21:45:54.203 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14331 21:45:54.203 0.00101294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14332 21:45:54.203 0.00008533 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14333 21:45:54.203 0.00090114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14334 21:45:54.203 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14335 21:45:54.203 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14338 21:45:54.203 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14339 21:45:54.203 0.00134203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14340 21:45:54.203 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14341 21:45:54.203 0.00130489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14342 21:45:54.219 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14343 21:45:54.219 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14344 21:45:54.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14345 21:45:54.219 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14346 21:45:54.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14347 21:45:54.219 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14348 21:45:54.219 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14349 21:45:54.219 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14350 21:45:54.219 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14351 21:45:54.219 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14352 21:45:54.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14353 21:45:54.219 0.00139970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14354 21:45:54.219 0.00013906 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14355 21:45:54.219 0.00109511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14356 21:45:54.219 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14357 21:45:54.219 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14358 21:45:54.219 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14359 21:45:54.219 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14360 21:45:54.219 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14361 21:45:54.219 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14362 21:45:54.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14363 21:45:54.219 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14364 21:45:54.234 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14365 21:45:54.234 0.00128909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14366 21:45:54.234 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14367 21:45:54.234 0.00143210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14368 21:45:54.234 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14369 21:45:54.234 0.00110380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14370 21:45:54.234 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14371 21:45:54.234 0.00146765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14372 21:45:54.234 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14373 21:45:54.234 0.00107970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14374 21:45:54.234 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14375 21:45:54.234 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14376 21:45:54.234 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14377 21:45:54.234 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14378 21:45:54.234 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14379 21:45:54.234 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14380 21:45:54.234 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14381 21:45:54.234 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14382 21:45:54.234 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14383 21:45:54.234 0.00143565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14384 21:45:54.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14385 21:45:54.250 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14386 21:45:54.250 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14387 21:45:54.250 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14388 21:45:54.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14389 21:45:54.250 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14390 21:45:54.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14391 21:45:54.250 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14392 21:45:54.250 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14393 21:45:54.250 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14394 21:45:54.250 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14395 21:45:54.250 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14396 21:45:54.250 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14397 21:45:54.250 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14398 21:45:54.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14399 21:45:54.250 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14400 21:45:54.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14401 21:45:54.250 0.00140563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14402 21:45:54.250 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14403 21:45:54.250 0.00127565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14404 21:45:54.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14405 21:45:54.250 0.00135862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14406 21:45:54.266 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14407 21:45:54.266 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14408 21:45:54.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14409 21:45:54.266 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14410 21:45:54.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14411 21:45:54.266 0.00140761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14412 21:45:54.266 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14413 21:45:54.266 0.00120533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14414 21:45:54.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14415 21:45:54.266 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14416 21:45:54.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14417 21:45:54.266 0.00157353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14418 21:45:54.266 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14419 21:45:54.266 0.00111724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14420 21:45:54.266 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14421 21:45:54.266 0.00119822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14422 21:45:54.266 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14423 21:45:54.266 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14424 21:45:54.266 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14425 21:45:54.266 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14426 21:45:54.266 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14427 21:45:54.266 0.00141669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14428 21:45:54.282 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14429 21:45:54.282 0.00114844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14430 21:45:54.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14431 21:45:54.282 0.00134558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14432 21:45:54.282 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14433 21:45:54.282 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14434 21:45:54.282 0.00035635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14435 21:45:54.282 0.00100188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14436 21:45:54.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14437 21:45:54.282 0.00137956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14438 21:45:54.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14439 21:45:54.282 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14440 21:45:54.282 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14441 21:45:54.282 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14442 21:45:54.282 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14443 21:45:54.282 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14444 21:45:54.282 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14445 21:45:54.282 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14446 21:45:54.282 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14447 21:45:54.282 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14449 21:45:54.282 0.00118874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14450 21:45:54.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14451 21:45:54.297 0.00126104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14452 21:45:54.297 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14453 21:45:54.297 0.00139496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14454 21:45:54.297 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14455 21:45:54.297 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14456 21:45:54.297 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14457 21:45:54.297 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14458 21:45:54.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14459 21:45:54.297 0.00135190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14460 21:45:54.297 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14461 21:45:54.297 0.00140682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14462 21:45:54.297 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14463 21:45:54.297 0.00142657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14464 21:45:54.297 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 14465 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 14466 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 17 14467 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 14468 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 14469 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14470 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14471 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14472 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14473 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14474 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14475 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14476 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14477 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14478 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14479 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14480 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14481 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14482 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14483 21:45:54.297 0.00007230 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14484 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14485 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14486 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14487 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14488 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14489 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14490 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14491 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14492 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14493 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14494 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14495 21:45:54.297 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14496 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14497 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14498 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14499 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14500 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14501 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14502 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14503 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14504 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14505 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14506 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14507 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14508 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14509 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14510 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14511 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14512 21:45:54.297 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14513 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14514 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14515 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14516 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14517 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14518 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14519 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14520 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14521 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14522 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14523 21:45:54.297 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14524 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14525 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14526 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14527 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14528 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14529 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14530 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14531 21:45:54.297 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14532 21:45:54.297 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14533 21:45:54.297 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 14534 21:45:54.297 0.00022123 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 14535 21:45:54.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14536 21:45:54.297 0.00202272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14537 21:45:54.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14538 21:45:54.297 0.00215625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14539 21:45:54.313 0.00014420 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 14540 21:45:54.313 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14541 21:45:54.313 0.00013946 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 08 14542 21:45:54.313 0.00015407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14543 21:45:54.313 0.00013551 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 14544 21:45:54.313 0.00015842 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14545 21:45:54.313 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14546 21:45:54.313 0.00012247 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 14547 21:45:54.313 0.00006953 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14548 21:45:54.313 0.00008770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14549 21:45:54.313 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14550 21:45:54.313 0.00596267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14551 21:45:54.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14552 21:45:54.313 0.00098133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14553 21:45:54.313 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14554 21:45:54.313 0.00100938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14555 21:45:54.313 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14556 21:45:54.313 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14557 21:45:54.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14558 21:45:54.313 0.00111368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14559 21:45:54.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14560 21:45:54.313 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14561 21:45:54.313 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14562 21:45:54.313 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14563 21:45:54.313 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14564 21:45:54.313 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14565 21:45:54.329 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14566 21:45:54.329 0.00050528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14567 21:45:54.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14568 21:45:54.329 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14569 21:45:54.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14570 21:45:54.329 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14571 21:45:54.329 0.00009363 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14572 21:45:54.329 0.00119625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14573 21:45:54.329 0.00004504 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14574 21:45:54.329 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14575 21:45:54.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14576 21:45:54.329 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14577 21:45:54.329 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14578 21:45:54.329 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14579 21:45:54.329 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14580 21:45:54.329 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14581 21:45:54.329 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14582 21:45:54.329 0.00137284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14583 21:45:54.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14584 21:45:54.329 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14585 21:45:54.329 0.00011457 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14586 21:45:54.329 0.00116780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14587 21:45:54.344 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14588 21:45:54.344 0.00147753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14589 21:45:54.344 0.00012089 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14590 21:45:54.344 0.00116780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14591 21:45:54.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14592 21:45:54.344 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14593 21:45:54.344 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14594 21:45:54.344 0.00137640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14595 21:45:54.344 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14596 21:45:54.344 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14597 21:45:54.344 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14598 21:45:54.344 0.00116109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14599 21:45:54.344 0.00012365 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14600 21:45:54.344 0.00119980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14601 21:45:54.344 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14602 21:45:54.344 0.00143724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14603 21:45:54.344 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14604 21:45:54.344 0.00148069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14605 21:45:54.344 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14606 21:45:54.344 0.00116780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14607 21:45:54.360 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14608 21:45:54.360 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14609 21:45:54.360 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14610 21:45:54.360 0.00111368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14611 21:45:54.360 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14612 21:45:54.360 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14613 21:45:54.360 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14614 21:45:54.360 0.00115635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14615 21:45:54.360 0.00016237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14616 21:45:54.360 0.00115477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14617 21:45:54.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14618 21:45:54.360 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14619 21:45:54.360 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14620 21:45:54.360 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14621 21:45:54.360 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14622 21:45:54.360 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14623 21:45:54.360 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14624 21:45:54.360 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14625 21:45:54.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14626 21:45:54.360 0.00146726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14627 21:45:54.360 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14628 21:45:54.360 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14629 21:45:54.375 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14630 21:45:54.375 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14631 21:45:54.375 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14632 21:45:54.375 0.00117807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14633 21:45:54.375 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14634 21:45:54.375 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14635 21:45:54.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14636 21:45:54.375 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14637 21:45:54.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14638 21:45:54.375 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14639 21:45:54.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14640 21:45:54.375 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14641 21:45:54.375 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14642 21:45:54.375 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14643 21:45:54.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14644 21:45:54.375 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14645 21:45:54.375 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14646 21:45:54.375 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14647 21:45:54.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14648 21:45:54.375 0.00138193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14649 21:45:54.375 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14650 21:45:54.375 0.00153600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14651 21:45:54.391 0.00006716 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14652 21:45:54.391 0.00094775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14653 21:45:54.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14654 21:45:54.391 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14655 21:45:54.391 0.00009205 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14656 21:45:54.391 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14657 21:45:54.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14658 21:45:54.391 0.00133965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14659 21:45:54.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14660 21:45:54.391 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14661 21:45:54.391 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14662 21:45:54.391 0.00144040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14663 21:45:54.391 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14664 21:45:54.391 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14665 21:45:54.391 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14666 21:45:54.391 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14667 21:45:54.391 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14668 21:45:54.391 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14669 21:45:54.391 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14670 21:45:54.391 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14671 21:45:54.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14672 21:45:54.391 0.00152810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14673 21:45:54.407 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14674 21:45:54.407 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14675 21:45:54.407 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14676 21:45:54.407 0.00112395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14677 21:45:54.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14678 21:45:54.407 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14679 21:45:54.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14680 21:45:54.407 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14681 21:45:54.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14682 21:45:54.407 0.00138627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14683 21:45:54.407 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14684 21:45:54.407 0.00143407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14685 21:45:54.407 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14686 21:45:54.407 0.00173472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14687 21:45:54.407 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 14688 21:45:54.407 0.00001501 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 14689 21:45:54.407 0.00004701 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 08 14690 21:45:54.407 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 14691 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 14692 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14693 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14694 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14695 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14696 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14697 21:45:54.407 0.00002607 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14698 21:45:54.407 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14699 21:45:54.407 0.00004780 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14700 21:45:54.407 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14701 21:45:54.407 0.00001462 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14702 21:45:54.407 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14703 21:45:54.407 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14704 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14705 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14706 21:45:54.407 0.00005057 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14707 21:45:54.407 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14708 21:45:54.407 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14709 21:45:54.407 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14711 21:45:54.407 0.00001422 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14712 21:45:54.407 0.00003595 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14713 21:45:54.407 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14714 21:45:54.407 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14715 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14716 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14717 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14718 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14719 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14720 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14721 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14722 21:45:54.407 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14723 21:45:54.407 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14724 21:45:54.407 0.00004859 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14726 21:45:54.407 0.00001343 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14727 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14728 21:45:54.407 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14729 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14730 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14731 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14732 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14733 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14734 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14735 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14736 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14737 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14738 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14739 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14740 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14741 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14742 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14743 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14744 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14745 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14746 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14747 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14748 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14749 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14750 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14751 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14752 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14753 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14754 21:45:54.407 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14755 21:45:54.407 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14756 21:45:54.407 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 14757 21:45:54.407 0.00014933 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 14758 21:45:54.407 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14759 21:45:54.407 0.00190459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14760 21:45:54.407 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14761 21:45:54.407 0.00204603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14762 21:45:54.422 0.00019437 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 14763 21:45:54.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14764 21:45:54.422 0.00027654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14765 21:45:54.422 0.00019437 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 18 14766 21:45:54.422 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14767 21:45:54.422 0.00037965 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14768 21:45:54.422 0.00031012 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 14769 21:45:54.422 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14770 21:45:54.422 0.00027536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14771 21:45:54.422 0.00024257 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 14772 21:45:54.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14773 21:45:54.422 0.00584889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14774 21:45:54.422 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14775 21:45:54.422 0.00096356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14776 21:45:54.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14777 21:45:54.422 0.00099753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14778 21:45:54.422 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14779 21:45:54.422 0.00085175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14780 21:45:54.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14781 21:45:54.422 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14782 21:45:54.422 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14783 21:45:54.422 0.00138746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14784 21:45:54.422 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14785 21:45:54.422 0.00125314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14786 21:45:54.438 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14787 21:45:54.438 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14788 21:45:54.438 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14789 21:45:54.438 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14790 21:45:54.438 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14791 21:45:54.438 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14792 21:45:54.438 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14793 21:45:54.438 0.00142736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14794 21:45:54.438 0.00010627 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14795 21:45:54.438 0.00111684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14796 21:45:54.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14797 21:45:54.438 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14798 21:45:54.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14799 21:45:54.438 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14800 21:45:54.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14801 21:45:54.438 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14802 21:45:54.438 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14803 21:45:54.438 0.00126894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14804 21:45:54.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14805 21:45:54.438 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14806 21:45:54.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14807 21:45:54.438 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14808 21:45:54.454 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14809 21:45:54.454 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14810 21:45:54.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14811 21:45:54.454 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14812 21:45:54.454 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14813 21:45:54.454 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14814 21:45:54.454 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14815 21:45:54.454 0.00094183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14816 21:45:54.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14817 21:45:54.454 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14818 21:45:54.454 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14819 21:45:54.454 0.00122706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14820 21:45:54.454 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14821 21:45:54.454 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14822 21:45:54.454 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14823 21:45:54.454 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14824 21:45:54.454 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14825 21:45:54.454 0.00142657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14826 21:45:54.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14827 21:45:54.454 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14828 21:45:54.454 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14829 21:45:54.454 0.00141788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14830 21:45:54.469 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14831 21:45:54.469 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14832 21:45:54.469 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14833 21:45:54.469 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14834 21:45:54.469 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14835 21:45:54.469 0.00141195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14836 21:45:54.469 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14837 21:45:54.469 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14838 21:45:54.469 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14839 21:45:54.469 0.00116899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14840 21:45:54.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14841 21:45:54.469 0.00123180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14842 21:45:54.469 0.00009877 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14843 21:45:54.469 0.00117768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14844 21:45:54.469 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14845 21:45:54.469 0.00122509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14846 21:45:54.469 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14847 21:45:54.469 0.00122548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14848 21:45:54.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14849 21:45:54.469 0.00135190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14850 21:45:54.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14851 21:45:54.469 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14852 21:45:54.485 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14853 21:45:54.485 0.00147082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14854 21:45:54.485 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14855 21:45:54.485 0.00138825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14856 21:45:54.485 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14857 21:45:54.485 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14858 21:45:54.485 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14859 21:45:54.485 0.00158538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14860 21:45:54.485 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14861 21:45:54.485 0.00096277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14862 21:45:54.485 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14863 21:45:54.485 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14864 21:45:54.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14865 21:45:54.485 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14866 21:45:54.485 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14867 21:45:54.485 0.00113975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14868 21:45:54.485 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14869 21:45:54.485 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14870 21:45:54.485 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14871 21:45:54.485 0.00140840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14872 21:45:54.501 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14873 21:45:54.501 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14874 21:45:54.501 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14875 21:45:54.501 0.00134558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14876 21:45:54.501 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14877 21:45:54.501 0.00119348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14878 21:45:54.501 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14879 21:45:54.501 0.00142894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14880 21:45:54.501 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14881 21:45:54.501 0.00143882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14882 21:45:54.501 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14883 21:45:54.501 0.00109314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14884 21:45:54.501 0.00006637 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14885 21:45:54.501 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14886 21:45:54.501 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14887 21:45:54.501 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14888 21:45:54.501 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14889 21:45:54.501 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14890 21:45:54.501 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14891 21:45:54.501 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14892 21:45:54.501 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14893 21:45:54.501 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14894 21:45:54.516 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14895 21:45:54.516 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14896 21:45:54.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14897 21:45:54.516 0.00132978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14898 21:45:54.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14899 21:45:54.516 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14900 21:45:54.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14901 21:45:54.516 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14902 21:45:54.516 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14903 21:45:54.516 0.00122390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14904 21:45:54.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14905 21:45:54.516 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14906 21:45:54.516 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14907 21:45:54.516 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14908 21:45:54.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14909 21:45:54.516 0.00171259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14910 21:45:54.516 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 14911 21:45:54.516 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 14912 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 18 14913 21:45:54.516 0.00006005 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 14914 21:45:54.516 0.00003358 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 14915 21:45:54.516 0.00003911 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14916 21:45:54.516 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14917 21:45:54.516 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14918 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14919 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14920 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14921 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14922 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14923 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14924 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14925 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14926 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14927 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14928 21:45:54.516 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14929 21:45:54.516 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14930 21:45:54.516 0.00001738 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14931 21:45:54.516 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14932 21:45:54.516 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14933 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14934 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14935 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14936 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14937 21:45:54.516 0.00003951 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14938 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14939 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14940 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14941 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14942 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14943 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14944 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14945 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14946 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14947 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14948 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14949 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14950 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14951 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14952 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14953 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14954 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14955 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14956 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14957 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14958 21:45:54.516 0.00002410 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14959 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14960 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14961 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14962 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14963 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14964 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14965 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14966 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14967 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14968 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14969 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14970 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14971 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14972 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14973 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14974 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14975 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14976 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14977 21:45:54.516 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14978 21:45:54.516 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 14979 21:45:54.516 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 14980 21:45:54.516 0.00023625 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 14981 21:45:54.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14982 21:45:54.516 0.00191803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14983 21:45:54.516 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14984 21:45:54.516 0.00156128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14985 21:45:54.532 0.00022874 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 14986 21:45:54.532 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14987 21:45:54.532 0.00028168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14988 21:45:54.532 0.00025719 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 08 14989 21:45:54.532 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14990 21:45:54.532 0.00036780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14991 21:45:54.532 0.00032948 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 14992 21:45:54.532 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14993 21:45:54.532 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 14994 21:45:54.532 0.00000000 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 Length: 1, Data: 40 14997 21:45:54.532 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 14998 21:45:54.532 0.00115082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 14999 21:45:54.532 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15000 21:45:54.532 0.00097738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15001 21:45:54.532 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15002 21:45:54.532 0.00094262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15003 21:45:54.532 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15004 21:45:54.532 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15005 21:45:54.532 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15007 21:45:54.532 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15008 21:45:54.532 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15009 21:45:54.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15010 21:45:54.547 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15011 21:45:54.547 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15012 21:45:54.547 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15013 21:45:54.547 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15014 21:45:54.547 0.00128869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15015 21:45:54.547 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15016 21:45:54.547 0.00150005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15017 21:45:54.547 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15018 21:45:54.547 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15019 21:45:54.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15020 21:45:54.547 0.00135427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15021 21:45:54.547 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15022 21:45:54.547 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15023 21:45:54.547 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15024 21:45:54.547 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15025 21:45:54.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15026 21:45:54.547 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15027 21:45:54.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15028 21:45:54.547 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15029 21:45:54.547 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15030 21:45:54.562 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15031 21:45:54.562 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15032 21:45:54.562 0.00111644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15033 21:45:54.562 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15034 21:45:54.562 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15035 21:45:54.562 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15036 21:45:54.562 0.00115398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15037 21:45:54.562 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15038 21:45:54.562 0.00142894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15039 21:45:54.562 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15040 21:45:54.562 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15041 21:45:54.562 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15042 21:45:54.562 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15043 21:45:54.562 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15044 21:45:54.562 0.00125314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15045 21:45:54.562 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15046 21:45:54.562 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15047 21:45:54.562 0.00010706 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15048 21:45:54.562 0.00139931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15049 21:45:54.562 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15050 21:45:54.562 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15051 21:45:54.578 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15052 21:45:54.578 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15053 21:45:54.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15054 21:45:54.578 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15055 21:45:54.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15056 21:45:54.578 0.00141590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15057 21:45:54.578 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15058 21:45:54.578 0.00140484 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15059 21:45:54.578 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15060 21:45:54.578 0.00110933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15061 21:45:54.578 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15062 21:45:54.578 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15063 21:45:54.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15064 21:45:54.578 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15065 21:45:54.578 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15066 21:45:54.578 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15067 21:45:54.578 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15068 21:45:54.578 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15069 21:45:54.578 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15070 21:45:54.578 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15071 21:45:54.578 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15072 21:45:54.578 0.00110222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15073 21:45:54.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15074 21:45:54.594 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15075 21:45:54.594 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15076 21:45:54.594 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15077 21:45:54.594 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15078 21:45:54.594 0.00142341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15079 21:45:54.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15080 21:45:54.594 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15081 21:45:54.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15082 21:45:54.594 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15083 21:45:54.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15084 21:45:54.594 0.00114094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15085 21:45:54.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15086 21:45:54.594 0.00123852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15087 21:45:54.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15088 21:45:54.594 0.00143645 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15089 21:45:54.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15090 21:45:54.594 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15091 21:45:54.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15092 21:45:54.594 0.00119151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15093 21:45:54.594 0.00016593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15094 21:45:54.594 0.00140365 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15095 21:45:54.609 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15096 21:45:54.609 0.00127328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15097 21:45:54.609 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15098 21:45:54.609 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15099 21:45:54.609 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15100 21:45:54.609 0.00137244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15101 21:45:54.609 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15102 21:45:54.609 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15103 21:45:54.609 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15104 21:45:54.609 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15105 21:45:54.609 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15106 21:45:54.609 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15107 21:45:54.609 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15108 21:45:54.609 0.00142143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15109 21:45:54.609 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15110 21:45:54.609 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15111 21:45:54.609 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15112 21:45:54.609 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15113 21:45:54.609 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15114 21:45:54.609 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15115 21:45:54.609 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15116 21:45:54.609 0.00143724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15117 21:45:54.625 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15118 21:45:54.625 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15119 21:45:54.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15120 21:45:54.625 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15121 21:45:54.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15122 21:45:54.625 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15123 21:45:54.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15124 21:45:54.625 0.00137403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15125 21:45:54.625 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15126 21:45:54.625 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15127 21:45:54.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15128 21:45:54.625 0.00125511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15129 21:45:54.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15130 21:45:54.625 0.00152415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15131 21:45:54.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15132 21:45:54.625 0.00159763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15133 21:45:54.625 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 15134 21:45:54.625 0.00005175 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 15135 21:45:54.625 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 08 15136 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 15137 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 15138 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15139 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15140 21:45:54.625 0.00004622 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15141 21:45:54.625 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15142 21:45:54.625 0.00007625 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15143 21:45:54.625 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15144 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15145 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15146 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15147 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15148 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15149 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15150 21:45:54.625 0.00001738 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15151 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15152 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15153 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15154 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15155 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15156 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15157 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15158 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15159 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15160 21:45:54.625 0.00002212 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15161 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15162 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15163 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15164 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15165 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15166 21:45:54.625 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15167 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15168 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15169 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15170 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15171 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15172 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15173 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15174 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15175 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15176 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15177 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15178 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15179 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15180 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15181 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15182 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15183 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15184 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15185 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15186 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15187 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15188 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15189 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15190 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15191 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15192 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15193 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15194 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15195 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15196 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15197 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15198 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15199 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15200 21:45:54.625 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15201 21:45:54.625 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15202 21:45:54.625 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 15203 21:45:54.625 0.00023111 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 15204 21:45:54.625 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15205 21:45:54.625 0.00186627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15206 21:45:54.625 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15207 21:45:54.625 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15208 21:45:54.641 0.00041442 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 15209 21:45:54.641 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15210 21:45:54.641 0.00052267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15211 21:45:54.641 0.00039901 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 18 15212 21:45:54.641 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15213 21:45:54.641 0.00027891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15214 21:45:54.641 0.00017936 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 15215 21:45:54.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15216 21:45:54.641 0.00033106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15217 21:45:54.641 0.00033462 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 15218 21:45:54.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15219 21:45:54.641 0.00462855 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15220 21:45:54.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15221 21:45:54.641 0.00105877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15223 21:45:54.641 0.00094854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15224 21:45:54.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15225 21:45:54.641 0.00109867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15226 21:45:54.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15227 21:45:54.641 0.00139101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15228 21:45:54.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15229 21:45:54.641 0.00124168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15230 21:45:54.641 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15231 21:45:54.641 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15232 21:45:54.641 0.00008731 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15233 21:45:54.641 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15234 21:45:54.656 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15235 21:45:54.656 0.00152494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15236 21:45:54.656 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15237 21:45:54.656 0.00110301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15238 21:45:54.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15239 21:45:54.656 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15240 21:45:54.656 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15241 21:45:54.656 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15242 21:45:54.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15243 21:45:54.656 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15244 21:45:54.656 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15245 21:45:54.656 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15246 21:45:54.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15247 21:45:54.656 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15248 21:45:54.656 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15249 21:45:54.656 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15250 21:45:54.656 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15251 21:45:54.656 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15252 21:45:54.656 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15253 21:45:54.656 0.00123852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15254 21:45:54.656 0.00056928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15255 21:45:54.673 0.00311625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15256 21:45:54.673 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15257 21:45:54.673 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15258 21:45:54.673 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15259 21:45:54.673 0.00017936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15260 21:45:54.673 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15261 21:45:54.673 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15262 21:45:54.673 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15263 21:45:54.673 0.00120889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15264 21:45:54.673 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15265 21:45:54.673 0.00147714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15266 21:45:54.673 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15267 21:45:54.673 0.00122193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15268 21:45:54.673 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15269 21:45:54.673 0.00147674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15270 21:45:54.673 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15271 21:45:54.673 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15272 21:45:54.673 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15273 21:45:54.673 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15274 21:45:54.673 0.00009284 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15275 21:45:54.673 0.00124128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15276 21:45:54.688 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15277 21:45:54.688 0.00145027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15278 21:45:54.688 0.00016593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15279 21:45:54.688 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15280 21:45:54.688 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15281 21:45:54.688 0.00115872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15282 21:45:54.688 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15283 21:45:54.688 0.00118400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15284 21:45:54.688 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15285 21:45:54.688 0.00143763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15286 21:45:54.688 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15287 21:45:54.688 0.00117254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15288 21:45:54.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15289 21:45:54.688 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15290 21:45:54.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15291 21:45:54.688 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15292 21:45:54.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15293 21:45:54.688 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15294 21:45:54.688 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15295 21:45:54.688 0.00152336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15296 21:45:54.688 0.00003832 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15297 21:45:54.688 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15298 21:45:54.703 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15299 21:45:54.703 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15300 21:45:54.703 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15301 21:45:54.703 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15302 21:45:54.703 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15303 21:45:54.703 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15304 21:45:54.703 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15305 21:45:54.703 0.00122785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15306 21:45:54.703 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15307 21:45:54.703 0.00124168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15308 21:45:54.703 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15309 21:45:54.703 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15310 21:45:54.703 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15311 21:45:54.703 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15312 21:45:54.703 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15313 21:45:54.703 0.00151072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15314 21:45:54.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15315 21:45:54.703 0.00115082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15316 21:45:54.703 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15317 21:45:54.703 0.00131793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15318 21:45:54.703 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15319 21:45:54.703 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15320 21:45:54.719 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15321 21:45:54.719 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15322 21:45:54.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15323 21:45:54.719 0.00143684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15324 21:45:54.719 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15325 21:45:54.719 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15326 21:45:54.719 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15327 21:45:54.719 0.00121561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15328 21:45:54.719 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15329 21:45:54.719 0.00146607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15330 21:45:54.719 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15331 21:45:54.719 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15332 21:45:54.719 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15333 21:45:54.719 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15334 21:45:54.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15335 21:45:54.719 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15336 21:45:54.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15337 21:45:54.719 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15338 21:45:54.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15339 21:45:54.719 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15340 21:45:54.719 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15341 21:45:54.719 0.00139536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15342 21:45:54.735 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15343 21:45:54.735 0.00143091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15344 21:45:54.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15345 21:45:54.735 0.00121205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15346 21:45:54.735 0.00010430 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15347 21:45:54.735 0.00122825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15348 21:45:54.735 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15349 21:45:54.735 0.00160948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15350 21:45:54.735 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15351 21:45:54.735 0.00091852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15352 21:45:54.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15353 21:45:54.735 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15354 21:45:54.735 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15355 21:45:54.735 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15356 21:45:54.735 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 15357 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 15358 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 18 15359 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 15360 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 15361 21:45:54.735 0.00004504 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15362 21:45:54.735 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15363 21:45:54.735 0.00002094 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15364 21:45:54.735 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15365 21:45:54.735 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15366 21:45:54.735 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15367 21:45:54.735 0.00001501 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15368 21:45:54.735 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15369 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15370 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15371 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15372 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15373 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15374 21:45:54.735 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15375 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15376 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15377 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15378 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15379 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15380 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15381 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15382 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15383 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15384 21:45:54.735 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15385 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15386 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15387 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15388 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15389 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15390 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15391 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15392 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15393 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15394 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15395 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15396 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15397 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15398 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15399 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15400 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15401 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15402 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15403 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15404 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15405 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15406 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15407 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15408 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15409 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15410 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15411 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15412 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15413 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15414 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15415 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15416 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15417 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15418 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15419 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15420 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15421 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15422 21:45:54.735 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15423 21:45:54.735 0.00004425 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15424 21:45:54.735 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15425 21:45:54.735 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 15426 21:45:54.735 0.00021294 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 15427 21:45:54.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15428 21:45:54.735 0.00198874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15429 21:45:54.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15430 21:45:54.735 0.00242449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15431 21:45:54.750 0.00028286 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 15432 21:45:54.750 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15433 21:45:54.750 0.00024928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15434 21:45:54.750 0.00017501 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 08 15435 21:45:54.750 0.00118953 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 15436 21:45:54.750 0.00105126 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15437 21:45:54.750 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15438 21:45:54.750 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15439 21:45:54.750 0.00026864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15440 21:45:54.750 0.00018884 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 15441 21:45:54.750 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15442 21:45:54.750 0.00490074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15443 21:45:54.750 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15444 21:45:54.750 0.00097975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15445 21:45:54.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15446 21:45:54.750 0.00107852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15447 21:45:54.750 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15448 21:45:54.750 0.00097817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15449 21:45:54.750 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15450 21:45:54.750 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15451 21:45:54.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15452 21:45:54.750 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15453 21:45:54.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15454 21:45:54.750 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15455 21:45:54.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15456 21:45:54.750 0.00146370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15457 21:45:54.766 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15458 21:45:54.766 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15459 21:45:54.766 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15460 21:45:54.766 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15461 21:45:54.766 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15462 21:45:54.766 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15463 21:45:54.766 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15464 21:45:54.766 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15465 21:45:54.766 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15466 21:45:54.766 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15467 21:45:54.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15468 21:45:54.766 0.00123575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15469 21:45:54.766 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15470 21:45:54.766 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15471 21:45:54.766 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15472 21:45:54.766 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15473 21:45:54.766 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15474 21:45:54.766 0.00143052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15475 21:45:54.766 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15476 21:45:54.766 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15477 21:45:54.766 0.00007783 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15478 21:45:54.766 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15479 21:45:54.782 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15480 21:45:54.782 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15481 21:45:54.782 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15482 21:45:54.782 0.00116188 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15483 21:45:54.782 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15484 21:45:54.782 0.00142380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15485 21:45:54.782 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15486 21:45:54.782 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15487 21:45:54.782 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15488 21:45:54.782 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15489 21:45:54.782 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15490 21:45:54.782 0.00147358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15491 21:45:54.782 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15492 21:45:54.782 0.00110538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15493 21:45:54.782 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15494 21:45:54.782 0.00114726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15495 21:45:54.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15496 21:45:54.782 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15497 21:45:54.782 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15498 21:45:54.782 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15499 21:45:54.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15500 21:45:54.797 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15501 21:45:54.797 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15502 21:45:54.797 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15503 21:45:54.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15504 21:45:54.797 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15505 21:45:54.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15506 21:45:54.797 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15507 21:45:54.797 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15508 21:45:54.797 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15509 21:45:54.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15510 21:45:54.797 0.00122943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15511 21:45:54.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15512 21:45:54.797 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15513 21:45:54.797 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15514 21:45:54.797 0.00151585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15515 21:45:54.797 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15516 21:45:54.797 0.00103625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15517 21:45:54.797 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15518 21:45:54.797 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15519 21:45:54.797 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15520 21:45:54.797 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15521 21:45:54.813 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15522 21:45:54.813 0.00130489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15523 21:45:54.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15524 21:45:54.813 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15525 21:45:54.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15526 21:45:54.813 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15527 21:45:54.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15528 21:45:54.813 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15529 21:45:54.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15530 21:45:54.813 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15531 21:45:54.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15532 21:45:54.813 0.00138627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15533 21:45:54.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15534 21:45:54.813 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15535 21:45:54.813 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15536 21:45:54.813 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15537 21:45:54.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15538 21:45:54.813 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15539 21:45:54.813 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15540 21:45:54.813 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15541 21:45:54.813 0.00014973 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15542 21:45:54.813 0.00113580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15543 21:45:54.829 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15544 21:45:54.829 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15545 21:45:54.829 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15546 21:45:54.829 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15547 21:45:54.829 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15548 21:45:54.829 0.00139536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15549 21:45:54.829 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15550 21:45:54.829 0.00142973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15551 21:45:54.829 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15552 21:45:54.829 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15553 21:45:54.829 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15554 21:45:54.829 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15555 21:45:54.829 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15556 21:45:54.829 0.00143605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15557 21:45:54.829 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15558 21:45:54.829 0.00155338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15559 21:45:54.829 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15560 21:45:54.829 0.00106074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15561 21:45:54.829 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15562 21:45:54.829 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15563 21:45:54.829 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15564 21:45:54.829 0.00130489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15565 21:45:54.844 0.00006558 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15566 21:45:54.844 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15567 21:45:54.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15568 21:45:54.844 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15569 21:45:54.844 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15570 21:45:54.844 0.00143645 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15571 21:45:54.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15572 21:45:54.844 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15573 21:45:54.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15574 21:45:54.844 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15575 21:45:54.844 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15576 21:45:54.844 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15577 21:45:54.844 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15578 21:45:54.844 0.00151111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15579 21:45:54.844 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 15580 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 15581 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 08 15582 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 15583 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 15584 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15585 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15586 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15587 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15588 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15589 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15590 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15591 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15592 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15593 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15594 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15595 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15596 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15597 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15598 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15599 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15600 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15601 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15602 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15603 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15604 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15605 21:45:54.844 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15606 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15607 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15608 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15609 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15610 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15611 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15612 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15613 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15614 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15615 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15616 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15617 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15618 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15619 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15620 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15621 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15622 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15623 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15624 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15625 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15626 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15627 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15628 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15629 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15630 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15631 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15632 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15633 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15634 21:45:54.844 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15635 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15636 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15637 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15638 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15639 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15640 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15641 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15642 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15643 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15644 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15645 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15646 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15647 21:45:54.844 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15648 21:45:54.844 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 15649 21:45:54.844 0.00020148 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 15650 21:45:54.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15651 21:45:54.844 0.00201679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15652 21:45:54.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15653 21:45:54.844 0.00256632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15654 21:45:54.860 0.00025323 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 15655 21:45:54.860 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15656 21:45:54.860 0.00031723 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15657 21:45:54.860 0.00026232 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 18 15658 21:45:54.860 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15659 21:45:54.860 0.00023980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15660 21:45:54.860 0.00018647 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 15661 21:45:54.860 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15662 21:45:54.860 0.00024099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15663 21:45:54.860 0.00016632 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 15664 21:45:54.860 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15665 21:45:54.860 0.00480395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15666 21:45:54.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15667 21:45:54.860 0.00098054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15668 21:45:54.860 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15669 21:45:54.860 0.00101610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15670 21:45:54.860 0.00008336 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15671 21:45:54.860 0.00088652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15672 21:45:54.860 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15673 21:45:54.860 0.00120217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15674 21:45:54.860 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15675 21:45:54.860 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15676 21:45:54.860 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15677 21:45:54.860 0.00146015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15678 21:45:54.860 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15679 21:45:54.860 0.00116464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15680 21:45:54.876 0.00006281 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15681 21:45:54.876 0.00117412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15682 21:45:54.876 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15683 21:45:54.876 0.00126064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15684 21:45:54.876 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15685 21:45:54.876 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15686 21:45:54.876 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15687 21:45:54.876 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15688 21:45:54.876 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15689 21:45:54.876 0.00150124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15690 21:45:54.876 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15691 21:45:54.876 0.00108603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15692 21:45:54.876 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15693 21:45:54.876 0.00155141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15694 21:45:54.876 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15695 21:45:54.876 0.00120415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15696 21:45:54.876 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15697 21:45:54.876 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15698 21:45:54.876 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15699 21:45:54.876 0.00149847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15700 21:45:54.876 0.00020662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15701 21:45:54.891 0.00110341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15702 21:45:54.891 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15703 21:45:54.891 0.00107970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15704 21:45:54.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15705 21:45:54.891 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15706 21:45:54.891 0.00007862 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15707 21:45:54.891 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15708 21:45:54.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15709 21:45:54.891 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15710 21:45:54.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15711 21:45:54.891 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15712 21:45:54.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15713 21:45:54.891 0.00137126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15714 21:45:54.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15715 21:45:54.891 0.00146449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15716 21:45:54.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15717 21:45:54.891 0.00140326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15718 21:45:54.891 0.00010627 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15719 21:45:54.891 0.00119111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15720 21:45:54.891 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15721 21:45:54.891 0.00139062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15722 21:45:54.907 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15723 21:45:54.907 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15724 21:45:54.907 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15725 21:45:54.907 0.00089758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15726 21:45:54.907 0.00014262 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15727 21:45:54.907 0.00100859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15728 21:45:54.907 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15729 21:45:54.907 0.00131556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15730 21:45:54.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15731 21:45:54.907 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15732 21:45:54.907 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15733 21:45:54.907 0.00121916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15734 21:45:54.907 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15735 21:45:54.907 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15736 21:45:54.907 0.00007941 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15737 21:45:54.907 0.00120336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15738 21:45:54.907 0.00005096 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15739 21:45:54.907 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15740 21:45:54.907 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15741 21:45:54.907 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15742 21:45:54.907 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15743 21:45:54.907 0.00142578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15744 21:45:54.923 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15745 21:45:54.923 0.00118519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15746 21:45:54.923 0.00017383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15747 21:45:54.923 0.00119309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15748 21:45:54.923 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15749 21:45:54.923 0.00120533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15750 21:45:54.923 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15751 21:45:54.923 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15752 21:45:54.923 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15753 21:45:54.923 0.00111961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15754 21:45:54.923 0.00010904 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15755 21:45:54.923 0.00108168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15756 21:45:54.923 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15757 21:45:54.923 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15758 21:45:54.923 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15759 21:45:54.923 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15760 21:45:54.923 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15761 21:45:54.923 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15762 21:45:54.923 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15763 21:45:54.923 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15764 21:45:54.923 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15765 21:45:54.923 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15766 21:45:54.937 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15767 21:45:54.937 0.00127526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15768 21:45:54.937 0.00011141 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15769 21:45:54.937 0.00149175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15770 21:45:54.937 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15771 21:45:54.937 0.00110262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15772 21:45:54.937 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15773 21:45:54.937 0.00121719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15774 21:45:54.937 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15775 21:45:54.937 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15776 21:45:54.937 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15777 21:45:54.937 0.00145027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15778 21:45:54.937 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15779 21:45:54.937 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15780 21:45:54.937 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15781 21:45:54.937 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15782 21:45:54.937 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15783 21:45:54.937 0.00126183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15784 21:45:54.937 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15785 21:45:54.937 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15786 21:45:54.953 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15787 21:45:54.953 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15788 21:45:54.953 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15789 21:45:54.953 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15790 21:45:54.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15791 21:45:54.953 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15792 21:45:54.953 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15793 21:45:54.953 0.00113778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15794 21:45:54.953 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15795 21:45:54.953 0.00125630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15796 21:45:54.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15797 21:45:54.953 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15798 21:45:54.953 0.00015565 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15799 21:45:54.953 0.00114963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15800 21:45:54.953 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15801 21:45:54.953 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15802 21:45:54.953 0.00001462 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 15803 21:45:54.953 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 15804 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 18 15805 21:45:54.953 0.00001422 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 15806 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 15807 21:45:54.953 0.00001857 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15808 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15809 21:45:54.953 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15810 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15811 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15812 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15813 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15814 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15815 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15816 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15817 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15818 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15819 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15820 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15821 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15822 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15823 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15824 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15825 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15826 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15827 21:45:54.953 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15828 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15829 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15830 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15831 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15832 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15833 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15834 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15835 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15836 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15837 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15838 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15839 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15840 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15841 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15842 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15843 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15844 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15845 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15846 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15847 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15848 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15849 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15850 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15851 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15852 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15853 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15854 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15855 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15856 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15857 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15858 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15859 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15860 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15861 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15862 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15863 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15864 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15865 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15866 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15867 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15868 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15869 21:45:54.953 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15870 21:45:54.953 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 15871 21:45:54.953 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 15872 21:45:54.953 0.00017738 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 15873 21:45:54.953 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15874 21:45:54.953 0.00186074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15875 21:45:54.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15876 21:45:54.953 0.00188563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15877 21:45:54.969 0.00016079 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 15878 21:45:54.969 0.00016632 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 08 15879 21:45:54.969 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15880 21:45:54.969 0.00013274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15881 21:45:54.969 0.00021254 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 15882 21:45:54.969 0.00008849 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15883 21:45:54.969 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15884 21:45:54.969 0.00022756 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 15885 21:45:54.969 0.00010193 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15886 21:45:54.969 0.00018528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15887 21:45:54.969 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15888 21:45:54.969 0.00616139 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15889 21:45:54.969 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15890 21:45:54.969 0.00098686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15891 21:45:54.969 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15892 21:45:54.969 0.00102716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15893 21:45:54.969 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15894 21:45:54.969 0.00106548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15895 21:45:54.969 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15896 21:45:54.969 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15897 21:45:54.969 0.00005373 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15898 21:45:54.969 0.00117452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15899 21:45:54.969 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15900 21:45:54.969 0.00125946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15901 21:45:54.969 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15902 21:45:54.969 0.00144277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15903 21:45:54.984 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15904 21:45:54.984 0.00108326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15905 21:45:54.984 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15906 21:45:54.984 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15907 21:45:54.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15908 21:45:54.984 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15909 21:45:54.984 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15910 21:45:54.984 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15911 21:45:54.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15912 21:45:54.984 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15913 21:45:54.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15914 21:45:54.984 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15915 21:45:54.984 0.00007348 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15916 21:45:54.984 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15917 21:45:54.984 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15918 21:45:54.984 0.00117649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15919 21:45:54.984 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15920 21:45:54.984 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15921 21:45:54.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15922 21:45:54.984 0.00122232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15923 21:45:55.000 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15924 21:45:55.000 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15925 21:45:55.000 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15926 21:45:55.000 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15927 21:45:55.000 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15928 21:45:55.000 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15929 21:45:55.000 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15930 21:45:55.000 0.00097620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15931 21:45:55.000 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15932 21:45:55.000 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15933 21:45:55.000 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15934 21:45:55.000 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15935 21:45:55.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15936 21:45:55.000 0.00139733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15937 21:45:55.000 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15938 21:45:55.000 0.00118203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15939 21:45:55.000 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15940 21:45:55.000 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15941 21:45:55.000 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15942 21:45:55.000 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15943 21:45:55.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15944 21:45:55.000 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15945 21:45:55.016 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15946 21:45:55.016 0.00110301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15947 21:45:55.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15948 21:45:55.016 0.00144790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15949 21:45:55.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15950 21:45:55.016 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15951 21:45:55.016 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15952 21:45:55.016 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15953 21:45:55.016 0.00019319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15954 21:45:55.016 0.00114133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15955 21:45:55.016 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15956 21:45:55.016 0.00139536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15957 21:45:55.016 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15958 21:45:55.016 0.00106311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15959 21:45:55.016 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15960 21:45:55.016 0.00136849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15961 21:45:55.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15962 21:45:55.016 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15963 21:45:55.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15964 21:45:55.016 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15965 21:45:55.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15966 21:45:55.016 0.00137284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15967 21:45:55.031 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15968 21:45:55.031 0.00143645 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15969 21:45:55.031 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15970 21:45:55.031 0.00122193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15971 21:45:55.031 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15972 21:45:55.031 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15973 21:45:55.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15974 21:45:55.031 0.00145541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15975 21:45:55.031 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15976 21:45:55.031 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15977 21:45:55.031 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15978 21:45:55.031 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15979 21:45:55.031 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15980 21:45:55.031 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15981 21:45:55.031 0.00011536 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15982 21:45:55.031 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15983 21:45:55.031 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15984 21:45:55.031 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15985 21:45:55.031 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15986 21:45:55.031 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15987 21:45:55.031 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15988 21:45:55.031 0.00125432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15989 21:45:55.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15990 21:45:55.047 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15991 21:45:55.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15992 21:45:55.047 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15993 21:45:55.047 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15994 21:45:55.047 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15995 21:45:55.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15996 21:45:55.047 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15997 21:45:55.047 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 15998 21:45:55.047 0.00131793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 15999 21:45:55.047 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16000 21:45:55.047 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16001 21:45:55.047 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16002 21:45:55.047 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16003 21:45:55.047 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16004 21:45:55.047 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16005 21:45:55.047 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16006 21:45:55.047 0.00136059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16007 21:45:55.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16008 21:45:55.047 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16009 21:45:55.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16010 21:45:55.063 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16011 21:45:55.063 0.00011536 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16012 21:45:55.063 0.00119546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16013 21:45:55.063 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16014 21:45:55.063 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16015 21:45:55.063 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16016 21:45:55.063 0.00118795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16017 21:45:55.063 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16018 21:45:55.063 0.00133886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16019 21:45:55.063 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16020 21:45:55.063 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16021 21:45:55.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16022 21:45:55.063 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16023 21:45:55.063 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16024 21:45:55.063 0.00100346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16025 21:45:55.063 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 16026 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 16027 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 08 16028 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 16029 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 16030 21:45:55.063 0.00009877 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16031 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16032 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16033 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16034 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16035 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16036 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16037 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16038 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16039 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16040 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16041 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16042 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16043 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16044 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16045 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16046 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16047 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16048 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16049 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16050 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16051 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16052 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16053 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16054 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16055 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16056 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16057 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16058 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16059 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16060 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16061 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16062 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16063 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16064 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16065 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16066 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16067 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16068 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16069 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16070 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16071 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16072 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16073 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16074 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16075 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16076 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16077 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16078 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16079 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16080 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16081 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16082 21:45:55.063 0.00004741 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16083 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16084 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16085 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16086 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16087 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16088 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16089 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16090 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16091 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16092 21:45:55.063 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16093 21:45:55.063 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16094 21:45:55.063 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 16095 21:45:55.063 0.00013472 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 16096 21:45:55.063 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16097 21:45:55.063 0.00202548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16098 21:45:55.063 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16099 21:45:55.063 0.00250311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16100 21:45:55.078 0.00019121 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 16101 21:45:55.078 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16102 21:45:55.078 0.00021847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16103 21:45:55.078 0.00017383 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 18 16104 21:45:55.078 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16105 21:45:55.078 0.00019240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16106 21:45:55.078 0.00017778 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 16107 21:45:55.078 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16108 21:45:55.078 0.00020109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16109 21:45:55.078 0.00015328 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 16110 21:45:55.078 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16111 21:45:55.078 0.00511052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16112 21:45:55.078 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16113 21:45:55.078 0.00100109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16114 21:45:55.078 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16115 21:45:55.078 0.00099635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16116 21:45:55.078 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16117 21:45:55.078 0.00101175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16118 21:45:55.078 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16119 21:45:55.078 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16120 21:45:55.078 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16121 21:45:55.078 0.00137995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16122 21:45:55.078 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16123 21:45:55.078 0.00105086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16124 21:45:55.078 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16125 21:45:55.078 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16126 21:45:55.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16127 21:45:55.094 0.00141235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16128 21:45:55.094 0.00013116 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16129 21:45:55.094 0.00125393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16130 21:45:55.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16131 21:45:55.094 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16132 21:45:55.094 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16134 21:45:55.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16135 21:45:55.094 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16136 21:45:55.094 0.00007901 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16137 21:45:55.094 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16138 21:45:55.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16139 21:45:55.094 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16140 21:45:55.094 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16141 21:45:55.094 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16142 21:45:55.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16143 21:45:55.094 0.00143170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16144 21:45:55.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16145 21:45:55.094 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16146 21:45:55.109 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16147 21:45:55.109 0.00136652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16148 21:45:55.109 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16149 21:45:55.109 0.00144632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16150 21:45:55.109 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16151 21:45:55.109 0.00114173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16152 21:45:55.109 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16153 21:45:55.109 0.00132227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16154 21:45:55.109 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16155 21:45:55.109 0.00146884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16156 21:45:55.109 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16157 21:45:55.109 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16158 21:45:55.109 0.00009956 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16159 21:45:55.109 0.00119506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16160 21:45:55.109 0.00015210 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16161 21:45:55.109 0.00116267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16162 21:45:55.109 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16163 21:45:55.109 0.00141669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16164 21:45:55.109 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16165 21:45:55.109 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16166 21:45:55.109 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16167 21:45:55.109 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16168 21:45:55.125 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16169 21:45:55.125 0.00111486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16170 21:45:55.125 0.00010114 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16171 21:45:55.125 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16172 21:45:55.125 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16173 21:45:55.125 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16174 21:45:55.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16175 21:45:55.125 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16176 21:45:55.125 0.00006637 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16177 21:45:55.125 0.00139062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16178 21:45:55.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16179 21:45:55.125 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16180 21:45:55.125 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16181 21:45:55.125 0.00120375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16182 21:45:55.125 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16183 21:45:55.125 0.00143486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16184 21:45:55.125 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16185 21:45:55.125 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16186 21:45:55.125 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16187 21:45:55.125 0.00140563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16188 21:45:55.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16189 21:45:55.125 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16190 21:45:55.141 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16191 21:45:55.141 0.00103151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16192 21:45:55.141 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16193 21:45:55.141 0.00106588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16194 21:45:55.141 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16195 21:45:55.141 0.00119783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16196 21:45:55.141 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16197 21:45:55.141 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16198 21:45:55.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16199 21:45:55.141 0.00140484 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16200 21:45:55.141 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16201 21:45:55.141 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16203 21:45:55.141 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16204 21:45:55.141 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16205 21:45:55.141 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16206 21:45:55.141 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16207 21:45:55.141 0.00133886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16208 21:45:55.141 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16209 21:45:55.141 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16210 21:45:55.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16211 21:45:55.141 0.00139970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16212 21:45:55.156 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16213 21:45:55.156 0.00147714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16214 21:45:55.156 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16215 21:45:55.156 0.00106667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16216 21:45:55.156 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16217 21:45:55.156 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16218 21:45:55.156 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16219 21:45:55.156 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16220 21:45:55.156 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16221 21:45:55.156 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16222 21:45:55.156 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16223 21:45:55.156 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16224 21:45:55.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16225 21:45:55.156 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16226 21:45:55.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16227 21:45:55.156 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16228 21:45:55.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16229 21:45:55.156 0.00143961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16230 21:45:55.156 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16231 21:45:55.156 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16232 21:45:55.172 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16233 21:45:55.172 0.00115793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16234 21:45:55.172 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16235 21:45:55.172 0.00144988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16236 21:45:55.172 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16237 21:45:55.172 0.00107101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16238 21:45:55.172 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16239 21:45:55.172 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16240 21:45:55.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16241 21:45:55.172 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16242 21:45:55.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16243 21:45:55.172 0.00121561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16244 21:45:55.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16245 21:45:55.172 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16246 21:45:55.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16247 21:45:55.172 0.00149412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16248 21:45:55.172 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 16249 21:45:55.172 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 16250 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 18 16251 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 16252 21:45:55.172 0.00004267 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 16253 21:45:55.172 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16254 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16255 21:45:55.172 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16256 21:45:55.172 0.00006440 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16257 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16258 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16259 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16260 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16261 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16262 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16263 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16264 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16265 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16266 21:45:55.172 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16267 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16268 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16269 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16270 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16271 21:45:55.172 0.00003595 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16272 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16273 21:45:55.172 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16274 21:45:55.172 0.00017146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16275 21:45:55.172 0.00008138 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16276 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16277 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16278 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16279 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16280 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16281 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16282 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16283 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16284 21:45:55.172 0.00003911 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16285 21:45:55.172 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16286 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16287 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16288 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16289 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16290 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16291 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16292 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16293 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16294 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16295 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16296 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16297 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16298 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16299 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16300 21:45:55.172 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16301 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16302 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16303 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16304 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16305 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16306 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16307 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16308 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16309 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16310 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16311 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16312 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16313 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16314 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16315 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16316 21:45:55.172 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16317 21:45:55.172 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 16318 21:45:55.172 0.00012840 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 16319 21:45:55.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16320 21:45:55.172 0.00193501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16321 21:45:55.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16322 21:45:55.172 0.00245887 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16323 21:45:55.188 0.00030380 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 16324 21:45:55.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16325 21:45:55.188 0.00025561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16326 21:45:55.188 0.00022716 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 09 16327 21:45:55.188 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16328 21:45:55.188 0.00019872 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 16329 21:45:55.188 0.00025007 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16330 21:45:55.188 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16331 21:45:55.188 0.00028879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16332 21:45:55.188 0.00030854 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 16333 21:45:55.188 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16334 21:45:55.188 0.00475734 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16335 21:45:55.188 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16336 21:45:55.188 0.00098133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16337 21:45:55.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16338 21:45:55.188 0.00102637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16339 21:45:55.188 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16340 21:45:55.188 0.00101412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16341 21:45:55.188 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16342 21:45:55.188 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16343 21:45:55.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16344 21:45:55.188 0.00132978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16345 21:45:55.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16346 21:45:55.188 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16347 21:45:55.188 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16348 21:45:55.188 0.00143763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16349 21:45:55.204 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16350 21:45:55.204 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16351 21:45:55.204 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16352 21:45:55.204 0.00119585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16353 21:45:55.204 0.00008336 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16354 21:45:55.204 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16355 21:45:55.204 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16356 21:45:55.204 0.00106390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16357 21:45:55.204 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16358 21:45:55.204 0.00129146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16359 21:45:55.204 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16360 21:45:55.204 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16361 21:45:55.204 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16362 21:45:55.204 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16363 21:45:55.204 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16364 21:45:55.204 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16365 21:45:55.204 0.00008810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16366 21:45:55.204 0.00119151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16367 21:45:55.204 0.00007111 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16368 21:45:55.204 0.00123733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16369 21:45:55.204 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16370 21:45:55.204 0.00128356 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16371 21:45:55.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16372 21:45:55.219 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16373 21:45:55.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16374 21:45:55.219 0.00144751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16375 21:45:55.219 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16376 21:45:55.219 0.00117333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16377 21:45:55.219 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16378 21:45:55.219 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16379 21:45:55.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16380 21:45:55.219 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16381 21:45:55.219 0.00007348 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16382 21:45:55.219 0.00143882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16383 21:45:55.219 0.00009640 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16384 21:45:55.219 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16385 21:45:55.219 0.00009560 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16386 21:45:55.219 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16387 21:45:55.219 0.00010232 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16388 21:45:55.219 0.00118005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16389 21:45:55.219 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16390 21:45:55.219 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16391 21:45:55.235 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16392 21:45:55.235 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16393 21:45:55.235 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16394 21:45:55.235 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16395 21:45:55.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16396 21:45:55.235 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16397 21:45:55.235 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16398 21:45:55.235 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16399 21:45:55.235 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16400 21:45:55.235 0.00148227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16401 21:45:55.235 0.00008652 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16402 21:45:55.235 0.00095921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16403 21:45:55.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16404 21:45:55.235 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16405 21:45:55.235 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16406 21:45:55.235 0.00120494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16407 21:45:55.235 0.00013314 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16408 21:45:55.235 0.00121798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16409 21:45:55.235 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16410 21:45:55.235 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16411 21:45:55.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16412 21:45:55.235 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16413 21:45:55.250 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16414 21:45:55.250 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16415 21:45:55.250 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16416 21:45:55.250 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16417 21:45:55.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16418 21:45:55.250 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16419 21:45:55.250 0.00006479 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16420 21:45:55.250 0.00124405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16421 21:45:55.250 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16422 21:45:55.250 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16423 21:45:55.250 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16424 21:45:55.250 0.00123101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16425 21:45:55.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16426 21:45:55.250 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16427 21:45:55.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16428 21:45:55.250 0.00140207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16429 21:45:55.250 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16430 21:45:55.250 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16431 21:45:55.250 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16432 21:45:55.250 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16433 21:45:55.250 0.00009165 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16434 21:45:55.250 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16435 21:45:55.266 0.00021886 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16436 21:45:55.266 0.00119467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16437 21:45:55.266 0.00009719 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16438 21:45:55.266 0.00121758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16439 21:45:55.266 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16440 21:45:55.266 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16441 21:45:55.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16442 21:45:55.266 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16443 21:45:55.266 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16444 21:45:55.266 0.00126894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16445 21:45:55.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16446 21:45:55.266 0.00155615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16447 21:45:55.266 0.00015368 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16448 21:45:55.266 0.00093353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16449 21:45:55.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16450 21:45:55.266 0.00124958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16451 21:45:55.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16452 21:45:55.266 0.00142183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16453 21:45:55.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16454 21:45:55.266 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16455 21:45:55.266 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16456 21:45:55.266 0.00139931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16457 21:45:55.282 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16458 21:45:55.282 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16459 21:45:55.282 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16460 21:45:55.282 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16461 21:45:55.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16462 21:45:55.282 0.00143565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16463 21:45:55.282 0.00008454 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16464 21:45:55.282 0.00120731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16465 21:45:55.282 0.00009126 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16466 21:45:55.282 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16467 21:45:55.282 0.00010311 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16468 21:45:55.282 0.00125432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16469 21:45:55.282 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16470 21:45:55.282 0.00166440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16471 21:45:55.282 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 16472 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 16473 21:45:55.282 0.00005689 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 09 16474 21:45:55.282 0.00006479 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 16475 21:45:55.282 0.00006716 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 16476 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16477 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16478 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16479 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16480 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16481 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16482 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16483 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16484 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16485 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16486 21:45:55.282 0.00003398 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16487 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16488 21:45:55.282 0.00004899 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16489 21:45:55.282 0.00006519 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16490 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16491 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16492 21:45:55.282 0.00003911 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16493 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16494 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16495 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16496 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16497 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16498 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16499 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16500 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16501 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16502 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16503 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16504 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16505 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16506 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16507 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16508 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16509 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16510 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16511 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16512 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16513 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16514 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16515 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16516 21:45:55.282 0.00003200 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16517 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16518 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16519 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16520 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16521 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16522 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16523 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16524 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16525 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16526 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16527 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16528 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16529 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16530 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16531 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16532 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16533 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16534 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16535 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16536 21:45:55.282 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16537 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16538 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16539 21:45:55.282 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16540 21:45:55.282 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 16541 21:45:55.282 0.00012444 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 16542 21:45:55.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16543 21:45:55.282 0.00188286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16544 21:45:55.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16545 21:45:55.282 0.00259477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16546 21:45:55.297 0.00015012 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 16547 21:45:55.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16548 21:45:55.297 0.00032119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16549 21:45:55.297 0.00027101 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 19 16550 21:45:55.297 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16551 21:45:55.297 0.00015842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16552 21:45:55.297 0.00012089 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 16553 21:45:55.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16554 21:45:55.297 0.00025758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16555 21:45:55.297 0.00016514 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 16556 21:45:55.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16557 21:45:55.297 0.00487704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16558 21:45:55.297 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16559 21:45:55.297 0.00090509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16560 21:45:55.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16561 21:45:55.297 0.00104494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16562 21:45:55.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16563 21:45:55.297 0.00117373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16564 21:45:55.297 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16565 21:45:55.297 0.00099714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16566 21:45:55.297 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16567 21:45:55.297 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16568 21:45:55.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16569 21:45:55.297 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16570 21:45:55.297 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16571 21:45:55.297 0.00143961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16572 21:45:55.313 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16573 21:45:55.313 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16574 21:45:55.313 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16575 21:45:55.313 0.00114528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16576 21:45:55.313 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16577 21:45:55.313 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16578 21:45:55.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16579 21:45:55.313 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16580 21:45:55.313 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16581 21:45:55.313 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16582 21:45:55.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16583 21:45:55.313 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16584 21:45:55.313 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16585 21:45:55.313 0.00112751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16586 21:45:55.313 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16587 21:45:55.313 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16588 21:45:55.313 0.00009323 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16589 21:45:55.313 0.00112474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16590 21:45:55.313 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16591 21:45:55.313 0.00139299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16592 21:45:55.313 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16593 21:45:55.313 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16594 21:45:55.329 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16595 21:45:55.329 0.00121442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16596 21:45:55.329 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16597 21:45:55.329 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16598 21:45:55.329 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16599 21:45:55.329 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16600 21:45:55.329 0.00016514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16601 21:45:55.329 0.00111842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16602 21:45:55.329 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16603 21:45:55.329 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16604 21:45:55.329 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16605 21:45:55.329 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16606 21:45:55.329 0.00010153 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16607 21:45:55.329 0.00111921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16608 21:45:55.329 0.00012840 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16609 21:45:55.329 0.00137837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16610 21:45:55.329 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16611 21:45:55.329 0.00096158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16612 21:45:55.329 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16613 21:45:55.329 0.00140247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16614 21:45:55.344 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16615 21:45:55.344 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16616 21:45:55.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16617 21:45:55.344 0.00118479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16618 21:45:55.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16619 21:45:55.344 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16620 21:45:55.344 0.00012128 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16621 21:45:55.344 0.00120968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16622 21:45:55.344 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16623 21:45:55.344 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16624 21:45:55.344 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16625 21:45:55.344 0.00141946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16626 21:45:55.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16627 21:45:55.344 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16628 21:45:55.344 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16629 21:45:55.344 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16630 21:45:55.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16631 21:45:55.344 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16632 21:45:55.344 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16633 21:45:55.344 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16634 21:45:55.344 0.00005570 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16635 21:45:55.344 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16636 21:45:55.360 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16637 21:45:55.360 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16638 21:45:55.360 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16639 21:45:55.360 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16640 21:45:55.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16641 21:45:55.360 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16642 21:45:55.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16643 21:45:55.360 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16644 21:45:55.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16645 21:45:55.360 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16646 21:45:55.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16647 21:45:55.360 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16648 21:45:55.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16649 21:45:55.360 0.00140207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16650 21:45:55.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16651 21:45:55.360 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16652 21:45:55.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16653 21:45:55.360 0.00137600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16654 21:45:55.360 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16655 21:45:55.360 0.00144948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16656 21:45:55.360 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16657 21:45:55.360 0.00097659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16658 21:45:55.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16659 21:45:55.375 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16660 21:45:55.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16661 21:45:55.375 0.00134835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16662 21:45:55.375 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16663 21:45:55.375 0.00136612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16664 21:45:55.375 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16665 21:45:55.375 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16666 21:45:55.375 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16667 21:45:55.375 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16668 21:45:55.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16669 21:45:55.375 0.00150795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16670 21:45:55.375 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16671 21:45:55.375 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16672 21:45:55.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16673 21:45:55.375 0.00128909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16674 21:45:55.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16675 21:45:55.375 0.00137600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16676 21:45:55.375 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16677 21:45:55.375 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16678 21:45:55.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16679 21:45:55.391 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16680 21:45:55.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16681 21:45:55.391 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16682 21:45:55.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16683 21:45:55.391 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16684 21:45:55.391 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16685 21:45:55.391 0.00135506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16686 21:45:55.391 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16687 21:45:55.391 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16688 21:45:55.391 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16689 21:45:55.391 0.00140919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16690 21:45:55.391 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16691 21:45:55.391 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16692 21:45:55.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16693 21:45:55.391 0.00208198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16694 21:45:55.391 0.00001857 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 16695 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 16696 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 19 16697 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 16698 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 16699 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16700 21:45:55.391 0.00013472 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16701 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16702 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16703 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16704 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16705 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16707 21:45:55.391 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16708 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16709 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16710 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16711 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16712 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16713 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16714 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16715 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16716 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16717 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16718 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16719 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16720 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16721 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16722 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16723 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16724 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16725 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16726 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16727 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16728 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16729 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16730 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16731 21:45:55.391 0.00004622 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16732 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16733 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16734 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16735 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16736 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16737 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16738 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16739 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16740 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16741 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16742 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16743 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16744 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16745 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16746 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16747 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16748 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16749 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16750 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16751 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16752 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16753 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16754 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16755 21:45:55.391 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16756 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16757 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16758 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16759 21:45:55.391 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16760 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16761 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16762 21:45:55.391 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16763 21:45:55.391 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 16764 21:45:55.391 0.00018568 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 16765 21:45:55.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16766 21:45:55.391 0.00196425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16767 21:45:55.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16768 21:45:55.391 0.00188010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16769 21:45:55.407 0.00040178 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 16770 21:45:55.407 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16771 21:45:55.407 0.00065580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16772 21:45:55.407 0.00035437 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 09 16773 21:45:55.407 0.00029274 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 16774 21:45:55.407 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16775 21:45:55.407 0.00022677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16776 21:45:55.407 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16777 21:45:55.407 0.00023585 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 16778 21:45:55.407 0.00029037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16779 21:45:55.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16780 21:45:55.407 0.00371240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16781 21:45:55.407 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16782 21:45:55.407 0.00094341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16783 21:45:55.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16784 21:45:55.407 0.00098133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16785 21:45:55.407 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16786 21:45:55.407 0.00090785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16787 21:45:55.407 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16788 21:45:55.407 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16789 21:45:55.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16790 21:45:55.407 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16791 21:45:55.407 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16792 21:45:55.407 0.00115516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16793 21:45:55.407 0.00008099 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16794 21:45:55.407 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16795 21:45:55.423 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16796 21:45:55.423 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16797 21:45:55.423 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16798 21:45:55.423 0.00121758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16799 21:45:55.423 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16800 21:45:55.423 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16801 21:45:55.423 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16802 21:45:55.423 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16803 21:45:55.423 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16804 21:45:55.423 0.00120810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16805 21:45:55.423 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16806 21:45:55.423 0.00137679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16807 21:45:55.423 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16808 21:45:55.423 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16809 21:45:55.423 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16810 21:45:55.423 0.00122153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16811 21:45:55.423 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16812 21:45:55.423 0.00141472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16813 21:45:55.423 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16814 21:45:55.423 0.00127091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16815 21:45:55.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16816 21:45:55.438 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16817 21:45:55.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16818 21:45:55.438 0.00142933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16819 21:45:55.438 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16820 21:45:55.438 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16821 21:45:55.438 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16822 21:45:55.438 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16823 21:45:55.438 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16824 21:45:55.438 0.00108879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16825 21:45:55.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16826 21:45:55.438 0.00138074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16827 21:45:55.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16828 21:45:55.438 0.00135862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16829 21:45:55.438 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16830 21:45:55.438 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16831 21:45:55.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16832 21:45:55.438 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16833 21:45:55.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16834 21:45:55.438 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16835 21:45:55.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16836 21:45:55.438 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16837 21:45:55.453 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16838 21:45:55.453 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16840 21:45:55.453 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16841 21:45:55.453 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16842 21:45:55.453 0.00155101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16845 21:45:55.453 0.00007032 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16846 21:45:55.453 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16847 21:45:55.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16848 21:45:55.453 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16849 21:45:55.453 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16850 21:45:55.453 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16851 21:45:55.453 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16852 21:45:55.453 0.00139022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16853 21:45:55.453 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16854 21:45:55.453 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16855 21:45:55.453 0.00012286 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16856 21:45:55.453 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16857 21:45:55.453 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16858 21:45:55.453 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16859 21:45:55.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16860 21:45:55.469 0.00127684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16861 21:45:55.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16862 21:45:55.469 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16863 21:45:55.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16864 21:45:55.469 0.00144435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16865 21:45:55.469 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16866 21:45:55.469 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16867 21:45:55.469 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16868 21:45:55.469 0.00112040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16869 21:45:55.469 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16870 21:45:55.469 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16871 21:45:55.469 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16872 21:45:55.469 0.00139733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16873 21:45:55.469 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16874 21:45:55.469 0.00140761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16875 21:45:55.469 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16876 21:45:55.469 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16877 21:45:55.469 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16878 21:45:55.469 0.00120296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16879 21:45:55.469 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16880 21:45:55.469 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16881 21:45:55.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16882 21:45:55.485 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16883 21:45:55.485 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16884 21:45:55.485 0.00137086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16885 21:45:55.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16886 21:45:55.485 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16887 21:45:55.485 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16888 21:45:55.485 0.00145620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16889 21:45:55.485 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16890 21:45:55.485 0.00107101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16891 21:45:55.485 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16892 21:45:55.485 0.00135743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16893 21:45:55.485 0.00002607 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16894 21:45:55.485 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16895 21:45:55.485 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16896 21:45:55.485 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16897 21:45:55.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16898 21:45:55.485 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16899 21:45:55.485 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16900 21:45:55.485 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16901 21:45:55.500 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16903 21:45:55.500 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16904 21:45:55.500 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16905 21:45:55.500 0.00007704 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16906 21:45:55.500 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16907 21:45:55.500 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16908 21:45:55.500 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16909 21:45:55.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16910 21:45:55.500 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16911 21:45:55.500 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16912 21:45:55.500 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16913 21:45:55.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16914 21:45:55.500 0.00141037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16915 21:45:55.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16916 21:45:55.500 0.00115635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16917 21:45:55.500 0.00002963 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 16918 21:45:55.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 16919 21:45:55.500 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 09 16920 21:45:55.500 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 16921 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 16922 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16923 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16924 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16925 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16926 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16927 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16928 21:45:55.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16929 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16930 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16931 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16932 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16933 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16934 21:45:55.500 0.00002489 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16935 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16936 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16937 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16938 21:45:55.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16939 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16940 21:45:55.500 0.00006005 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16941 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16942 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16943 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16944 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16945 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16946 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16947 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16948 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16949 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16950 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16951 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16952 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16953 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16954 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16955 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16956 21:45:55.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16957 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16958 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16959 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16960 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16961 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16962 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16963 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16964 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16965 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16966 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16967 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16968 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16969 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16970 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16971 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16972 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16973 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16974 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16975 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16976 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16977 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16978 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16979 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16980 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16981 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16982 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16983 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16984 21:45:55.500 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16985 21:45:55.500 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 16986 21:45:55.500 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 16987 21:45:55.500 0.00016395 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 16988 21:45:55.500 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16989 21:45:55.500 0.00196780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16990 21:45:55.500 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16991 21:45:55.500 0.00228938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16992 21:45:55.516 0.00023506 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 16993 21:45:55.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16994 21:45:55.516 0.00028010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16995 21:45:55.516 0.00020464 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 19 16996 21:45:55.516 0.00019121 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 16997 21:45:55.516 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 16998 21:45:55.516 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 16999 21:45:55.516 0.00020504 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 17000 21:45:55.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17001 21:45:55.516 0.00008178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17002 21:45:55.516 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17003 21:45:55.516 0.00574420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17004 21:45:55.516 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17005 21:45:55.516 0.00096198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17006 21:45:55.516 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17007 21:45:55.516 0.00113896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17008 21:45:55.516 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17009 21:45:55.516 0.00095644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17010 21:45:55.516 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17011 21:45:55.516 0.00119269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17012 21:45:55.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17013 21:45:55.516 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17014 21:45:55.516 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17015 21:45:55.516 0.00129778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17016 21:45:55.516 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17017 21:45:55.516 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17018 21:45:55.531 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17019 21:45:55.531 0.00063052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17020 21:45:55.531 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17021 21:45:55.531 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17022 21:45:55.531 0.00006202 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17023 21:45:55.531 0.00138627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17024 21:45:55.531 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17025 21:45:55.531 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17026 21:45:55.531 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17027 21:45:55.531 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17028 21:45:55.531 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17029 21:45:55.531 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17030 21:45:55.531 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17031 21:45:55.531 0.00146686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17032 21:45:55.531 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17033 21:45:55.531 0.00121205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17034 21:45:55.531 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17035 21:45:55.531 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17036 21:45:55.531 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17037 21:45:55.531 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17038 21:45:55.547 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17039 21:45:55.547 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17040 21:45:55.547 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17041 21:45:55.547 0.00105679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17042 21:45:55.547 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17043 21:45:55.547 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17044 21:45:55.547 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17045 21:45:55.547 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17046 21:45:55.547 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17047 21:45:55.547 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17048 21:45:55.547 0.00015644 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17049 21:45:55.547 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17050 21:45:55.547 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17051 21:45:55.547 0.00138825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17052 21:45:55.547 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17053 21:45:55.547 0.00125274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17054 21:45:55.547 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17055 21:45:55.547 0.00108523 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17056 21:45:55.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17057 21:45:55.547 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17058 21:45:55.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17059 21:45:55.547 0.00138074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17060 21:45:55.563 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17061 21:45:55.563 0.00119190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17062 21:45:55.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17063 21:45:55.563 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17064 21:45:55.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17065 21:45:55.563 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17066 21:45:55.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17067 21:45:55.563 0.00141393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17068 21:45:55.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17069 21:45:55.563 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17070 21:45:55.563 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17071 21:45:55.563 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17072 21:45:55.563 0.00008691 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17073 21:45:55.563 0.00121837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17074 21:45:55.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17075 21:45:55.563 0.00161264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17076 21:45:55.563 0.00006163 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17077 21:45:55.563 0.00113541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17078 21:45:55.563 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17079 21:45:55.563 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17080 21:45:55.563 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17081 21:45:55.563 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17082 21:45:55.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17083 21:45:55.578 0.00135190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17084 21:45:55.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17085 21:45:55.578 0.00136178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17086 21:45:55.578 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17087 21:45:55.578 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17088 21:45:55.578 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17089 21:45:55.578 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17090 21:45:55.578 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17091 21:45:55.578 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17092 21:45:55.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17093 21:45:55.578 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17094 21:45:55.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17095 21:45:55.578 0.00127368 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17096 21:45:55.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17097 21:45:55.578 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17098 21:45:55.578 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17099 21:45:55.578 0.00157946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17100 21:45:55.578 0.00009284 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17101 21:45:55.578 0.00084662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17102 21:45:55.578 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17103 21:45:55.578 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17104 21:45:55.594 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17105 21:45:55.594 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17106 21:45:55.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17107 21:45:55.594 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17108 21:45:55.594 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17109 21:45:55.594 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17110 21:45:55.594 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17111 21:45:55.594 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17112 21:45:55.594 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17113 21:45:55.594 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17114 21:45:55.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17115 21:45:55.594 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17116 21:45:55.594 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17117 21:45:55.594 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17118 21:45:55.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17119 21:45:55.594 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17120 21:45:55.594 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17121 21:45:55.594 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17122 21:45:55.594 0.00012800 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17123 21:45:55.594 0.00110578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17124 21:45:55.594 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17125 21:45:55.594 0.00123141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17126 21:45:55.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17127 21:45:55.610 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17128 21:45:55.610 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17129 21:45:55.610 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17130 21:45:55.610 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17131 21:45:55.610 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17134 21:45:55.610 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17135 21:45:55.610 0.00142380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17136 21:45:55.610 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17137 21:45:55.610 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17138 21:45:55.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17139 21:45:55.610 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17140 21:45:55.610 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 17141 21:45:55.610 0.00003279 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 17142 21:45:55.610 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 19 17143 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 17144 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 17145 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17146 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17147 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17148 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17149 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17150 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17151 21:45:55.610 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17152 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17153 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17154 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17155 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17156 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17157 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17158 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17159 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17160 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17161 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17162 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17163 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17164 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17165 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17166 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17167 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17168 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17169 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17170 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17171 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17172 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17173 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17174 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17175 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17176 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17177 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17178 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17179 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17180 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17181 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17182 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17183 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17184 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17185 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17186 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17187 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17188 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17189 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17190 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17191 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17192 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17193 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17194 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17195 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17196 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17197 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17198 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17199 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17200 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17201 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17202 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17203 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17204 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17205 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17206 21:45:55.610 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17207 21:45:55.610 0.00002133 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17208 21:45:55.610 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17209 21:45:55.610 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 17210 21:45:55.610 0.00017936 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 17211 21:45:55.610 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17212 21:45:55.610 0.00199625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17213 21:45:55.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17214 21:45:55.610 0.00262084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17215 21:45:55.625 0.00021768 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 17216 21:45:55.625 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17217 21:45:55.625 0.00025047 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 09 17218 21:45:55.625 0.00029235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17219 21:45:55.625 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17220 21:45:55.625 0.00017067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17221 21:45:55.625 0.00012800 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 17222 21:45:55.625 0.00013985 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 17223 21:45:55.625 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17224 21:45:55.625 0.00012523 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17225 21:45:55.625 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17226 21:45:55.625 0.00588879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17227 21:45:55.625 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17228 21:45:55.625 0.00094380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17229 21:45:55.625 0.00178686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17230 21:45:55.625 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17231 21:45:55.625 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17232 21:45:55.625 0.00031961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17233 21:45:55.625 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17234 21:45:55.625 0.00109393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17235 21:45:55.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17236 21:45:55.625 0.00139733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17237 21:45:55.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17238 21:45:55.625 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17239 21:45:55.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17240 21:45:55.625 0.00131121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17241 21:45:55.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17242 21:45:55.641 0.00129699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17243 21:45:55.641 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17244 21:45:55.641 0.00138272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17245 21:45:55.641 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17246 21:45:55.641 0.00123259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17247 21:45:55.641 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17248 21:45:55.641 0.00141432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17249 21:45:55.641 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17250 21:45:55.641 0.00120257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17251 21:45:55.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17252 21:45:55.641 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17253 21:45:55.641 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17254 21:45:55.641 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17255 21:45:55.641 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17256 21:45:55.641 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17257 21:45:55.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17258 21:45:55.641 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17259 21:45:55.641 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17260 21:45:55.641 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17261 21:45:55.641 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17262 21:45:55.641 0.00159131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17263 21:45:55.656 0.00008138 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17264 21:45:55.656 0.00099240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17265 21:45:55.656 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17266 21:45:55.656 0.00109551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17267 21:45:55.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17268 21:45:55.656 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17269 21:45:55.656 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17270 21:45:55.656 0.00139496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17271 21:45:55.656 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17272 21:45:55.656 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17273 21:45:55.656 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17274 21:45:55.656 0.00127091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17275 21:45:55.656 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17276 21:45:55.656 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17277 21:45:55.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17278 21:45:55.656 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17279 21:45:55.656 0.00013393 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17280 21:45:55.656 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17281 21:45:55.656 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17282 21:45:55.656 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17283 21:45:55.672 0.00001225 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17284 21:45:55.672 0.00042351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17285 21:45:55.672 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17286 21:45:55.672 0.00153877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17287 21:45:55.672 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17288 21:45:55.672 0.00104849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17289 21:45:55.672 0.00013353 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17290 21:45:55.672 0.00101649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17291 21:45:55.672 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17292 21:45:55.672 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17293 21:45:55.672 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17294 21:45:55.672 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17295 21:45:55.672 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17296 21:45:55.672 0.00142025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17297 21:45:55.672 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17298 21:45:55.672 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17299 21:45:55.672 0.00010193 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17300 21:45:55.672 0.00123338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17301 21:45:55.672 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17302 21:45:55.672 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17303 21:45:55.672 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17304 21:45:55.672 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17305 21:45:55.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17306 21:45:55.688 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17307 21:45:55.688 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17308 21:45:55.688 0.00142459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17309 21:45:55.688 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17310 21:45:55.688 0.00112948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17311 21:45:55.688 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17312 21:45:55.688 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17313 21:45:55.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17314 21:45:55.688 0.00121916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17315 21:45:55.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17316 21:45:55.688 0.00143684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17317 21:45:55.688 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17318 21:45:55.688 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17319 21:45:55.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17320 21:45:55.688 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17321 21:45:55.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17322 21:45:55.688 0.00127526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17323 21:45:55.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17324 21:45:55.688 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17325 21:45:55.688 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17326 21:45:55.688 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17327 21:45:55.703 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17328 21:45:55.703 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17329 21:45:55.703 0.00011220 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17330 21:45:55.703 0.00111961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17331 21:45:55.703 0.00050686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17332 21:45:55.703 0.00096040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17333 21:45:55.703 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17334 21:45:55.703 0.00100780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17335 21:45:55.703 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17336 21:45:55.703 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17337 21:45:55.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17338 21:45:55.703 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17339 21:45:55.703 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17340 21:45:55.703 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17341 21:45:55.703 0.00012800 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17342 21:45:55.703 0.00108721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17343 21:45:55.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17344 21:45:55.703 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17345 21:45:55.703 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17346 21:45:55.703 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17347 21:45:55.719 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17348 21:45:55.719 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17349 21:45:55.719 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17350 21:45:55.719 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17351 21:45:55.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17352 21:45:55.719 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17353 21:45:55.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17354 21:45:55.719 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17355 21:45:55.719 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17356 21:45:55.719 0.00122035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17357 21:45:55.719 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17358 21:45:55.719 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17359 21:45:55.719 0.00009363 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17360 21:45:55.719 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17361 21:45:55.719 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17362 21:45:55.719 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17363 21:45:55.719 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 17364 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 17365 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 09 17366 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 17367 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 17368 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17369 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17370 21:45:55.719 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17371 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17372 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17373 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17374 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17375 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17376 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17377 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17378 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17379 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17380 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17381 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17382 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17383 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17384 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17385 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17386 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17387 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17388 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17389 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17390 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17391 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17392 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17393 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17394 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17395 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17396 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17397 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17398 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17399 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17400 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17401 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17402 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17403 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17404 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17405 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17406 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17407 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17408 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17409 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17410 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17411 21:45:55.719 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17412 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17413 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17414 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17415 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17416 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17417 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17418 21:45:55.719 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17419 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17420 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17421 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17422 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17423 21:45:55.719 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17424 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17425 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17426 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17427 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17428 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17429 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17430 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17431 21:45:55.719 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17432 21:45:55.719 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 17433 21:45:55.719 0.00011299 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 17434 21:45:55.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17435 21:45:55.719 0.00187378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17436 21:45:55.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17437 21:45:55.719 0.00281008 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17438 21:45:55.735 0.00022440 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 17439 21:45:55.735 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17440 21:45:55.735 0.00022716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17441 21:45:55.735 0.00018884 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 19 17442 21:45:55.735 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17443 21:45:55.735 0.00025244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17444 21:45:55.735 0.00016751 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 17445 21:45:55.735 0.00025402 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 17446 21:45:55.735 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17447 21:45:55.735 0.00016553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17448 21:45:55.735 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17449 21:45:55.735 0.00527882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17450 21:45:55.735 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17451 21:45:55.735 0.00078104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17452 21:45:55.735 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17453 21:45:55.735 0.00095882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17454 21:45:55.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17455 21:45:55.735 0.00102400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17456 21:45:55.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17457 21:45:55.735 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17458 21:45:55.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17459 21:45:55.735 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17460 21:45:55.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17461 21:45:55.735 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17462 21:45:55.750 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17463 21:45:55.750 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17464 21:45:55.750 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17465 21:45:55.750 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17466 21:45:55.750 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17467 21:45:55.750 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17468 21:45:55.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17469 21:45:55.750 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17470 21:45:55.750 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17471 21:45:55.750 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17472 21:45:55.750 0.00010864 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17473 21:45:55.750 0.00099793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17474 21:45:55.750 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17475 21:45:55.750 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17476 21:45:55.750 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17477 21:45:55.750 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17478 21:45:55.750 0.00008810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17479 21:45:55.750 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17480 21:45:55.750 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17481 21:45:55.750 0.00103072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17482 21:45:55.750 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17483 21:45:55.750 0.00122667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17484 21:45:55.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17485 21:45:55.766 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17486 21:45:55.766 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17487 21:45:55.766 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17488 21:45:55.766 0.00013037 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17489 21:45:55.766 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17490 21:45:55.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17491 21:45:55.766 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17492 21:45:55.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17493 21:45:55.766 0.00138351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17494 21:45:55.766 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17495 21:45:55.766 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17496 21:45:55.766 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17497 21:45:55.766 0.00103664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17498 21:45:55.766 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17499 21:45:55.766 0.00120810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17501 21:45:55.766 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17502 21:45:55.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17503 21:45:55.766 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17504 21:45:55.766 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17505 21:45:55.766 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17506 21:45:55.782 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17507 21:45:55.782 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17508 21:45:55.782 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17509 21:45:55.782 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17510 21:45:55.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17511 21:45:55.782 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17512 21:45:55.782 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17513 21:45:55.782 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17514 21:45:55.782 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17515 21:45:55.782 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17516 21:45:55.782 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17517 21:45:55.782 0.00152810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17518 21:45:55.782 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17519 21:45:55.782 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17520 21:45:55.782 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17521 21:45:55.782 0.00112040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17522 21:45:55.782 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17523 21:45:55.782 0.00129185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17524 21:45:55.782 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17525 21:45:55.782 0.00121600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17526 21:45:55.782 0.00019042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17527 21:45:55.797 0.00094380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17529 21:45:55.797 0.00118479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17530 21:45:55.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17531 21:45:55.797 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17532 21:45:55.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17533 21:45:55.797 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17534 21:45:55.797 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17535 21:45:55.797 0.00120889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17536 21:45:55.797 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17537 21:45:55.797 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17538 21:45:55.797 0.00011812 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17539 21:45:55.797 0.00116780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17540 21:45:55.797 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17541 21:45:55.797 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17542 21:45:55.797 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17543 21:45:55.797 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17544 21:45:55.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17545 21:45:55.797 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17546 21:45:55.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17547 21:45:55.797 0.00139694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17548 21:45:55.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17549 21:45:55.813 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17550 21:45:55.813 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17551 21:45:55.813 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17552 21:45:55.813 0.00008968 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17553 21:45:55.813 0.00119862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17554 21:45:55.813 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17555 21:45:55.813 0.00141037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17556 21:45:55.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17557 21:45:55.813 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17558 21:45:55.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17559 21:45:55.813 0.00138035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17560 21:45:55.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17561 21:45:55.813 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17562 21:45:55.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17563 21:45:55.813 0.00137482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17564 21:45:55.813 0.00023190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17565 21:45:55.813 0.00114963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17566 21:45:55.813 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17567 21:45:55.813 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17568 21:45:55.813 0.00004504 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17569 21:45:55.813 0.00109551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17570 21:45:55.829 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17571 21:45:55.829 0.00128988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17572 21:45:55.829 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17573 21:45:55.829 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17574 21:45:55.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17575 21:45:55.829 0.00126420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17576 21:45:55.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17577 21:45:55.829 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17578 21:45:55.829 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17579 21:45:55.829 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17580 21:45:55.829 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17581 21:45:55.829 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17582 21:45:55.829 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17583 21:45:55.829 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17584 21:45:55.829 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17585 21:45:55.829 0.00007467 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 17586 21:45:55.829 0.00189037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17587 21:45:55.829 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 17588 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 19 17589 21:45:55.829 0.00003635 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 17590 21:45:55.829 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 17591 21:45:55.829 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17592 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17593 21:45:55.829 0.00005136 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17594 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17595 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17596 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17597 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17598 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17599 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17600 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17601 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17602 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17603 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17604 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17605 21:45:55.829 0.00002686 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17606 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17607 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17608 21:45:55.829 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17609 21:45:55.829 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17610 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17611 21:45:55.829 0.00004622 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17612 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17613 21:45:55.829 0.00004188 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17614 21:45:55.829 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17615 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17616 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17617 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17618 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17619 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17620 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17621 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17622 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17623 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17624 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17625 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17626 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17627 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17628 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17629 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17630 21:45:55.829 0.00004306 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17631 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17632 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17633 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17634 21:45:55.829 0.00004306 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17635 21:45:55.829 0.00004148 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17636 21:45:55.829 0.00002568 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17637 21:45:55.829 0.00004583 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17638 21:45:55.829 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17639 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17640 21:45:55.829 0.00004306 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17641 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17642 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17643 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17644 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17645 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17646 21:45:55.829 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17647 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17648 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17649 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17650 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17651 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17652 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17653 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17654 21:45:55.829 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17655 21:45:55.829 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 17656 21:45:55.829 0.00037136 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 17657 21:45:55.829 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17658 21:45:55.829 0.00185047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17659 21:45:55.829 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17660 21:45:55.829 0.00162607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17661 21:45:55.844 0.00027457 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 17662 21:45:55.844 0.00017896 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 09 17663 21:45:55.844 0.00010627 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17664 21:45:55.844 0.00108286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17665 21:45:55.844 0.00039072 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 17666 21:45:55.844 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17667 21:45:55.844 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17668 21:45:55.844 0.00021768 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 17669 21:45:55.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17670 21:45:55.844 0.00009837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17671 21:45:55.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17672 21:45:55.844 0.00447763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17673 21:45:55.844 0.00008691 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17674 21:45:55.844 0.00096316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17675 21:45:55.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17676 21:45:55.844 0.00097778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17677 21:45:55.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17678 21:45:55.844 0.00105600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17679 21:45:55.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17680 21:45:55.844 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17681 21:45:55.844 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17682 21:45:55.844 0.00142894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17683 21:45:55.844 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17684 21:45:55.844 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17685 21:45:55.859 0.00004859 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17686 21:45:55.859 0.00123575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17687 21:45:55.859 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17688 21:45:55.859 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17691 21:45:55.859 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17692 21:45:55.859 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17693 21:45:55.859 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17694 21:45:55.859 0.00140563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17695 21:45:55.859 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17696 21:45:55.859 0.00137126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17697 21:45:55.859 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17698 21:45:55.859 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17699 21:45:55.859 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17700 21:45:55.859 0.00128909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17701 21:45:55.859 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17702 21:45:55.859 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17703 21:45:55.859 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17704 21:45:55.859 0.00127447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17705 21:45:55.859 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17706 21:45:55.859 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17707 21:45:55.875 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17708 21:45:55.875 0.00131556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17709 21:45:55.875 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17710 21:45:55.875 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17711 21:45:55.875 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17712 21:45:55.875 0.00124682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17713 21:45:55.875 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17714 21:45:55.875 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17715 21:45:55.875 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17716 21:45:55.875 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17717 21:45:55.875 0.00010904 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17718 21:45:55.875 0.00110420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17719 21:45:55.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17720 21:45:55.875 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17721 21:45:55.875 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17722 21:45:55.875 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17723 21:45:55.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17724 21:45:55.875 0.00146449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17725 21:45:55.875 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17726 21:45:55.875 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17727 21:45:55.875 0.00005136 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17728 21:45:55.875 0.00157551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17729 21:45:55.891 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17730 21:45:55.891 0.00111210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17731 21:45:55.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17732 21:45:55.891 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17733 21:45:55.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17734 21:45:55.891 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17735 21:45:55.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17736 21:45:55.891 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17737 21:45:55.891 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17738 21:45:55.891 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17739 21:45:55.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17740 21:45:55.891 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17741 21:45:55.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17742 21:45:55.891 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17743 21:45:55.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17744 21:45:55.891 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17745 21:45:55.891 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17746 21:45:55.891 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17747 21:45:55.891 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17748 21:45:55.891 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17749 21:45:55.906 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17750 21:45:55.906 0.00155022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17753 21:45:55.906 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17754 21:45:55.906 0.00117570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17755 21:45:55.906 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17756 21:45:55.906 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17757 21:45:55.906 0.00013788 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17758 21:45:55.906 0.00119862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17759 21:45:55.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17760 21:45:55.906 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17761 21:45:55.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17762 21:45:55.906 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17763 21:45:55.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17764 21:45:55.906 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17765 21:45:55.906 0.00009442 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17766 21:45:55.906 0.00118242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17767 21:45:55.906 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17768 21:45:55.906 0.00119309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17769 21:45:55.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17770 21:45:55.906 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17771 21:45:55.922 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17772 21:45:55.922 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17773 21:45:55.922 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17774 21:45:55.922 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17775 21:45:55.922 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17776 21:45:55.922 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17777 21:45:55.922 0.00013156 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17778 21:45:55.922 0.00120375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17779 21:45:55.922 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17780 21:45:55.922 0.00122825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17781 21:45:55.922 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17782 21:45:55.922 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17783 21:45:55.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17784 21:45:55.922 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17785 21:45:55.922 0.00011022 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17786 21:45:55.922 0.00120336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17787 21:45:55.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17788 21:45:55.922 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17789 21:45:55.922 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17790 21:45:55.922 0.00145027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17791 21:45:55.922 0.00007467 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17792 21:45:55.922 0.00115240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17793 21:45:55.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17794 21:45:55.938 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17795 21:45:55.938 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17796 21:45:55.938 0.00126578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17797 21:45:55.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17798 21:45:55.938 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17799 21:45:55.938 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17800 21:45:55.938 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17801 21:45:55.938 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17802 21:45:55.938 0.00141393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17803 21:45:55.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17804 21:45:55.938 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17805 21:45:55.938 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17806 21:45:55.938 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17807 21:45:55.938 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17808 21:45:55.938 0.00087467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17809 21:45:55.938 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 17810 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 17811 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 09 17812 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 17813 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 17814 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17815 21:45:55.938 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17816 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17817 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17818 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17819 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17820 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17821 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17822 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17823 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17824 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17825 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17826 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17827 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17828 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17829 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17830 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17831 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17832 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17833 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17834 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17835 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17836 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17837 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17838 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17839 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17840 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17841 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17842 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17843 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17844 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17845 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17846 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17847 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17848 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17849 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17850 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17851 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17852 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17853 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17854 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17855 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17856 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17857 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17858 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17859 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17860 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17861 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17862 21:45:55.938 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17863 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17864 21:45:55.938 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17865 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17866 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17867 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17868 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17869 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17870 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17871 21:45:55.938 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17872 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17873 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17874 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17875 21:45:55.938 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17876 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17877 21:45:55.938 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 17878 21:45:55.938 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 17879 21:45:55.938 0.00020504 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 17880 21:45:55.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17881 21:45:55.938 0.00206025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17882 21:45:55.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17883 21:45:55.938 0.00226173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17884 21:45:55.953 0.00028879 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 17885 21:45:55.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17886 21:45:55.953 0.00026904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17887 21:45:55.953 0.00023427 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 19 17888 21:45:55.953 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17889 21:45:55.953 0.00020425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17890 21:45:55.953 0.00019872 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 17891 21:45:55.953 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17892 21:45:55.953 0.00030854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17893 21:45:55.953 0.00025640 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 17894 21:45:55.953 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17895 21:45:55.953 0.00645966 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17896 21:45:55.953 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17897 21:45:55.953 0.00108761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17898 21:45:55.953 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17899 21:45:55.953 0.00102084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17900 21:45:55.953 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17901 21:45:55.953 0.00089561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17902 21:45:55.953 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17903 21:45:55.953 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17904 21:45:55.953 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17905 21:45:55.953 0.00139180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17906 21:45:55.953 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17907 21:45:55.953 0.00141156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17908 21:45:55.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17909 21:45:55.969 0.00125235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17910 21:45:55.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17911 21:45:55.969 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17912 21:45:55.969 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17913 21:45:55.969 0.00145975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17914 21:45:55.969 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17915 21:45:55.969 0.00108958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17916 21:45:55.969 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17917 21:45:55.969 0.00117136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17918 21:45:55.969 0.00011773 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17919 21:45:55.969 0.00121007 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17920 21:45:55.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17921 21:45:55.969 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17922 21:45:55.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17923 21:45:55.969 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17924 21:45:55.969 0.00009560 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17925 21:45:55.969 0.00118084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17926 21:45:55.969 0.00012523 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17927 21:45:55.969 0.00117175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17928 21:45:55.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17929 21:45:55.969 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17930 21:45:55.984 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17931 21:45:55.984 0.00143684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17932 21:45:55.984 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17933 21:45:55.984 0.00123299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17934 21:45:55.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17935 21:45:55.984 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17936 21:45:55.984 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17937 21:45:55.984 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17938 21:45:55.984 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17939 21:45:55.984 0.00134519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17940 21:45:55.984 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17941 21:45:55.984 0.00121640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17942 21:45:55.984 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17943 21:45:55.984 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17944 21:45:55.984 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17945 21:45:55.984 0.00118835 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17946 21:45:55.984 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17947 21:45:55.984 0.00139891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17948 21:45:55.984 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17949 21:45:55.984 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17950 21:45:56.000 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17951 21:45:56.000 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17952 21:45:56.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17953 21:45:56.000 0.00140761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17954 21:45:56.000 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17955 21:45:56.000 0.00122785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17956 21:45:56.000 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17957 21:45:56.000 0.00116978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17958 21:45:56.000 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17959 21:45:56.000 0.00151467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17960 21:45:56.000 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17961 21:45:56.000 0.00117689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17962 21:45:56.000 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17963 21:45:56.000 0.00117847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17964 21:45:56.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17965 21:45:56.000 0.00119941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17966 21:45:56.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17967 21:45:56.000 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17968 21:45:56.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17969 21:45:56.000 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17970 21:45:56.000 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17971 21:45:56.000 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17972 21:45:56.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17973 21:45:56.016 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17974 21:45:56.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17976 21:45:56.016 0.00013195 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17977 21:45:56.016 0.00115911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17978 21:45:56.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17979 21:45:56.016 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17980 21:45:56.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17981 21:45:56.016 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17982 21:45:56.016 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17983 21:45:56.016 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17984 21:45:56.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17985 21:45:56.016 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17986 21:45:56.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17987 21:45:56.016 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17988 21:45:56.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17989 21:45:56.016 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17990 21:45:56.016 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17991 21:45:56.016 0.00142459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17992 21:45:56.016 0.00007111 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17993 21:45:56.016 0.00119625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17994 21:45:56.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17995 21:45:56.031 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17996 21:45:56.031 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17997 21:45:56.031 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 17998 21:45:56.031 0.00011299 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 17999 21:45:56.031 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18000 21:45:56.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18001 21:45:56.031 0.00125432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18003 21:45:56.031 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18004 21:45:56.031 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18005 21:45:56.031 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18006 21:45:56.031 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18007 21:45:56.031 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18008 21:45:56.031 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18009 21:45:56.031 0.00129620 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18010 21:45:56.031 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18011 21:45:56.031 0.00122153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18012 21:45:56.031 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18013 21:45:56.031 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18014 21:45:56.031 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18015 21:45:56.031 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18016 21:45:56.047 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18017 21:45:56.047 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18018 21:45:56.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18019 21:45:56.047 0.00126222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18020 21:45:56.047 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18021 21:45:56.047 0.00115556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18022 21:45:56.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18023 21:45:56.047 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18024 21:45:56.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18025 21:45:56.047 0.00139022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18026 21:45:56.047 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18027 21:45:56.047 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18028 21:45:56.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18029 21:45:56.047 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18030 21:45:56.047 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18031 21:45:56.047 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18032 21:45:56.047 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 18033 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 18034 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 19 18035 21:45:56.047 0.00010943 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 18036 21:45:56.047 0.00006281 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 18037 21:45:56.047 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18038 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18039 21:45:56.047 0.00002410 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18040 21:45:56.047 0.00002370 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18041 21:45:56.047 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18042 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18043 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18044 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18045 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18046 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18047 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18048 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18049 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18050 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18051 21:45:56.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18052 21:45:56.047 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18053 21:45:56.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18054 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18055 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18056 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18057 21:45:56.047 0.00000000 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18058 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18059 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18060 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18061 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18062 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18063 21:45:56.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18064 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18065 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18066 21:45:56.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18067 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18068 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18069 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18070 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18071 21:45:56.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18072 21:45:56.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18073 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18074 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18075 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18076 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18077 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18078 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18079 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18080 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18081 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18082 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18083 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18084 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18085 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18086 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18087 21:45:56.047 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18088 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18089 21:45:56.047 0.00000000 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18090 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18091 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18092 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18093 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18094 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18095 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18096 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18097 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18098 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18099 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18100 21:45:56.047 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18101 21:45:56.047 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 18102 21:45:56.047 0.00014183 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 18103 21:45:56.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18104 21:45:56.047 0.00204049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18105 21:45:56.047 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18106 21:45:56.047 0.00095210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18107 21:45:56.063 0.00026114 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 18108 21:45:56.063 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18109 21:45:56.063 0.00025600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18110 21:45:56.063 0.00019042 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0A 18111 21:45:56.063 0.00021294 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 18112 21:45:56.063 0.00007269 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18113 21:45:56.063 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18114 21:45:56.063 0.00018963 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 18115 21:45:56.063 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18116 21:45:56.063 0.00014183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18117 21:45:56.063 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18118 21:45:56.063 0.00570311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18119 21:45:56.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18120 21:45:56.063 0.00103585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18121 21:45:56.063 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18122 21:45:56.063 0.00093748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18123 21:45:56.063 0.00013274 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18124 21:45:56.063 0.00088573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18125 21:45:56.063 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18126 21:45:56.063 0.00147516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18127 21:45:56.063 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18128 21:45:56.063 0.00109077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18129 21:45:56.063 0.00012998 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18130 21:45:56.063 0.00116780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18131 21:45:56.063 0.00006756 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18132 21:45:56.063 0.00118953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18133 21:45:56.078 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18134 21:45:56.078 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18135 21:45:56.078 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18136 21:45:56.078 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18137 21:45:56.078 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18138 21:45:56.078 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18139 21:45:56.078 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18140 21:45:56.078 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18141 21:45:56.078 0.00003437 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18142 21:45:56.078 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18143 21:45:56.078 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18144 21:45:56.078 0.00135625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18145 21:45:56.078 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18146 21:45:56.078 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18147 21:45:56.078 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18148 21:45:56.078 0.00158499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18149 21:45:56.078 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18150 21:45:56.078 0.00105837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18151 21:45:56.078 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18152 21:45:56.078 0.00114568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18153 21:45:56.078 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18154 21:45:56.078 0.00141511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18155 21:45:56.094 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18156 21:45:56.094 0.00109590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18157 21:45:56.094 0.00003595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18158 21:45:56.094 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18159 21:45:56.094 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18160 21:45:56.094 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18161 21:45:56.094 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18162 21:45:56.094 0.00112277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18163 21:45:56.094 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18164 21:45:56.094 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18165 21:45:56.094 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18167 21:45:56.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18168 21:45:56.094 0.00143447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18169 21:45:56.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18170 21:45:56.094 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18171 21:45:56.094 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18172 21:45:56.094 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18173 21:45:56.094 0.00010904 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18174 21:45:56.094 0.00121995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18175 21:45:56.110 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18176 21:45:56.110 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18177 21:45:56.110 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18178 21:45:56.110 0.00119230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18179 21:45:56.110 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18180 21:45:56.110 0.00131200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18181 21:45:56.110 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18182 21:45:56.110 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18183 21:45:56.110 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18184 21:45:56.110 0.00126499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18185 21:45:56.110 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18186 21:45:56.110 0.00142183 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18187 21:45:56.110 0.00004622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18188 21:45:56.110 0.00112000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18189 21:45:56.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18190 21:45:56.110 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18191 21:45:56.110 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18192 21:45:56.110 0.00146647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18193 21:45:56.110 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18194 21:45:56.110 0.00125195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18195 21:45:56.110 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18196 21:45:56.110 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18197 21:45:56.126 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18198 21:45:56.126 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18199 21:45:56.126 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18200 21:45:56.126 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18201 21:45:56.126 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18202 21:45:56.126 0.00142380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18203 21:45:56.126 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18204 21:45:56.126 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18205 21:45:56.126 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18206 21:45:56.126 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18207 21:45:56.126 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18208 21:45:56.126 0.00142499 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18209 21:45:56.126 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18210 21:45:56.126 0.00135783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18211 21:45:56.126 0.00011299 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18212 21:45:56.126 0.00112988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18213 21:45:56.126 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18214 21:45:56.126 0.00146963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18215 21:45:56.126 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18216 21:45:56.126 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18217 21:45:56.126 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18218 21:45:56.126 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18219 21:45:56.141 0.00012760 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18220 21:45:56.141 0.00102084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18221 21:45:56.141 0.00014143 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18222 21:45:56.141 0.00120257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18223 21:45:56.141 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18224 21:45:56.141 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18225 21:45:56.141 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18226 21:45:56.141 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18227 21:45:56.141 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18228 21:45:56.141 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18229 21:45:56.141 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18231 21:45:56.141 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18232 21:45:56.141 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18233 21:45:56.141 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18234 21:45:56.141 0.00142854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18235 21:45:56.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18236 21:45:56.141 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18237 21:45:56.141 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18238 21:45:56.141 0.00123338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18239 21:45:56.141 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18240 21:45:56.157 0.00142064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18241 21:45:56.157 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18242 21:45:56.157 0.00095763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18243 21:45:56.157 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18244 21:45:56.157 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18245 21:45:56.157 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18246 21:45:56.157 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18247 21:45:56.157 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18248 21:45:56.157 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18249 21:45:56.157 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18250 21:45:56.157 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18251 21:45:56.157 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18252 21:45:56.157 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18253 21:45:56.157 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18254 21:45:56.157 0.00184375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18255 21:45:56.157 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 18256 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 18257 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0A 18258 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 18259 21:45:56.157 0.00005847 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 18260 21:45:56.157 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18261 21:45:56.157 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18262 21:45:56.157 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18263 21:45:56.157 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18264 21:45:56.157 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18265 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18266 21:45:56.157 0.00005294 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18267 21:45:56.157 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18268 21:45:56.157 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18269 21:45:56.157 0.00000356 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18270 21:45:56.157 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18271 21:45:56.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18272 21:45:56.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18273 21:45:56.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18274 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18275 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18276 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18277 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18278 21:45:56.157 0.00003951 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18279 21:45:56.157 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18280 21:45:56.157 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18281 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18282 21:45:56.157 0.00003911 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18283 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18284 21:45:56.157 0.00004267 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18285 21:45:56.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18286 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18287 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18288 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18289 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18290 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18291 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18292 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18293 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18294 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18295 21:45:56.157 0.00004109 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18296 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18297 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18298 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18299 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18300 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18301 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18302 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18303 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18304 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18305 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18306 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18307 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18308 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18309 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18310 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18311 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18312 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18313 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18314 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18315 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18316 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18317 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18318 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18319 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18320 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18321 21:45:56.157 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18322 21:45:56.157 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18323 21:45:56.157 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18324 21:45:56.157 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 18325 21:45:56.157 0.00022677 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 18326 21:45:56.157 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18327 21:45:56.157 0.00203970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18328 21:45:56.157 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18329 21:45:56.157 0.00170509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18330 21:45:56.172 0.00016474 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 18331 21:45:56.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18332 21:45:56.172 0.00020385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18333 21:45:56.172 0.00013985 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1A 18334 21:45:56.172 0.00015802 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 18335 21:45:56.172 0.00099674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18336 21:45:56.172 0.00006519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18337 21:45:56.172 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18338 21:45:56.172 0.00036622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18339 21:45:56.172 0.00030420 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 18340 21:45:56.172 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18341 21:45:56.172 0.00482450 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18342 21:45:56.172 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18343 21:45:56.172 0.00092128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18345 21:45:56.172 0.00088415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18346 21:45:56.172 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18347 21:45:56.172 0.00106667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18348 21:45:56.172 0.00004306 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18349 21:45:56.172 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18350 21:45:56.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18351 21:45:56.172 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18352 21:45:56.172 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18353 21:45:56.172 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18354 21:45:56.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18355 21:45:56.172 0.00141590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18356 21:45:56.188 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18357 21:45:56.188 0.00135743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18358 21:45:56.188 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18359 21:45:56.188 0.00141709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18360 21:45:56.188 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18361 21:45:56.188 0.00104454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18362 21:45:56.188 0.00006756 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18363 21:45:56.188 0.00123852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18364 21:45:56.188 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18365 21:45:56.188 0.00132741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18366 21:45:56.188 0.00007546 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18367 21:45:56.188 0.00126973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18368 21:45:56.188 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18369 21:45:56.188 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18370 21:45:56.188 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18371 21:45:56.188 0.00134203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18372 21:45:56.188 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18373 21:45:56.188 0.00135546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18374 21:45:56.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18375 21:45:56.188 0.00145936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18376 21:45:56.204 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18377 21:45:56.204 0.00101412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18378 21:45:56.204 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18379 21:45:56.204 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18380 21:45:56.204 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18381 21:45:56.204 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18382 21:45:56.204 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18383 21:45:56.204 0.00157827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18384 21:45:56.204 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18385 21:45:56.204 0.00100859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18386 21:45:56.204 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18387 21:45:56.204 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18388 21:45:56.204 0.00009205 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18389 21:45:56.204 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18390 21:45:56.204 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18391 21:45:56.204 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18392 21:45:56.204 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18393 21:45:56.204 0.00137837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18394 21:45:56.204 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18395 21:45:56.204 0.00130094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18396 21:45:56.204 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18397 21:45:56.204 0.00144079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18398 21:45:56.219 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18399 21:45:56.219 0.00117096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18400 21:45:56.219 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18401 21:45:56.219 0.00145067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18402 21:45:56.219 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18403 21:45:56.219 0.00120099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18404 21:45:56.219 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18405 21:45:56.219 0.00120573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18406 21:45:56.219 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18407 21:45:56.219 0.00117847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18408 21:45:56.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18409 21:45:56.219 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18410 21:45:56.219 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18411 21:45:56.219 0.00144158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18412 21:45:56.219 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18413 21:45:56.219 0.00130647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18414 21:45:56.219 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18415 21:45:56.219 0.00138193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18416 21:45:56.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18417 21:45:56.219 0.00121995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18418 21:45:56.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18419 21:45:56.219 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18420 21:45:56.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18421 21:45:56.235 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18422 21:45:56.235 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18423 21:45:56.235 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18424 21:45:56.235 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18425 21:45:56.235 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18426 21:45:56.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18427 21:45:56.235 0.00150914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18428 21:45:56.235 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18429 21:45:56.235 0.00106588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18430 21:45:56.235 0.00010509 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18431 21:45:56.235 0.00117649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18432 21:45:56.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18433 21:45:56.235 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18434 21:45:56.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18435 21:45:56.235 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18436 21:45:56.235 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18437 21:45:56.235 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18438 21:45:56.235 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18439 21:45:56.235 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18440 21:45:56.235 0.00006835 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18441 21:45:56.235 0.00127249 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18442 21:45:56.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18443 21:45:56.250 0.00146924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18444 21:45:56.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18445 21:45:56.250 0.00122943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18446 21:45:56.250 0.00012879 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18447 21:45:56.250 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18448 21:45:56.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18449 21:45:56.250 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18450 21:45:56.250 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18451 21:45:56.250 0.00151704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18452 21:45:56.250 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18453 21:45:56.250 0.00114054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18454 21:45:56.250 0.00010351 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18455 21:45:56.250 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18456 21:45:56.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18457 21:45:56.250 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18458 21:45:56.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18459 21:45:56.250 0.00138351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18460 21:45:56.250 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18461 21:45:56.250 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18462 21:45:56.250 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18463 21:45:56.250 0.00143486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18464 21:45:56.266 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18465 21:45:56.266 0.00140603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18466 21:45:56.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18467 21:45:56.266 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18468 21:45:56.266 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18469 21:45:56.266 0.00135388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18470 21:45:56.266 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18471 21:45:56.266 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18472 21:45:56.266 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18473 21:45:56.266 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18474 21:45:56.266 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18475 21:45:56.266 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18476 21:45:56.266 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18477 21:45:56.266 0.00099398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18478 21:45:56.266 0.00001343 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 18479 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 18480 21:45:56.266 0.00006479 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1A 18481 21:45:56.266 0.00003872 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 18482 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 18483 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18484 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18485 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18486 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18487 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18488 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18489 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18490 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18491 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18492 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18493 21:45:56.266 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18494 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18495 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18496 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18497 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18498 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18499 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18500 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18501 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18502 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18503 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18504 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18505 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18506 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18507 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18508 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18509 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18510 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18511 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18512 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18513 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18514 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18515 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18516 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18517 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18518 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18519 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18520 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18521 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18522 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18523 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18524 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18525 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18526 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18527 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18528 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18529 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18530 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18531 21:45:56.266 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18532 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18533 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18534 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18535 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18536 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18537 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18538 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18539 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18540 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18541 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18542 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18543 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18544 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18545 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18546 21:45:56.266 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18547 21:45:56.266 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 18548 21:45:56.266 0.00018647 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 18549 21:45:56.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18550 21:45:56.266 0.00203259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18551 21:45:56.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18552 21:45:56.266 0.00341254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18553 21:45:56.282 0.00020662 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 18554 21:45:56.282 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18555 21:45:56.282 0.00018291 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0A 18556 21:45:56.282 0.00022795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18557 21:45:56.282 0.00016356 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 18558 21:45:56.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18559 21:45:56.282 0.00009995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18560 21:45:56.282 0.00013472 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 18561 21:45:56.282 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18562 21:45:56.282 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18563 21:45:56.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18564 21:45:56.282 0.00581531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18565 21:45:56.282 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18566 21:45:56.282 0.00107773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18567 21:45:56.282 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18568 21:45:56.282 0.00105679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18569 21:45:56.282 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18570 21:45:56.282 0.00056375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18571 21:45:56.282 0.00007151 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18572 21:45:56.282 0.00117728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18573 21:45:56.282 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18574 21:45:56.282 0.00130054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18575 21:45:56.282 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18576 21:45:56.282 0.00119309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18577 21:45:56.282 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18578 21:45:56.282 0.00145699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18579 21:45:56.297 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18580 21:45:56.297 0.00079605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18581 21:45:56.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18582 21:45:56.297 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18583 21:45:56.297 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18584 21:45:56.297 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18585 21:45:56.297 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18586 21:45:56.297 0.00112948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18587 21:45:56.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18588 21:45:56.297 0.00136415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18589 21:45:56.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18590 21:45:56.297 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18591 21:45:56.297 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18592 21:45:56.297 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18593 21:45:56.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18594 21:45:56.297 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18595 21:45:56.297 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18596 21:45:56.297 0.00125077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18597 21:45:56.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18598 21:45:56.297 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18599 21:45:56.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18600 21:45:56.313 0.00138114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18601 21:45:56.313 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18602 21:45:56.313 0.00119506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18603 21:45:56.313 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18604 21:45:56.313 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18605 21:45:56.313 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18606 21:45:56.313 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18607 21:45:56.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18608 21:45:56.313 0.00139891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18609 21:45:56.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18610 21:45:56.313 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18611 21:45:56.313 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18612 21:45:56.313 0.00143091 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18613 21:45:56.313 0.00009165 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18614 21:45:56.313 0.00114410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18615 21:45:56.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18616 21:45:56.313 0.00117175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18617 21:45:56.313 0.00016316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18618 21:45:56.313 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18619 21:45:56.313 0.00012128 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18620 21:45:56.313 0.00112198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18621 21:45:56.329 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18622 21:45:56.329 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18623 21:45:56.329 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18624 21:45:56.329 0.00131082 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18625 21:45:56.329 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18626 21:45:56.329 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18627 21:45:56.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18628 21:45:56.329 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18629 21:45:56.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18630 21:45:56.329 0.00144435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18631 21:45:56.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18632 21:45:56.329 0.00114963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18633 21:45:56.329 0.00011970 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18634 21:45:56.329 0.00124128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18635 21:45:56.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18636 21:45:56.329 0.00152375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18637 21:45:56.329 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18638 21:45:56.329 0.00087625 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18639 21:45:56.329 0.00009521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18640 21:45:56.329 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18641 21:45:56.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18642 21:45:56.329 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18643 21:45:56.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18644 21:45:56.344 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18645 21:45:56.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18646 21:45:56.344 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18647 21:45:56.344 0.00010706 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18648 21:45:56.344 0.00115121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18649 21:45:56.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18650 21:45:56.344 0.00148662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18651 21:45:56.344 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18652 21:45:56.344 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18653 21:45:56.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18654 21:45:56.344 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18655 21:45:56.344 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18656 21:45:56.344 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18657 21:45:56.344 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18658 21:45:56.344 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18659 21:45:56.344 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18660 21:45:56.344 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18661 21:45:56.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18662 21:45:56.344 0.00138785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18663 21:45:56.344 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18664 21:45:56.360 0.00132504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18665 21:45:56.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18666 21:45:56.360 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18667 21:45:56.360 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18668 21:45:56.360 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18669 21:45:56.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18670 21:45:56.360 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18671 21:45:56.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18672 21:45:56.360 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18673 21:45:56.360 0.00004504 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18674 21:45:56.360 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18675 21:45:56.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18676 21:45:56.360 0.00137600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18677 21:45:56.360 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18678 21:45:56.360 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18679 21:45:56.360 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18680 21:45:56.360 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18681 21:45:56.360 0.00007743 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18682 21:45:56.360 0.00138074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18683 21:45:56.360 0.00008533 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18684 21:45:56.360 0.00104217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18685 21:45:56.376 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18686 21:45:56.376 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18687 21:45:56.376 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18688 21:45:56.376 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18689 21:45:56.376 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18690 21:45:56.376 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18691 21:45:56.376 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18692 21:45:56.376 0.00150400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18693 21:45:56.376 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18694 21:45:56.376 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18695 21:45:56.376 0.00005886 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18696 21:45:56.376 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18697 21:45:56.376 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18698 21:45:56.376 0.00139457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18699 21:45:56.376 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18700 21:45:56.376 0.00156879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18701 21:45:56.376 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 18702 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 18703 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0A 18704 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 18705 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 18706 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18707 21:45:56.376 0.00012207 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18708 21:45:56.376 0.00006400 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18709 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18710 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18711 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18712 21:45:56.376 0.00006953 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18713 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18714 21:45:56.376 0.00008731 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18715 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18716 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18717 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18718 21:45:56.376 0.00001620 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18719 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18720 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18721 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18722 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18723 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18724 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18725 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18726 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18727 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18728 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18729 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18730 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18731 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18732 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18733 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18734 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18735 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18736 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18737 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18738 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18739 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18740 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18741 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18742 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18743 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18744 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18745 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18746 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18747 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18748 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18749 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18750 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18751 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18752 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18753 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18754 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18755 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18756 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18757 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18758 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18759 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18760 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18761 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18762 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18763 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18764 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18765 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18766 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18767 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18768 21:45:56.376 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18769 21:45:56.376 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18770 21:45:56.376 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 18771 21:45:56.376 0.00015526 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 18772 21:45:56.376 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18773 21:45:56.376 0.00195595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18774 21:45:56.376 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18775 21:45:56.376 0.00232454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18776 21:45:56.391 0.00028247 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 18777 21:45:56.391 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18778 21:45:56.391 0.00025363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18779 21:45:56.391 0.00017462 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1A 18780 21:45:56.391 0.00009442 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 18781 21:45:56.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18782 21:45:56.391 0.00006874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18783 21:45:56.391 0.00020938 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 18784 21:45:56.391 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18785 21:45:56.391 0.00014617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18786 21:45:56.391 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18787 21:45:56.391 0.00512672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18788 21:45:56.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18789 21:45:56.391 0.00093551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18790 21:45:56.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18791 21:45:56.391 0.00101136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18792 21:45:56.391 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18793 21:45:56.391 0.00092286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18794 21:45:56.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18795 21:45:56.391 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18796 21:45:56.391 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18797 21:45:56.391 0.00127921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18798 21:45:56.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18799 21:45:56.391 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18800 21:45:56.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18801 21:45:56.391 0.00149570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18802 21:45:56.407 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18803 21:45:56.407 0.00108642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18804 21:45:56.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18805 21:45:56.407 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18806 21:45:56.407 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18807 21:45:56.407 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18808 21:45:56.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18809 21:45:56.407 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18810 21:45:56.407 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18811 21:45:56.407 0.00137995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18812 21:45:56.407 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18813 21:45:56.407 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18814 21:45:56.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18815 21:45:56.407 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18816 21:45:56.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18817 21:45:56.407 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18818 21:45:56.407 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18819 21:45:56.407 0.00119072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18820 21:45:56.407 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18821 21:45:56.407 0.00139654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18822 21:45:56.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18823 21:45:56.422 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18824 21:45:56.422 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18825 21:45:56.422 0.00137007 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18826 21:45:56.422 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18827 21:45:56.422 0.00135072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18828 21:45:56.422 0.00003477 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18829 21:45:56.422 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18830 21:45:56.422 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18831 21:45:56.422 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18832 21:45:56.422 0.00008454 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18833 21:45:56.422 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18834 21:45:56.422 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18835 21:45:56.422 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18836 21:45:56.422 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18837 21:45:56.422 0.00140010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18838 21:45:56.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18839 21:45:56.422 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18840 21:45:56.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18841 21:45:56.422 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18842 21:45:56.422 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18843 21:45:56.422 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18844 21:45:56.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18845 21:45:56.438 0.00141511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18846 21:45:56.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18847 21:45:56.438 0.00138311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18848 21:45:56.438 0.00011338 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18849 21:45:56.438 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18850 21:45:56.438 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18851 21:45:56.438 0.00120178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18852 21:45:56.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18853 21:45:56.438 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18854 21:45:56.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18855 21:45:56.438 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18856 21:45:56.438 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18857 21:45:56.438 0.00136810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18858 21:45:56.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18859 21:45:56.438 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18860 21:45:56.438 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18861 21:45:56.438 0.00141235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18862 21:45:56.438 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18863 21:45:56.438 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18864 21:45:56.438 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18865 21:45:56.438 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18866 21:45:56.454 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18867 21:45:56.454 0.00120454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18868 21:45:56.454 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18869 21:45:56.454 0.00152178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18870 21:45:56.454 0.00016988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18871 21:45:56.454 0.00073679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18872 21:45:56.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18873 21:45:56.454 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18874 21:45:56.454 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18875 21:45:56.454 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18876 21:45:56.454 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18877 21:45:56.454 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18878 21:45:56.454 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18879 21:45:56.454 0.00123141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18880 21:45:56.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18881 21:45:56.454 0.00129383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18882 21:45:56.454 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18883 21:45:56.454 0.00138193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18884 21:45:56.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18885 21:45:56.454 0.00139457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18886 21:45:56.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18887 21:45:56.469 0.00113343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18888 21:45:56.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18889 21:45:56.469 0.00121837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18890 21:45:56.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18891 21:45:56.469 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18892 21:45:56.469 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18893 21:45:56.469 0.00138627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18894 21:45:56.469 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18895 21:45:56.469 0.00097422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18896 21:45:56.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18897 21:45:56.469 0.00119822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18898 21:45:56.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18899 21:45:56.469 0.00131240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18900 21:45:56.469 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18901 21:45:56.469 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18902 21:45:56.469 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18903 21:45:56.469 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18904 21:45:56.469 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18905 21:45:56.469 0.00129778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18906 21:45:56.469 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18907 21:45:56.469 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18908 21:45:56.485 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18909 21:45:56.485 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18910 21:45:56.485 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18911 21:45:56.485 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18912 21:45:56.485 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18913 21:45:56.485 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18914 21:45:56.485 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18915 21:45:56.485 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18916 21:45:56.485 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18917 21:45:56.485 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18918 21:45:56.485 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18919 21:45:56.485 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18920 21:45:56.485 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18921 21:45:56.485 0.00144316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18922 21:45:56.485 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18923 21:45:56.485 0.00099358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18924 21:45:56.485 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 18925 21:45:56.485 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 18926 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1A 18927 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 18928 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 18929 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18930 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18931 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18932 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18933 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18934 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18935 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18936 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18937 21:45:56.485 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18938 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18939 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18940 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18941 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18942 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18943 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18944 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18945 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18946 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18947 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18948 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18949 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18950 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18951 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18952 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18953 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18954 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18955 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18956 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18957 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18958 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18959 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18960 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18961 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18962 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18963 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18964 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18965 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18966 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18967 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18968 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18969 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18970 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18971 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18972 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18973 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18974 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18975 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18976 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18977 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18978 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18979 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18980 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18981 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18982 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18983 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18984 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18985 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18986 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18987 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18988 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18989 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18990 21:45:56.485 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18991 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18992 21:45:56.485 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 18993 21:45:56.485 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 18994 21:45:56.485 0.00010114 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 18995 21:45:56.485 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18996 21:45:56.485 0.00182479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18997 21:45:56.485 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 18998 21:45:56.485 0.00266272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 18999 21:45:56.501 0.00014222 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 19000 21:45:56.501 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19003 21:45:56.501 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19004 21:45:56.501 0.00012523 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 19005 21:45:56.501 0.00015842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19006 21:45:56.501 0.00010311 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 19007 21:45:56.501 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19008 21:45:56.501 0.00007743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19009 21:45:56.501 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19010 21:45:56.501 0.00623526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19011 21:45:56.501 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19012 21:45:56.501 0.00062775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19013 21:45:56.501 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19014 21:45:56.501 0.00107101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19015 21:45:56.501 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19016 21:45:56.501 0.00104138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19017 21:45:56.501 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19018 21:45:56.501 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19019 21:45:56.501 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19020 21:45:56.501 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19021 21:45:56.501 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19022 21:45:56.501 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19023 21:45:56.501 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19024 21:45:56.501 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19025 21:45:56.516 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19026 21:45:56.516 0.00058825 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19027 21:45:56.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19028 21:45:56.516 0.00140326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19029 21:45:56.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19030 21:45:56.516 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19031 21:45:56.516 0.00010035 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19032 21:45:56.516 0.00116938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19033 21:45:56.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19034 21:45:56.516 0.00118756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19035 21:45:56.516 0.00010864 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19036 21:45:56.516 0.00111644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19037 21:45:56.516 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19038 21:45:56.516 0.00142973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19039 21:45:56.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19040 21:45:56.516 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19041 21:45:56.516 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19042 21:45:56.516 0.00119111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19043 21:45:56.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19044 21:45:56.516 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19045 21:45:56.516 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19046 21:45:56.516 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19047 21:45:56.532 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19048 21:45:56.532 0.00131516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19049 21:45:56.532 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19050 21:45:56.532 0.00138272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19051 21:45:56.532 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19052 21:45:56.532 0.00115832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19053 21:45:56.532 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19054 21:45:56.532 0.00139891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19055 21:45:56.532 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19056 21:45:56.532 0.00128869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19057 21:45:56.532 0.00003635 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19058 21:45:56.532 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19059 21:45:56.532 0.00008533 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19060 21:45:56.532 0.00112158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19061 21:45:56.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19062 21:45:56.532 0.00147003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19063 21:45:56.532 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19064 21:45:56.532 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19065 21:45:56.532 0.00006163 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19066 21:45:56.532 0.00136059 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19067 21:45:56.547 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19068 21:45:56.547 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19069 21:45:56.547 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19070 21:45:56.547 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19071 21:45:56.547 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19072 21:45:56.547 0.00124207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19073 21:45:56.547 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19074 21:45:56.547 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19075 21:45:56.547 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19076 21:45:56.547 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19077 21:45:56.547 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19078 21:45:56.547 0.00137600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19079 21:45:56.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19080 21:45:56.547 0.00141630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19081 21:45:56.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19082 21:45:56.547 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19083 21:45:56.547 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19084 21:45:56.547 0.00142775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19085 21:45:56.547 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19086 21:45:56.547 0.00150321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19087 21:45:56.547 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19088 21:45:56.547 0.00145067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19089 21:45:56.563 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19090 21:45:56.563 0.00104296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19091 21:45:56.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19092 21:45:56.563 0.00109274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19093 21:45:56.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19094 21:45:56.563 0.00142815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19095 21:45:56.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19096 21:45:56.563 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19097 21:45:56.563 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19098 21:45:56.563 0.00119585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19099 21:45:56.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19100 21:45:56.563 0.00146528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19101 21:45:56.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19102 21:45:56.563 0.00145975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19103 21:45:56.563 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19104 21:45:56.563 0.00107931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19105 21:45:56.563 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19106 21:45:56.563 0.00120968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19107 21:45:56.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19108 21:45:56.563 0.00127447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19109 21:45:56.563 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19110 21:45:56.563 0.00141077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19111 21:45:56.579 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19112 21:45:56.579 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19113 21:45:56.579 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19114 21:45:56.579 0.00149491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19115 21:45:56.579 0.00007941 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19116 21:45:56.579 0.00122390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19117 21:45:56.579 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19118 21:45:56.579 0.00122746 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19119 21:45:56.579 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19120 21:45:56.579 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19121 21:45:56.579 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19122 21:45:56.579 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19123 21:45:56.579 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19124 21:45:56.579 0.00142657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19125 21:45:56.579 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19126 21:45:56.579 0.00160277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19127 21:45:56.579 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19128 21:45:56.579 0.00085294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19129 21:45:56.579 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19130 21:45:56.579 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19131 21:45:56.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19132 21:45:56.594 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19133 21:45:56.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19134 21:45:56.594 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19135 21:45:56.594 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19136 21:45:56.594 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19137 21:45:56.594 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19138 21:45:56.594 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19139 21:45:56.594 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19140 21:45:56.594 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19141 21:45:56.594 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19142 21:45:56.594 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19143 21:45:56.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19144 21:45:56.594 0.00131121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19145 21:45:56.594 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19146 21:45:56.594 0.00090943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19147 21:45:56.594 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 19148 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 19149 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0A 19150 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 19151 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 19152 21:45:56.594 0.00002252 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19153 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19154 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19155 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19156 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19157 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19158 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19159 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19160 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19161 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19162 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19163 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19164 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19165 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19166 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19167 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19168 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19169 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19170 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19171 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19172 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19173 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19174 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19175 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19176 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19177 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19178 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19179 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19180 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19181 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19182 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19183 21:45:56.594 0.00004662 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19184 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19185 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19186 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19187 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19188 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19189 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19190 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19191 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19192 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19193 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19194 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19195 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19196 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19197 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19198 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19199 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19200 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19201 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19202 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19203 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19204 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19205 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19206 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19207 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19208 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19209 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19210 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19211 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19212 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19213 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19214 21:45:56.594 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19215 21:45:56.594 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19216 21:45:56.594 0.00002331 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 19217 21:45:56.594 0.00018765 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 19218 21:45:56.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19219 21:45:56.594 0.00183388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19220 21:45:56.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19221 21:45:56.594 0.00254420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19222 21:45:56.609 0.00028168 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 19223 21:45:56.609 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19224 21:45:56.609 0.00028484 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19225 21:45:56.609 0.00025837 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1A 19226 21:45:56.609 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19227 21:45:56.609 0.00029946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19228 21:45:56.609 0.00022163 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 19229 21:45:56.609 0.00035002 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 19230 21:45:56.609 0.00007862 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19231 21:45:56.609 0.00020978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19232 21:45:56.609 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19233 21:45:56.609 0.00454914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19234 21:45:56.609 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19235 21:45:56.609 0.00101294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19236 21:45:56.609 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19237 21:45:56.609 0.00109077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19238 21:45:56.609 0.00015802 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19239 21:45:56.609 0.00081817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19240 21:45:56.609 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19241 21:45:56.609 0.00125946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19242 21:45:56.609 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19243 21:45:56.609 0.00144830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19244 21:45:56.609 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19245 21:45:56.609 0.00121758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19246 21:45:56.609 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19247 21:45:56.609 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19248 21:45:56.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19249 21:45:56.625 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19250 21:45:56.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19251 21:45:56.625 0.00125748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19252 21:45:56.625 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19253 21:45:56.625 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19254 21:45:56.625 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19255 21:45:56.625 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19256 21:45:56.625 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19257 21:45:56.625 0.00135032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19258 21:45:56.625 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19259 21:45:56.625 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19262 21:45:56.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19263 21:45:56.625 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19264 21:45:56.625 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19265 21:45:56.625 0.00128316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19266 21:45:56.625 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19267 21:45:56.625 0.00160751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19268 21:45:56.641 0.00008336 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19269 21:45:56.641 0.00096830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19270 21:45:56.641 0.00006163 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19271 21:45:56.641 0.00106509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19272 21:45:56.641 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19273 21:45:56.641 0.00118558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19274 21:45:56.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19275 21:45:56.641 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19276 21:45:56.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19277 21:45:56.641 0.00136928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19278 21:45:56.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19279 21:45:56.641 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19280 21:45:56.641 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19281 21:45:56.641 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19282 21:45:56.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19283 21:45:56.641 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19284 21:45:56.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19285 21:45:56.641 0.00139733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19286 21:45:56.641 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19287 21:45:56.641 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19288 21:45:56.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19289 21:45:56.641 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19290 21:45:56.656 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19291 21:45:56.656 0.00120889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19292 21:45:56.656 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19293 21:45:56.656 0.00115951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19294 21:45:56.656 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19295 21:45:56.656 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19296 21:45:56.656 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19297 21:45:56.656 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19298 21:45:56.656 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19299 21:45:56.656 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19300 21:45:56.656 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19301 21:45:56.656 0.00120375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19302 21:45:56.656 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19303 21:45:56.656 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19304 21:45:56.656 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19305 21:45:56.656 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19306 21:45:56.656 0.00012721 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19307 21:45:56.656 0.00113501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19308 21:45:56.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19309 21:45:56.656 0.00128514 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19310 21:45:56.656 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19311 21:45:56.656 0.00238064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19312 21:45:56.672 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19313 21:45:56.672 0.00010785 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19314 21:45:56.672 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19315 21:45:56.672 0.00156721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19316 21:45:56.672 0.00000988 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19317 21:45:56.672 0.00119941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19318 21:45:56.672 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19319 21:45:56.672 0.00124761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19320 21:45:56.672 0.00007269 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19321 21:45:56.672 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19322 21:45:56.672 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19323 21:45:56.672 0.00124247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19324 21:45:56.672 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19325 21:45:56.672 0.00134795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19326 21:45:56.672 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19327 21:45:56.672 0.00125116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19328 21:45:56.672 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19329 21:45:56.672 0.00120652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19330 21:45:56.672 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19331 21:45:56.672 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19332 21:45:56.672 0.00011378 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19333 21:45:56.672 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19334 21:45:56.688 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19335 21:45:56.688 0.00120138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19336 21:45:56.688 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19337 21:45:56.688 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19338 21:45:56.688 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19339 21:45:56.688 0.00112277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19340 21:45:56.688 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19341 21:45:56.688 0.00125274 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19342 21:45:56.688 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19343 21:45:56.688 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19344 21:45:56.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19345 21:45:56.688 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19346 21:45:56.688 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19347 21:45:56.688 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19348 21:45:56.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19349 21:45:56.688 0.00140326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19350 21:45:56.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19351 21:45:56.688 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19352 21:45:56.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19353 21:45:56.688 0.00140326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19354 21:45:56.688 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19355 21:45:56.688 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19356 21:45:56.703 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19357 21:45:56.703 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19358 21:45:56.703 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19359 21:45:56.703 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19360 21:45:56.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19361 21:45:56.703 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19362 21:45:56.703 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19363 21:45:56.703 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19364 21:45:56.703 0.00013432 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19365 21:45:56.703 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19366 21:45:56.703 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19367 21:45:56.703 0.00129659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19368 21:45:56.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19369 21:45:56.703 0.00169047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19370 21:45:56.703 0.00000356 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 19371 21:45:56.703 0.00002370 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 19372 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1A 19373 21:45:56.703 0.00001778 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 19374 21:45:56.703 0.00001738 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 19375 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19376 21:45:56.703 0.00003279 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19377 21:45:56.703 0.00002844 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19378 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19379 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19380 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19381 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19382 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19383 21:45:56.703 0.00004899 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19384 21:45:56.703 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19385 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19386 21:45:56.703 0.00003398 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19387 21:45:56.703 0.00004583 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19388 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19389 21:45:56.703 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19390 21:45:56.703 0.00002410 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19391 21:45:56.703 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19392 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19393 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19394 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19395 21:45:56.703 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19396 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19397 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19398 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19399 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19400 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19401 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19402 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19403 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19404 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19405 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19406 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19407 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19408 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19409 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19410 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19411 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19412 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19413 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19414 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19415 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19416 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19417 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19418 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19419 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19420 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19421 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19422 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19423 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19424 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19425 21:45:56.703 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19426 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19427 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19428 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19429 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19430 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19431 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19432 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19433 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19434 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19435 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19436 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19437 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19438 21:45:56.703 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19439 21:45:56.703 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 19440 21:45:56.703 0.00011299 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 19441 21:45:56.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19442 21:45:56.703 0.00191526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19443 21:45:56.703 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19444 21:45:56.703 0.00262045 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19445 21:45:56.719 0.00030301 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 19446 21:45:56.719 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19447 21:45:56.719 0.00016988 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19448 21:45:56.719 0.00012326 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0A 19449 21:45:56.719 0.00008810 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19450 21:45:56.719 0.00037333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19451 21:45:56.719 0.00034015 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 19452 21:45:56.719 0.00011417 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19453 21:45:56.719 0.00041956 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 19454 21:45:56.719 0.00035477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19455 21:45:56.719 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19456 21:45:56.719 0.00435990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19457 21:45:56.719 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19458 21:45:56.719 0.00098094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19459 21:45:56.719 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19460 21:45:56.719 0.00108682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19461 21:45:56.719 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19462 21:45:56.719 0.00095052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19463 21:45:56.719 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19464 21:45:56.719 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19465 21:45:56.719 0.00006677 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19466 21:45:56.719 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19467 21:45:56.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19468 21:45:56.719 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19469 21:45:56.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19470 21:45:56.719 0.00144119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19471 21:45:56.735 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19472 21:45:56.735 0.00126578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19473 21:45:56.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19474 21:45:56.735 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19475 21:45:56.735 0.00019714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19476 21:45:56.735 0.00109906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19477 21:45:56.735 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19478 21:45:56.735 0.00144198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19479 21:45:56.735 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19480 21:45:56.735 0.00118005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19481 21:45:56.735 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19482 21:45:56.735 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19483 21:45:56.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19484 21:45:56.735 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19485 21:45:56.735 0.00016514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19486 21:45:56.735 0.00119388 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19487 21:45:56.735 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19488 21:45:56.735 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19489 21:45:56.735 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19490 21:45:56.735 0.00145659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19491 21:45:56.750 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19492 21:45:56.750 0.00117531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19493 21:45:56.750 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19494 21:45:56.750 0.00142578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19495 21:45:56.750 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19496 21:45:56.750 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19497 21:45:56.750 0.00003832 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19498 21:45:56.750 0.00124840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19499 21:45:56.750 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19500 21:45:56.750 0.00155101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19501 21:45:56.750 0.00008257 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19502 21:45:56.750 0.00101294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19503 21:45:56.750 0.00011931 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19504 21:45:56.750 0.00108800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19505 21:45:56.750 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19506 21:45:56.750 0.00133610 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19507 21:45:56.750 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19508 21:45:56.750 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19509 21:45:56.750 0.00008296 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19510 21:45:56.750 0.00119704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19511 21:45:56.750 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19512 21:45:56.750 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19513 21:45:56.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19514 21:45:56.766 0.00143289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19515 21:45:56.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19516 21:45:56.766 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19517 21:45:56.766 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19518 21:45:56.766 0.00140286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19519 21:45:56.766 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19520 21:45:56.766 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19521 21:45:56.766 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19522 21:45:56.766 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19523 21:45:56.766 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19524 21:45:56.766 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19525 21:45:56.766 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19526 21:45:56.766 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19527 21:45:56.766 0.00011180 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19528 21:45:56.766 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19529 21:45:56.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19530 21:45:56.766 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19531 21:45:56.766 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19532 21:45:56.766 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19533 21:45:56.766 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19534 21:45:56.766 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19535 21:45:56.781 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19536 21:45:56.781 0.00117096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19537 21:45:56.781 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19538 21:45:56.781 0.00119980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19539 21:45:56.781 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19540 21:45:56.781 0.00141116 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19541 21:45:56.781 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19542 21:45:56.781 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19543 21:45:56.781 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19544 21:45:56.781 0.00122706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19545 21:45:56.781 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19546 21:45:56.781 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19547 21:45:56.781 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19548 21:45:56.781 0.00111526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19549 21:45:56.781 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19550 21:45:56.781 0.00122667 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19551 21:45:56.781 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19552 21:45:56.781 0.00128909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19553 21:45:56.781 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19554 21:45:56.781 0.00142617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19555 21:45:56.781 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19556 21:45:56.781 0.00126815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19557 21:45:56.797 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19558 21:45:56.797 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19559 21:45:56.797 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19560 21:45:56.797 0.00139496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19561 21:45:56.797 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19562 21:45:56.797 0.00137007 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19563 21:45:56.797 0.00013156 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19564 21:45:56.797 0.00111486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19565 21:45:56.797 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19566 21:45:56.797 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19567 21:45:56.797 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19568 21:45:56.797 0.00136691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19569 21:45:56.797 0.00007506 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19570 21:45:56.797 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19571 21:45:56.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19572 21:45:56.797 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19573 21:45:56.797 0.00008494 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19574 21:45:56.797 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19575 21:45:56.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19576 21:45:56.797 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19577 21:45:56.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19578 21:45:56.813 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19579 21:45:56.813 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19580 21:45:56.813 0.00144277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19581 21:45:56.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19582 21:45:56.813 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19583 21:45:56.813 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19584 21:45:56.813 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19585 21:45:56.813 0.00008968 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19586 21:45:56.813 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19587 21:45:56.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19588 21:45:56.813 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19589 21:45:56.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19590 21:45:56.813 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19591 21:45:56.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19592 21:45:56.813 0.00165057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19593 21:45:56.813 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 19594 21:45:56.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 19595 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0A 19596 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 19597 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 19598 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19599 21:45:56.813 0.00003872 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19600 21:45:56.813 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19602 21:45:56.813 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19603 21:45:56.813 0.00002686 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19604 21:45:56.813 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19605 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19606 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19607 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19608 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19609 21:45:56.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19610 21:45:56.813 0.00003951 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19611 21:45:56.813 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19612 21:45:56.813 0.00001185 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19613 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19614 21:45:56.813 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19615 21:45:56.813 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19616 21:45:56.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19617 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19618 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19619 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19620 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19621 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19622 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19623 21:45:56.813 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19624 21:45:56.813 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19625 21:45:56.813 0.00000000 UV4BAND_E_CPS. IRP_MJ_READ COM1 Length: 0, Data: 19626 21:45:56.813 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19627 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19628 21:45:56.813 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19629 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19630 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19631 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19632 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19633 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19634 21:45:56.813 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19635 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19636 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19637 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19638 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19639 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19640 21:45:56.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19641 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19642 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19643 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19644 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19645 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19646 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19647 21:45:56.813 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19648 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19649 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19650 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19651 21:45:56.813 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19652 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19653 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19654 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19655 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19656 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19657 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19658 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19659 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19660 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19661 21:45:56.813 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19662 21:45:56.813 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 19663 21:45:56.813 0.00019279 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 19664 21:45:56.813 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19665 21:45:56.813 0.00175803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19666 21:45:56.813 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19667 21:45:56.813 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 19668 21:45:56.828 0.00016158 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 19669 21:45:56.828 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19670 21:45:56.828 0.00000000 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 Length: 1, Data: 1A 19671 21:45:56.828 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 19673 21:45:56.828 0.00042904 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 19674 21:45:56.828 0.00117254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19675 21:45:56.828 0.00017817 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 19676 21:45:56.828 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19677 21:45:56.828 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19678 21:45:56.828 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19679 21:45:56.828 0.00490509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19680 21:45:56.828 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19681 21:45:56.828 0.00087111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19682 21:45:56.828 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19683 21:45:56.828 0.00098331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19684 21:45:56.828 0.00007427 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19685 21:45:56.828 0.00096830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19686 21:45:56.828 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19687 21:45:56.828 0.00145422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19688 21:45:56.828 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19689 21:45:56.828 0.00109709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19690 21:45:56.828 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19691 21:45:56.828 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19692 21:45:56.828 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19693 21:45:56.828 0.00136968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19694 21:45:56.844 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19695 21:45:56.844 0.00123654 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19696 21:45:56.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19697 21:45:56.844 0.00134558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19698 21:45:56.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19699 21:45:56.844 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19700 21:45:56.844 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19701 21:45:56.844 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19702 21:45:56.844 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19703 21:45:56.844 0.00149768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19704 21:45:56.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19705 21:45:56.844 0.00116978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19706 21:45:56.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19707 21:45:56.844 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19708 21:45:56.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19709 21:45:56.844 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19710 21:45:56.844 0.00017659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19711 21:45:56.844 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19712 21:45:56.844 0.00003200 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19713 21:45:56.844 0.00098607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19714 21:45:56.844 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19715 21:45:56.844 0.00113936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19716 21:45:56.860 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19717 21:45:56.860 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19718 21:45:56.860 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19719 21:45:56.860 0.00119309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19720 21:45:56.860 0.00008652 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19721 21:45:56.860 0.00091062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19722 21:45:56.860 0.00015368 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19723 21:45:56.860 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19724 21:45:56.860 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19725 21:45:56.860 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19726 21:45:56.860 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19727 21:45:56.860 0.00140879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19728 21:45:56.860 0.00009007 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19729 21:45:56.860 0.00117017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19730 21:45:56.860 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19731 21:45:56.860 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19732 21:45:56.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19733 21:45:56.860 0.00137679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19734 21:45:56.860 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19735 21:45:56.860 0.00115240 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19736 21:45:56.875 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19737 21:45:56.875 0.00133452 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19738 21:45:56.875 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19739 21:45:56.875 0.00114173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19740 21:45:56.875 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19741 21:45:56.875 0.00126854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19742 21:45:56.875 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19743 21:45:56.875 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19744 21:45:56.875 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19745 21:45:56.875 0.00145699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19746 21:45:56.875 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19747 21:45:56.875 0.00122706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19748 21:45:56.875 0.00007743 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19749 21:45:56.875 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19750 21:45:56.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19751 21:45:56.875 0.00130844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19752 21:45:56.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19753 21:45:56.875 0.00128632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19754 21:45:56.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19755 21:45:56.875 0.00139812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19756 21:45:56.875 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19757 21:45:56.875 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19758 21:45:56.891 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19759 21:45:56.891 0.00116148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19760 21:45:56.891 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19761 21:45:56.891 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19762 21:45:56.891 0.00004583 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19763 21:45:56.891 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19764 21:45:56.891 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19765 21:45:56.891 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19766 21:45:56.891 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19767 21:45:56.891 0.00131595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19768 21:45:56.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19769 21:45:56.891 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19770 21:45:56.891 0.00005728 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19771 21:45:56.891 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19772 21:45:56.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19773 21:45:56.891 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19774 21:45:56.891 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19775 21:45:56.891 0.00130568 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19776 21:45:56.891 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19777 21:45:56.891 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19778 21:45:56.891 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19779 21:45:56.891 0.00150953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19780 21:45:56.906 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19781 21:45:56.906 0.00104257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19782 21:45:56.906 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19783 21:45:56.906 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19784 21:45:56.906 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19785 21:45:56.906 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19786 21:45:56.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19787 21:45:56.906 0.00122232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19788 21:45:56.906 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19789 21:45:56.906 0.00159763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19790 21:45:56.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19791 21:45:56.906 0.00124721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19792 21:45:56.906 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19793 21:45:56.906 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19794 21:45:56.906 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19795 21:45:56.906 0.00138627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19796 21:45:56.906 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19797 21:45:56.906 0.00139852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19798 21:45:56.906 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19799 21:45:56.906 0.00130765 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19800 21:45:56.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19801 21:45:56.922 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19802 21:45:56.922 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19803 21:45:56.922 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19804 21:45:56.922 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19805 21:45:56.922 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19806 21:45:56.922 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19807 21:45:56.922 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19808 21:45:56.922 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19809 21:45:56.922 0.00127526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19810 21:45:56.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19811 21:45:56.922 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19812 21:45:56.922 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19813 21:45:56.922 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19814 21:45:56.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19815 21:45:56.922 0.00142301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19816 21:45:56.922 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 19817 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 19818 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1A 19819 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 19820 21:45:56.922 0.00003990 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 19821 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19822 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19823 21:45:56.922 0.00003951 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19824 21:45:56.922 0.00004109 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19825 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19826 21:45:56.922 0.00003200 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19827 21:45:56.922 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19828 21:45:56.922 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19829 21:45:56.922 0.00003635 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19830 21:45:56.922 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19831 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19832 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19833 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19834 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19835 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19836 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19837 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19838 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19839 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19840 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19841 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19842 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19843 21:45:56.922 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19844 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19845 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19846 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19847 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19848 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19849 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19850 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19851 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19852 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19853 21:45:56.922 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19854 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19855 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19856 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19857 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19858 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19859 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19860 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19861 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19862 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19863 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19864 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19865 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19866 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19867 21:45:56.922 0.00003516 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19868 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19869 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19870 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19871 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19872 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19873 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19874 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19875 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19876 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19877 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19878 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19879 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19880 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19881 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19882 21:45:56.922 0.00000000 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19883 21:45:56.922 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19884 21:45:56.922 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 19885 21:45:56.922 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 19886 21:45:56.922 0.00012919 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 19887 21:45:56.922 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19888 21:45:56.922 0.00199506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19889 21:45:56.922 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19890 21:45:56.922 0.00241541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19891 21:45:56.938 0.00026746 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 19892 21:45:56.938 0.00004622 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19893 21:45:56.938 0.00028247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19894 21:45:56.938 0.00012049 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0B 19895 21:45:56.938 0.00013235 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 19896 21:45:56.938 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19897 21:45:56.938 0.00006084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19898 21:45:56.938 0.00013748 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 19899 21:45:56.938 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19900 21:45:56.938 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19901 21:45:56.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19902 21:45:56.938 0.00579200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19903 21:45:56.938 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19904 21:45:56.938 0.00095644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19905 21:45:56.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19906 21:45:56.938 0.00100385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19907 21:45:56.938 0.00003556 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19908 21:45:56.938 0.00094222 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19909 21:45:56.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19910 21:45:56.938 0.00137640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19911 21:45:56.938 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19912 21:45:56.938 0.00131121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19913 21:45:56.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19914 21:45:56.938 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19915 21:45:56.938 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19916 21:45:56.938 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19917 21:45:56.953 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19918 21:45:56.953 0.00054953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19919 21:45:56.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19920 21:45:56.953 0.00146489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19921 21:45:56.953 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19922 21:45:56.953 0.00108840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19923 21:45:56.953 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19924 21:45:56.953 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19925 21:45:56.953 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19926 21:45:56.953 0.00120731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19927 21:45:56.953 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19928 21:45:56.953 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19929 21:45:56.953 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19930 21:45:56.953 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19931 21:45:56.953 0.00003832 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19932 21:45:56.953 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19934 21:45:56.953 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19935 21:45:56.953 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19936 21:45:56.953 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19937 21:45:56.953 0.00054400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19938 21:45:56.969 0.00083951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19939 21:45:56.969 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19940 21:45:56.969 0.00126301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19941 21:45:56.969 0.00002489 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19942 21:45:56.969 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19943 21:45:56.969 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19944 21:45:56.969 0.00122509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19945 21:45:56.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19946 21:45:56.969 0.00125630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19947 21:45:56.969 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19948 21:45:56.969 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19949 21:45:56.969 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19950 21:45:56.969 0.00142617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19951 21:45:56.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19952 21:45:56.969 0.00146252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19953 21:45:56.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19954 21:45:56.969 0.00143921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19955 21:45:56.969 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19956 21:45:56.969 0.00145027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19957 21:45:56.969 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19958 21:45:56.969 0.00104178 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19959 21:45:56.969 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19960 21:45:56.969 0.00147516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19961 21:45:56.985 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19962 21:45:56.985 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19963 21:45:56.985 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19964 21:45:56.985 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19965 21:45:56.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19966 21:45:56.985 0.00169284 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19967 21:45:56.985 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19968 21:45:56.985 0.00086044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19969 21:45:56.985 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19970 21:45:56.985 0.00117254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19971 21:45:56.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19972 21:45:56.985 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19973 21:45:56.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19974 21:45:56.985 0.00139733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19975 21:45:56.985 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19976 21:45:56.985 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19977 21:45:56.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19978 21:45:56.985 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19979 21:45:56.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19980 21:45:56.985 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19981 21:45:57.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19982 21:45:57.000 0.00142657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19983 21:45:57.000 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19984 21:45:57.000 0.00123891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19985 21:45:57.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19986 21:45:57.000 0.00130924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19987 21:45:57.000 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19988 21:45:57.000 0.00140919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19989 21:45:57.000 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19990 21:45:57.000 0.00144790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19991 21:45:57.000 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19992 21:45:57.000 0.00107733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19993 21:45:57.000 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19994 21:45:57.000 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19995 21:45:57.000 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19996 21:45:57.000 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19997 21:45:57.000 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 19998 21:45:57.000 0.00146094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 19999 21:45:57.000 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20000 21:45:57.000 0.00138509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20001 21:45:57.000 0.00008889 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20002 21:45:57.000 0.00121640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20003 21:45:57.016 0.00004148 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20004 21:45:57.016 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20005 21:45:57.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20006 21:45:57.016 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20007 21:45:57.016 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20008 21:45:57.016 0.00132701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20009 21:45:57.016 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20010 21:45:57.016 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20011 21:45:57.016 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20012 21:45:57.016 0.00129817 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20013 21:45:57.016 0.00005886 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20014 21:45:57.016 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20015 21:45:57.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20016 21:45:57.016 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20017 21:45:57.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20018 21:45:57.016 0.00135269 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20019 21:45:57.016 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20020 21:45:57.016 0.00128948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20021 21:45:57.016 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20022 21:45:57.016 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20023 21:45:57.016 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20024 21:45:57.016 0.00137403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20025 21:45:57.032 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20026 21:45:57.032 0.00133728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20027 21:45:57.032 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20028 21:45:57.032 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20029 21:45:57.032 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20030 21:45:57.032 0.00094380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20031 21:45:57.032 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20032 21:45:57.032 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20033 21:45:57.032 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20034 21:45:57.032 0.00120138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20035 21:45:57.032 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20036 21:45:57.032 0.00143882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20037 21:45:57.032 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20038 21:45:57.032 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20039 21:45:57.032 0.00003042 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 20040 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 20041 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0B 20042 21:45:57.032 0.00005570 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 20043 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 20044 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20045 21:45:57.032 0.00016316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20046 21:45:57.032 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20047 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20048 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20049 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20050 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20051 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20052 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20053 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20054 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20055 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20056 21:45:57.032 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20057 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20058 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20059 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20060 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20061 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20062 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20063 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20064 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20065 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20066 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20067 21:45:57.032 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20068 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20069 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20070 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20071 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20072 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20073 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20074 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20075 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20076 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20077 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20078 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20079 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20080 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20081 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20082 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20083 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20084 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20085 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20086 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20087 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20088 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20089 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20090 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20091 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20092 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20093 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20094 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20095 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20096 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20097 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20098 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20099 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20100 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20101 21:45:57.032 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20102 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20103 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20104 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20105 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20106 21:45:57.032 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20107 21:45:57.032 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20108 21:45:57.032 0.00001857 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 20109 21:45:57.032 0.00013946 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 20110 21:45:57.032 0.00008494 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20111 21:45:57.032 0.00181886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20112 21:45:57.032 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20113 21:45:57.032 0.00222815 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20114 21:45:57.047 0.00017225 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 20115 21:45:57.047 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20116 21:45:57.047 0.00023980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20117 21:45:57.047 0.00020780 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1B 20118 21:45:57.047 0.00013985 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 20119 21:45:57.047 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20120 21:45:57.047 0.00012840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20121 21:45:57.047 0.00019990 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 20122 21:45:57.047 0.00008889 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20123 21:45:57.047 0.00010983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20124 21:45:57.047 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20125 21:45:57.047 0.00567467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20126 21:45:57.047 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20127 21:45:57.047 0.00107062 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20128 21:45:57.047 0.00005689 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20129 21:45:57.047 0.00089916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20130 21:45:57.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20131 21:45:57.047 0.00099753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20132 21:45:57.047 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20133 21:45:57.047 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20134 21:45:57.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20135 21:45:57.047 0.00139536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20136 21:45:57.047 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20137 21:45:57.047 0.00130489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20138 21:45:57.047 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20140 21:45:57.063 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20141 21:45:57.063 0.00136217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20142 21:45:57.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20143 21:45:57.063 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20144 21:45:57.063 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20145 21:45:57.063 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20146 21:45:57.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20147 21:45:57.063 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20148 21:45:57.063 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20149 21:45:57.063 0.00123496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20150 21:45:57.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20151 21:45:57.063 0.00136691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20152 21:45:57.063 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20153 21:45:57.063 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20154 21:45:57.063 0.00007822 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20155 21:45:57.063 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20156 21:45:57.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20157 21:45:57.063 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20158 21:45:57.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20159 21:45:57.063 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20160 21:45:57.063 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20161 21:45:57.063 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20162 21:45:57.079 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20163 21:45:57.079 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20164 21:45:57.079 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20165 21:45:57.079 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20166 21:45:57.079 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20167 21:45:57.079 0.00123338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20168 21:45:57.079 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20169 21:45:57.079 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20170 21:45:57.079 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20171 21:45:57.079 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20172 21:45:57.079 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20173 21:45:57.079 0.00136138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20174 21:45:57.079 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20175 21:45:57.079 0.00151072 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20176 21:45:57.079 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20177 21:45:57.079 0.00116583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20178 21:45:57.079 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20179 21:45:57.079 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20180 21:45:57.079 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20181 21:45:57.079 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20182 21:45:57.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20183 21:45:57.094 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20184 21:45:57.094 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20185 21:45:57.094 0.00135585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20186 21:45:57.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20187 21:45:57.094 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20188 21:45:57.094 0.00013077 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20189 21:45:57.094 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20190 21:45:57.094 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20191 21:45:57.094 0.00134203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20192 21:45:57.094 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20193 21:45:57.094 0.00143684 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20194 21:45:57.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20195 21:45:57.094 0.00122509 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20196 21:45:57.094 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20197 21:45:57.094 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20198 21:45:57.094 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20199 21:45:57.094 0.00123338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20200 21:45:57.094 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20201 21:45:57.094 0.00144632 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20202 21:45:57.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20203 21:45:57.094 0.00121521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20204 21:45:57.109 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20205 21:45:57.109 0.00109353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20206 21:45:57.109 0.00004109 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20207 21:45:57.109 0.00124642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20208 21:45:57.109 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20209 21:45:57.109 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20210 21:45:57.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20211 21:45:57.109 0.00137640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20212 21:45:57.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20213 21:45:57.109 0.00133254 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20214 21:45:57.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20215 21:45:57.109 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20216 21:45:57.109 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20217 21:45:57.109 0.00140998 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20218 21:45:57.109 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20219 21:45:57.109 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20220 21:45:57.109 0.00005175 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20221 21:45:57.109 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20222 21:45:57.109 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20223 21:45:57.109 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20224 21:45:57.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20225 21:45:57.109 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20226 21:45:57.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20227 21:45:57.125 0.00140524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20228 21:45:57.125 0.00008731 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20229 21:45:57.125 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20230 21:45:57.125 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20231 21:45:57.125 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20232 21:45:57.125 0.00005965 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20233 21:45:57.125 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20234 21:45:57.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20235 21:45:57.125 0.00133768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20236 21:45:57.125 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20237 21:45:57.125 0.00135743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20238 21:45:57.125 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20239 21:45:57.125 0.00140919 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20240 21:45:57.125 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20241 21:45:57.125 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20242 21:45:57.125 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20243 21:45:57.125 0.00113659 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20244 21:45:57.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20245 21:45:57.125 0.00170035 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20246 21:45:57.141 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20247 21:45:57.141 0.00099556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20248 21:45:57.141 0.00017343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20249 21:45:57.141 0.00110854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20250 21:45:57.141 0.00011457 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20251 21:45:57.141 0.00112711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20252 21:45:57.141 0.00014499 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20253 21:45:57.141 0.00124168 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20254 21:45:57.141 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20255 21:45:57.141 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20256 21:45:57.141 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20257 21:45:57.141 0.00142973 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20258 21:45:57.141 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20259 21:45:57.141 0.00144119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20260 21:45:57.141 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20261 21:45:57.141 0.00120770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20262 21:45:57.141 0.00001304 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 20263 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 20264 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1B 20265 21:45:57.141 0.00002607 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 20266 21:45:57.141 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 20267 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20268 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20269 21:45:57.141 0.00003635 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20270 21:45:57.141 0.00002489 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20271 21:45:57.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20272 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20273 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20274 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20275 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20276 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20277 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20278 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20279 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20280 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20281 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20282 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20283 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20284 21:45:57.141 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20285 21:45:57.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20286 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20287 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20288 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20289 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20290 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20291 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20292 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20293 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20294 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20295 21:45:57.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20296 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20297 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20298 21:45:57.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20299 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20300 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20301 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20302 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20303 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20304 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20305 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20306 21:45:57.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20307 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20308 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20309 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20310 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20311 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20312 21:45:57.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20313 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20314 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20315 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20316 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20317 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20318 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20319 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20320 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20321 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20322 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20323 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20324 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20325 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20326 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20327 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20328 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20329 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20330 21:45:57.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20331 21:45:57.141 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 20332 21:45:57.141 0.00012721 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 20333 21:45:57.141 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20334 21:45:57.141 0.00198953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20335 21:45:57.141 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20336 21:45:57.141 0.00265087 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20337 21:45:57.156 0.00037965 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 20338 21:45:57.156 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20339 21:45:57.156 0.00039901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20340 21:45:57.156 0.00029867 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0B 20341 21:45:57.156 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20342 21:45:57.156 0.00036859 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 20343 21:45:57.156 0.00027891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20344 21:45:57.156 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20345 21:45:57.156 0.00020938 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 20346 21:45:57.156 0.00026943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20347 21:45:57.156 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20348 21:45:57.156 0.00517571 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20349 21:45:57.156 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20350 21:45:57.156 0.00094578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20351 21:45:57.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20352 21:45:57.156 0.00102361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20353 21:45:57.156 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20354 21:45:57.156 0.00096040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20355 21:45:57.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20356 21:45:57.156 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20357 21:45:57.156 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20358 21:45:57.156 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20359 21:45:57.156 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20360 21:45:57.156 0.00141748 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20361 21:45:57.156 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20362 21:45:57.156 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20363 21:45:57.172 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20364 21:45:57.172 0.00146015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20365 21:45:57.172 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20366 21:45:57.172 0.00100622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20367 21:45:57.172 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20368 21:45:57.172 0.00120968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20369 21:45:57.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20370 21:45:57.172 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20371 21:45:57.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20372 21:45:57.172 0.00138430 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20373 21:45:57.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20374 21:45:57.172 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20375 21:45:57.172 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20376 21:45:57.172 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20377 21:45:57.172 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20378 21:45:57.172 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20379 21:45:57.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20380 21:45:57.172 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20381 21:45:57.172 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20382 21:45:57.172 0.00113383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20383 21:45:57.172 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20384 21:45:57.172 0.00147990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20385 21:45:57.187 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20386 21:45:57.187 0.00119664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20387 21:45:57.187 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20388 21:45:57.187 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20389 21:45:57.187 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20390 21:45:57.187 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20391 21:45:57.187 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20392 21:45:57.187 0.00145185 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20393 21:45:57.187 0.00005531 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20394 21:45:57.187 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20395 21:45:57.187 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20396 21:45:57.187 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20397 21:45:57.187 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20398 21:45:57.187 0.00134203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20399 21:45:57.187 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20400 21:45:57.187 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20401 21:45:57.187 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20402 21:45:57.187 0.00146963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20403 21:45:57.187 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20404 21:45:57.187 0.00127842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20405 21:45:57.203 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20406 21:45:57.203 0.00150874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20407 21:45:57.203 0.00006519 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20408 21:45:57.203 0.00114252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20409 21:45:57.203 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20410 21:45:57.203 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20411 21:45:57.203 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20412 21:45:57.203 0.00128830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20413 21:45:57.203 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20414 21:45:57.203 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20415 21:45:57.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20416 21:45:57.203 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20417 21:45:57.203 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20418 21:45:57.203 0.00143289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20419 21:45:57.203 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20420 21:45:57.203 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20421 21:45:57.203 0.00016158 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20422 21:45:57.203 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20423 21:45:57.203 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20424 21:45:57.203 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20425 21:45:57.203 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20426 21:45:57.203 0.00137916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20427 21:45:57.219 0.00008573 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20428 21:45:57.219 0.00121640 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20429 21:45:57.219 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20430 21:45:57.219 0.00135822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20431 21:45:57.219 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20432 21:45:57.219 0.00137798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20433 21:45:57.219 0.00002212 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20434 21:45:57.219 0.00124840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20435 21:45:57.219 0.00002726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20436 21:45:57.219 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20437 21:45:57.219 0.00011220 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20438 21:45:57.219 0.00119111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20439 21:45:57.219 0.00004069 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20440 21:45:57.219 0.00141432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20441 21:45:57.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20442 21:45:57.219 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20443 21:45:57.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20444 21:45:57.219 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20445 21:45:57.219 0.00004701 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20446 21:45:57.219 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20447 21:45:57.219 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20448 21:45:57.219 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20449 21:45:57.235 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20450 21:45:57.235 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20451 21:45:57.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20452 21:45:57.235 0.00126262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20453 21:45:57.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20454 21:45:57.235 0.00150598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20455 21:45:57.235 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20456 21:45:57.235 0.00113462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20457 21:45:57.235 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20458 21:45:57.235 0.00115003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20459 21:45:57.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20460 21:45:57.235 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20461 21:45:57.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20462 21:45:57.235 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20463 21:45:57.235 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20464 21:45:57.235 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20465 21:45:57.235 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20466 21:45:57.235 0.00134361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20467 21:45:57.235 0.00004188 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20468 21:45:57.235 0.00126578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20469 21:45:57.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20470 21:45:57.235 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20471 21:45:57.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20472 21:45:57.250 0.00126380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20473 21:45:57.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20474 21:45:57.250 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20475 21:45:57.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20476 21:45:57.250 0.00129936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20477 21:45:57.250 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20478 21:45:57.250 0.00147832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20479 21:45:57.250 0.00008336 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20480 21:45:57.250 0.00126104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20481 21:45:57.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20482 21:45:57.250 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20483 21:45:57.250 0.00014775 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20484 21:45:57.250 0.00150282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20485 21:45:57.250 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 20486 21:45:57.250 0.00004069 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 20487 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0B 20488 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 20489 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 20490 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20491 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20492 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20493 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20494 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20495 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20496 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20497 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20498 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20499 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20500 21:45:57.250 0.00009323 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20501 21:45:57.250 0.00003398 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20502 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20503 21:45:57.250 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20504 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20505 21:45:57.250 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20506 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20507 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20508 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20509 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20510 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20511 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20512 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20513 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20514 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20515 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20516 21:45:57.250 0.00003437 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20517 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20518 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20519 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20520 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20521 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20522 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20523 21:45:57.250 0.00002489 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20524 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20525 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20526 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20527 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20528 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20529 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20530 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20531 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20532 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20533 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20534 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20535 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20536 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20537 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20538 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20539 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20540 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20541 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20542 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20543 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20544 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20545 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20546 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20547 21:45:57.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20548 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20549 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20550 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20551 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20552 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20553 21:45:57.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20554 21:45:57.250 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 20555 21:45:57.250 0.00014341 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 20556 21:45:57.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20557 21:45:57.250 0.00193580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20558 21:45:57.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20559 21:45:57.250 0.00215862 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20560 21:45:57.266 0.00020780 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 20561 21:45:57.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20562 21:45:57.266 0.00038756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20563 21:45:57.266 0.00023822 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1B 20564 21:45:57.266 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20565 21:45:57.266 0.00022558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20566 21:45:57.266 0.00021254 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 20567 21:45:57.266 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20568 21:45:57.266 0.00025047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20569 21:45:57.266 0.00019911 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 20570 21:45:57.266 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20571 21:45:57.266 0.00576909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20572 21:45:57.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20573 21:45:57.266 0.00097146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20574 21:45:57.266 0.00008217 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20575 21:45:57.266 0.00094775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20576 21:45:57.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20577 21:45:57.266 0.00111921 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20578 21:45:57.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20579 21:45:57.266 0.00131911 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20580 21:45:57.266 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20581 21:45:57.266 0.00123891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20582 21:45:57.266 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20583 21:45:57.266 0.00146173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20584 21:45:57.282 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20585 21:45:57.282 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20586 21:45:57.282 0.00009481 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20587 21:45:57.282 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20588 21:45:57.282 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20589 21:45:57.282 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20590 21:45:57.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20591 21:45:57.282 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20592 21:45:57.282 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20593 21:45:57.282 0.00129541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20594 21:45:57.282 0.00003832 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20595 21:45:57.282 0.00148780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20596 21:45:57.282 0.00008415 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20597 21:45:57.282 0.00112751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20598 21:45:57.282 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20599 21:45:57.282 0.00112316 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20600 21:45:57.282 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20602 21:45:57.282 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20603 21:45:57.282 0.00117886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20604 21:45:57.282 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20605 21:45:57.282 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20606 21:45:57.297 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20607 21:45:57.297 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20608 21:45:57.297 0.00008928 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20609 21:45:57.297 0.00121837 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20610 21:45:57.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20611 21:45:57.297 0.00141432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20612 21:45:57.297 0.00007111 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20613 21:45:57.297 0.00138153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20614 21:45:57.297 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20615 21:45:57.297 0.00118400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20616 21:45:57.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20617 21:45:57.297 0.00138153 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20618 21:45:57.297 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20619 21:45:57.297 0.00155694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20620 21:45:57.297 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20621 21:45:57.297 0.00096198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20622 21:45:57.297 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20623 21:45:57.297 0.00134321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20624 21:45:57.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20625 21:45:57.297 0.00128435 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20626 21:45:57.297 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20627 21:45:57.297 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20628 21:45:57.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20629 21:45:57.313 0.00135230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20630 21:45:57.313 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20631 21:45:57.313 0.00128395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20632 21:45:57.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20633 21:45:57.313 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20634 21:45:57.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20635 21:45:57.313 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20636 21:45:57.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20637 21:45:57.313 0.00138864 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20638 21:45:57.313 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20639 21:45:57.313 0.00129264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20640 21:45:57.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20641 21:45:57.313 0.00134203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20642 21:45:57.313 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20643 21:45:57.313 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20644 21:45:57.313 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20645 21:45:57.313 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20646 21:45:57.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20647 21:45:57.313 0.00124049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20648 21:45:57.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20649 21:45:57.313 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20650 21:45:57.328 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20651 21:45:57.328 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20652 21:45:57.328 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20653 21:45:57.328 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20654 21:45:57.328 0.00004543 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20655 21:45:57.328 0.00124879 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20656 21:45:57.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20657 21:45:57.328 0.00119941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20658 21:45:57.328 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20659 21:45:57.328 0.00119427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20660 21:45:57.328 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20661 21:45:57.328 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20662 21:45:57.328 0.00014301 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20663 21:45:57.328 0.00120889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20664 21:45:57.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20665 21:45:57.328 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20666 21:45:57.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20667 21:45:57.328 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20668 21:45:57.328 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20669 21:45:57.328 0.00129501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20670 21:45:57.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20671 21:45:57.344 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20672 21:45:57.344 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20673 21:45:57.344 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20674 21:45:57.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20675 21:45:57.344 0.00133294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20676 21:45:57.344 0.00005452 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20677 21:45:57.344 0.00119032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20678 21:45:57.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20679 21:45:57.344 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20680 21:45:57.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20681 21:45:57.344 0.00137561 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20682 21:45:57.344 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20683 21:45:57.344 0.00127882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20684 21:45:57.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20685 21:45:57.344 0.00139338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20686 21:45:57.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20687 21:45:57.344 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20688 21:45:57.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20689 21:45:57.344 0.00143842 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20690 21:45:57.344 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20691 21:45:57.344 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20692 21:45:57.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20694 21:45:57.360 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20695 21:45:57.360 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20696 21:45:57.360 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20697 21:45:57.360 0.00123931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20698 21:45:57.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20699 21:45:57.360 0.00126775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20700 21:45:57.360 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20701 21:45:57.360 0.00135309 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20702 21:45:57.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20703 21:45:57.360 0.00146607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20704 21:45:57.360 0.00023032 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20705 21:45:57.360 0.00104138 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20706 21:45:57.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20707 21:45:57.360 0.00170074 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20708 21:45:57.360 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 20709 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 20710 21:45:57.360 0.00003753 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1B 20711 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 20712 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 20713 21:45:57.360 0.00003872 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20714 21:45:57.360 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20715 21:45:57.360 0.00005333 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20716 21:45:57.360 0.00003081 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20717 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20718 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20719 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20720 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20721 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20722 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20723 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20724 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20725 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20726 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20727 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20728 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20729 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20730 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20731 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20732 21:45:57.360 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20733 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20734 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20735 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20736 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20737 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20738 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20739 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20740 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20741 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20742 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20743 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20744 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20745 21:45:57.360 0.00003477 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20746 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20747 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20748 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20749 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20750 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20751 21:45:57.360 0.00005215 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20752 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20753 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20754 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20755 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20756 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20757 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20758 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20759 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20760 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20761 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20762 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20763 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20764 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20765 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20766 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20767 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20768 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20769 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20770 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20771 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20772 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20773 21:45:57.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20774 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20775 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20776 21:45:57.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20777 21:45:57.360 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 20778 21:45:57.360 0.00011733 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 20779 21:45:57.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20780 21:45:57.360 0.00223526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20781 21:45:57.360 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20782 21:45:57.360 0.00123220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20783 21:45:57.375 0.00016948 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 20784 21:45:57.375 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20785 21:45:57.375 0.00016948 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20786 21:45:57.375 0.00012642 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0B 20787 21:45:57.375 0.00019911 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 20788 21:45:57.375 0.00002765 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20789 21:45:57.375 0.00011141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20790 21:45:57.375 0.00015881 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 20791 21:45:57.375 0.00028365 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20792 21:45:57.375 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20793 21:45:57.375 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20794 21:45:57.375 0.00645768 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20795 21:45:57.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20796 21:45:57.375 0.00104533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20797 21:45:57.375 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20798 21:45:57.375 0.00113264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20799 21:45:57.375 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20800 21:45:57.375 0.00100425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20801 21:45:57.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20802 21:45:57.375 0.00122469 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20803 21:45:57.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20804 21:45:57.375 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20805 21:45:57.375 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20806 21:45:57.375 0.00141669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20807 21:45:57.391 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20808 21:45:57.391 0.00136849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20809 21:45:57.391 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20810 21:45:57.391 0.00119585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20811 21:45:57.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20812 21:45:57.391 0.00143328 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20813 21:45:57.391 0.00010548 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20814 21:45:57.391 0.00115200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20815 21:45:57.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20816 21:45:57.391 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20817 21:45:57.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20818 21:45:57.391 0.00143210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20819 21:45:57.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20820 21:45:57.391 0.00121758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20821 21:45:57.391 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20822 21:45:57.391 0.00146805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20823 21:45:57.391 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20824 21:45:57.391 0.00108563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20825 21:45:57.391 0.00002094 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20826 21:45:57.391 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20827 21:45:57.391 0.00057521 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20828 21:45:57.407 0.00100583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20829 21:45:57.407 0.00013235 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20830 21:45:57.407 0.00091101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20831 21:45:57.407 0.00004464 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20832 21:45:57.407 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20833 21:45:57.407 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20834 21:45:57.407 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20835 21:45:57.407 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20836 21:45:57.407 0.00129343 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20837 21:45:57.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20838 21:45:57.407 0.00127210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20839 21:45:57.407 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20840 21:45:57.407 0.00140128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20841 21:45:57.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20842 21:45:57.407 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20845 21:45:57.407 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20846 21:45:57.407 0.00137877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20847 21:45:57.407 0.00003042 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20848 21:45:57.407 0.00141867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20849 21:45:57.422 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20850 21:45:57.422 0.00128119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20851 21:45:57.422 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20852 21:45:57.422 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20853 21:45:57.422 0.00006914 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20854 21:45:57.422 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20855 21:45:57.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20856 21:45:57.422 0.00136454 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20857 21:45:57.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20858 21:45:57.422 0.00142064 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20859 21:45:57.422 0.00002410 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20860 21:45:57.422 0.00134874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20863 21:45:57.422 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20864 21:45:57.422 0.00127565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20867 21:45:57.422 0.00012365 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20868 21:45:57.422 0.00112119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20869 21:45:57.422 0.00016316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20870 21:45:57.422 0.00116978 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20871 21:45:57.438 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20872 21:45:57.438 0.00146094 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20873 21:45:57.438 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20874 21:45:57.438 0.00114647 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20875 21:45:57.438 0.00007901 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20876 21:45:57.438 0.00124010 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20877 21:45:57.438 0.00012207 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20878 21:45:57.438 0.00105086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20879 21:45:57.438 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20880 21:45:57.438 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20881 21:45:57.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20882 21:45:57.438 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20883 21:45:57.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20884 21:45:57.438 0.00143486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20885 21:45:57.438 0.00006598 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20886 21:45:57.438 0.00118558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20887 21:45:57.438 0.00009916 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20888 21:45:57.438 0.00115437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20889 21:45:57.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20890 21:45:57.438 0.00141472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20891 21:45:57.453 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20892 21:45:57.453 0.00119901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20893 21:45:57.453 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20894 21:45:57.453 0.00127447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20895 21:45:57.453 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20896 21:45:57.453 0.00148464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20897 21:45:57.453 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20898 21:45:57.453 0.00118203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20899 21:45:57.453 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20900 21:45:57.453 0.00116464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20901 21:45:57.453 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20902 21:45:57.453 0.00132109 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20903 21:45:57.453 0.00013077 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20904 21:45:57.453 0.00125393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20905 21:45:57.453 0.00009560 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20906 21:45:57.453 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20907 21:45:57.453 0.00009402 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20908 21:45:57.453 0.00125788 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20909 21:45:57.453 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20910 21:45:57.453 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20911 21:45:57.453 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20912 21:45:57.453 0.00144830 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20913 21:45:57.469 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20914 21:45:57.469 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20915 21:45:57.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20916 21:45:57.469 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20917 21:45:57.469 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20918 21:45:57.469 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20919 21:45:57.469 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20920 21:45:57.469 0.00148583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20921 21:45:57.469 0.00013748 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20922 21:45:57.469 0.00087980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20923 21:45:57.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20924 21:45:57.469 0.00144553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20925 21:45:57.469 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20926 21:45:57.469 0.00130173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20927 21:45:57.469 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20928 21:45:57.469 0.00144711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20929 21:45:57.469 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 20930 21:45:57.469 0.00157867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 20931 21:45:57.469 0.00004385 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 20932 21:45:57.469 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 20933 21:45:57.469 0.00004069 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0B 20934 21:45:57.469 0.00001580 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 20935 21:45:57.469 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 20936 21:45:57.469 0.00003990 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20937 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20938 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20939 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20940 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20941 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20942 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20943 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20944 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20945 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20946 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20947 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20948 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20949 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20950 21:45:57.469 0.00004741 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20951 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20952 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20953 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20954 21:45:57.469 0.00001699 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20955 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20956 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20957 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20958 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20959 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20960 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20961 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20962 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20963 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20964 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20965 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20966 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20967 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20968 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20969 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20970 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20971 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20972 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20973 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20974 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20975 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20976 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20977 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20978 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20979 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20980 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20981 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20982 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20983 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20984 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20985 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20986 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20987 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20988 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20989 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20990 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20991 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20992 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20993 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20994 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20995 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20996 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20997 21:45:57.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20998 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 20999 21:45:57.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21000 21:45:57.469 0.00008178 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 21001 21:45:57.469 0.00018805 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 21002 21:45:57.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21003 21:45:57.469 0.00199743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21004 21:45:57.484 0.00015486 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 21005 21:45:57.484 0.00007190 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21006 21:45:57.484 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21007 21:45:57.484 0.00025758 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21008 21:45:57.484 0.00025442 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1B 21009 21:45:57.484 0.00009877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21010 21:45:57.484 0.00032277 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 21011 21:45:57.484 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21012 21:45:57.484 0.00016711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21013 21:45:57.484 0.00020346 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 21014 21:45:57.484 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21015 21:45:57.484 0.00017067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21016 21:45:57.484 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21017 21:45:57.484 0.00475378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21018 21:45:57.484 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21019 21:45:57.484 0.00085491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21020 21:45:57.484 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21021 21:45:57.484 0.00107931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21022 21:45:57.484 0.00007585 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21023 21:45:57.484 0.00092800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21024 21:45:57.484 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21025 21:45:57.484 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21026 21:45:57.484 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21027 21:45:57.484 0.00128277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21028 21:45:57.484 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21029 21:45:57.484 0.00134914 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21030 21:45:57.484 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21031 21:45:57.484 0.00145146 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21032 21:45:57.500 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21033 21:45:57.500 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21034 21:45:57.500 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21035 21:45:57.500 0.00138232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21036 21:45:57.500 0.00000909 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21037 21:45:57.500 0.00114844 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21038 21:45:57.500 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21039 21:45:57.500 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21040 21:45:57.500 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21041 21:45:57.500 0.00131358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21042 21:45:57.500 0.00009916 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21043 21:45:57.500 0.00126736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21044 21:45:57.500 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21045 21:45:57.500 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21046 21:45:57.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21047 21:45:57.500 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21048 21:45:57.500 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21049 21:45:57.500 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21050 21:45:57.500 0.00005294 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21051 21:45:57.500 0.00136770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21052 21:45:57.500 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21053 21:45:57.500 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21054 21:45:57.516 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21055 21:45:57.516 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21056 21:45:57.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21057 21:45:57.516 0.00128751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21058 21:45:57.516 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21059 21:45:57.516 0.00145422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21060 21:45:57.516 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21061 21:45:57.516 0.00141393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21062 21:45:57.516 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21063 21:45:57.516 0.00161383 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21064 21:45:57.516 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21065 21:45:57.516 0.00078894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21066 21:45:57.516 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21067 21:45:57.516 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21068 21:45:57.516 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21069 21:45:57.516 0.00125906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21070 21:45:57.516 0.00011180 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21071 21:45:57.516 0.00120415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21072 21:45:57.516 0.00007704 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21073 21:45:57.516 0.00133807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21074 21:45:57.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21075 21:45:57.532 0.00139101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21076 21:45:57.532 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21077 21:45:57.532 0.00118124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21078 21:45:57.532 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21079 21:45:57.532 0.00131398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21080 21:45:57.532 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21081 21:45:57.532 0.00134716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21082 21:45:57.532 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21083 21:45:57.532 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21084 21:45:57.532 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21085 21:45:57.532 0.00131990 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21086 21:45:57.532 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21087 21:45:57.532 0.00143407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21088 21:45:57.532 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21089 21:45:57.532 0.00134479 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21090 21:45:57.532 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21091 21:45:57.532 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21092 21:45:57.532 0.00012128 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21093 21:45:57.532 0.00099477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21094 21:45:57.532 0.00009363 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21095 21:45:57.532 0.00120415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21096 21:45:57.547 0.00009165 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21097 21:45:57.547 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21098 21:45:57.547 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21099 21:45:57.547 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21100 21:45:57.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21101 21:45:57.547 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21102 21:45:57.547 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21103 21:45:57.547 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21104 21:45:57.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21105 21:45:57.547 0.00140524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21106 21:45:57.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21107 21:45:57.547 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21108 21:45:57.547 0.00002173 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21109 21:45:57.547 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21110 21:45:57.547 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21111 21:45:57.547 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21112 21:45:57.547 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21113 21:45:57.547 0.00127644 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21114 21:45:57.547 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21115 21:45:57.547 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21116 21:45:57.547 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21117 21:45:57.547 0.00134282 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21118 21:45:57.563 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21119 21:45:57.563 0.00142380 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21120 21:45:57.563 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21121 21:45:57.563 0.00121995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21122 21:45:57.563 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21123 21:45:57.563 0.00131674 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21124 21:45:57.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21125 21:45:57.563 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21126 21:45:57.563 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21127 21:45:57.563 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21128 21:45:57.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21129 21:45:57.563 0.00134637 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21130 21:45:57.563 0.00009640 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21131 21:45:57.563 0.00111289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21132 21:45:57.563 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21133 21:45:57.563 0.00136296 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21134 21:45:57.563 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21135 21:45:57.563 0.00108247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21136 21:45:57.563 0.00007151 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21137 21:45:57.563 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21138 21:45:57.563 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21139 21:45:57.563 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21140 21:45:57.578 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21141 21:45:57.578 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21142 21:45:57.578 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21143 21:45:57.578 0.00132069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21144 21:45:57.578 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21145 21:45:57.578 0.00126894 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21146 21:45:57.578 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21147 21:45:57.578 0.00116820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21148 21:45:57.578 0.00012286 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21149 21:45:57.578 0.00134400 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21150 21:45:57.578 0.00001185 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21151 21:45:57.578 0.00117017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21152 21:45:57.578 0.00009442 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21153 21:45:57.578 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 21154 21:45:57.578 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21155 21:45:57.578 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 21156 21:45:57.578 0.00003002 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1B 21157 21:45:57.578 0.00002963 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 21158 21:45:57.578 0.00004385 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 21159 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21160 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21161 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21162 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21163 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21164 21:45:57.578 0.00004464 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21165 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21166 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21167 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21168 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21169 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21170 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21171 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21172 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21173 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21174 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21175 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21176 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21177 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21178 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21179 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21180 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21181 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21182 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21183 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21184 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21185 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21186 21:45:57.578 0.00003911 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21187 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21188 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21189 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21190 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21191 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21192 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21193 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21194 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21195 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21196 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21197 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21198 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21199 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21200 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21201 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21202 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21203 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21204 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21205 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21206 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21207 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21208 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21209 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21210 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21211 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21212 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21213 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21214 21:45:57.578 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21215 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21216 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21217 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21218 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21219 21:45:57.578 0.00001620 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21220 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21221 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21222 21:45:57.578 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21223 21:45:57.578 0.00003279 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 21224 21:45:57.578 0.00027101 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 21225 21:45:57.578 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21226 21:45:57.578 0.00197412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21227 21:45:57.578 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21228 21:45:57.578 0.00281956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21229 21:45:57.594 0.00021807 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 21230 21:45:57.594 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21231 21:45:57.594 0.00019516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21232 21:45:57.594 0.00012484 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0B 21233 21:45:57.594 0.00015881 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 21234 21:45:57.594 0.00005807 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21235 21:45:57.594 0.00003872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21236 21:45:57.594 0.00020385 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 21237 21:45:57.594 0.00009916 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21238 21:45:57.594 0.00015881 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21239 21:45:57.594 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21240 21:45:57.594 0.00514529 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21241 21:45:57.594 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21242 21:45:57.594 0.00100464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21243 21:45:57.594 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21244 21:45:57.594 0.00108286 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21245 21:45:57.594 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21246 21:45:57.594 0.00084069 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21247 21:45:57.594 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21248 21:45:57.594 0.00149412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21249 21:45:57.594 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21250 21:45:57.594 0.00111882 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21251 21:45:57.594 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21252 21:45:57.594 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21253 21:45:57.594 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21254 21:45:57.594 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21255 21:45:57.610 0.00010825 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21256 21:45:57.610 0.00147358 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21257 21:45:57.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21258 21:45:57.610 0.00094025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21259 21:45:57.610 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21260 21:45:57.610 0.00142341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21261 21:45:57.610 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21262 21:45:57.610 0.00121442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21263 21:45:57.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21264 21:45:57.610 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21266 21:45:57.610 0.00130252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21267 21:45:57.610 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21268 21:45:57.610 0.00139378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21269 21:45:57.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21270 21:45:57.610 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21271 21:45:57.610 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21272 21:45:57.610 0.00146133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21273 21:45:57.610 0.00017304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21274 21:45:57.610 0.00096909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21275 21:45:57.610 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21276 21:45:57.610 0.00145264 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21277 21:45:57.625 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21278 21:45:57.625 0.00110301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21279 21:45:57.625 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21280 21:45:57.625 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21281 21:45:57.625 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21282 21:45:57.625 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21283 21:45:57.625 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21284 21:45:57.625 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21285 21:45:57.625 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21286 21:45:57.625 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21287 21:45:57.625 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21288 21:45:57.625 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21289 21:45:57.625 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21290 21:45:57.625 0.00135467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21291 21:45:57.625 0.00003951 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21292 21:45:57.625 0.00123733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21293 21:45:57.625 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21294 21:45:57.625 0.00135506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21295 21:45:57.625 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21296 21:45:57.625 0.00145778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21297 21:45:57.641 0.00006400 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21298 21:45:57.641 0.00101728 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21299 21:45:57.641 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21300 21:45:57.641 0.00141709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21301 21:45:57.641 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21302 21:45:57.641 0.00120336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21303 21:45:57.641 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21304 21:45:57.641 0.00119783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21305 21:45:57.641 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21306 21:45:57.641 0.00139022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21307 21:45:57.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21308 21:45:57.641 0.00128040 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21309 21:45:57.641 0.00008020 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21310 21:45:57.641 0.00124524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21311 21:45:57.641 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21312 21:45:57.641 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21313 21:45:57.641 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21314 21:45:57.641 0.00123615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21315 21:45:57.641 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21316 21:45:57.641 0.00133491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21317 21:45:57.641 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21318 21:45:57.641 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21319 21:45:57.657 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21320 21:45:57.657 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21321 21:45:57.657 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21322 21:45:57.657 0.00132346 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21323 21:45:57.657 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21324 21:45:57.657 0.00150677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21325 21:45:57.657 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21326 21:45:57.657 0.00119980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21327 21:45:57.657 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21328 21:45:57.657 0.00129304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21329 21:45:57.657 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21330 21:45:57.657 0.00129778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21331 21:45:57.657 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21332 21:45:57.657 0.00135664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21333 21:45:57.657 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21334 21:45:57.657 0.00127447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21335 21:45:57.657 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21336 21:45:57.657 0.00120691 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21337 21:45:57.657 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21338 21:45:57.657 0.00136968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21339 21:45:57.657 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21340 21:45:57.657 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21341 21:45:57.657 0.00018963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21342 21:45:57.673 0.00115714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21343 21:45:57.673 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21344 21:45:57.673 0.00134163 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21345 21:45:57.673 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21346 21:45:57.673 0.00120573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21347 21:45:57.673 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21348 21:45:57.673 0.00126617 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21349 21:45:57.673 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21350 21:45:57.673 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21351 21:45:57.673 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21352 21:45:57.673 0.00133886 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21354 21:45:57.673 0.00109077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21355 21:45:57.673 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21356 21:45:57.673 0.00123180 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21357 21:45:57.673 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21358 21:45:57.673 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21359 21:45:57.673 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21360 21:45:57.673 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21361 21:45:57.673 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21362 21:45:57.673 0.00149175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21363 21:45:57.688 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21364 21:45:57.688 0.00139141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21365 21:45:57.688 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21366 21:45:57.688 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21367 21:45:57.688 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21368 21:45:57.688 0.00128553 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21369 21:45:57.688 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21370 21:45:57.688 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21371 21:45:57.688 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21372 21:45:57.688 0.00127486 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21373 21:45:57.688 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21374 21:45:57.688 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21375 21:45:57.688 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21376 21:45:57.688 0.00096237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21377 21:45:57.688 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 21378 21:45:57.688 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 21379 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0B 21380 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 21381 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 21382 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21383 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21384 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21385 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21386 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21387 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21388 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21389 21:45:57.688 0.00002528 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21390 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21391 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21392 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21393 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21394 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21395 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21396 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21397 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21398 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21399 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21400 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21401 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21402 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21403 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21404 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21405 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21406 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21407 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21408 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21409 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21410 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21411 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21412 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21413 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21414 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21415 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21416 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21417 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21418 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21419 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21420 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21421 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21422 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21423 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21424 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21425 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21426 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21427 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21428 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21429 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21430 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21431 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21432 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21433 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21434 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21435 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21436 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21437 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21438 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21439 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21440 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21441 21:45:57.688 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21442 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21443 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21444 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21445 21:45:57.688 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21446 21:45:57.688 0.00001620 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 21447 21:45:57.688 0.00018765 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 21448 21:45:57.688 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21449 21:45:57.688 0.00200020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21450 21:45:57.688 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21451 21:45:57.688 0.00332524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21452 21:45:57.704 0.00024059 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 21453 21:45:57.704 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21454 21:45:57.704 0.00032237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21455 21:45:57.704 0.00028484 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1B 21456 21:45:57.704 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21457 21:45:57.704 0.00022795 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21458 21:45:57.704 0.00022005 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: C0 21459 21:45:57.704 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21460 21:45:57.704 0.00031210 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21461 21:45:57.704 0.00027852 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 21462 21:45:57.704 0.00000198 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21463 21:45:57.704 0.00526262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21464 21:45:57.704 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21465 21:45:57.704 0.00094262 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21466 21:45:57.704 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21467 21:45:57.704 0.00090311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21468 21:45:57.704 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21469 21:45:57.704 0.00104257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21470 21:45:57.704 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21471 21:45:57.704 0.00134242 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21472 21:45:57.704 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21473 21:45:57.704 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21474 21:45:57.704 0.00012879 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21475 21:45:57.704 0.00119743 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21476 21:45:57.704 0.00003240 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21477 21:45:57.704 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21478 21:45:57.719 0.00002568 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21479 21:45:57.719 0.00121679 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21480 21:45:57.719 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21481 21:45:57.719 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21482 21:45:57.719 0.00005491 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21483 21:45:57.719 0.00126143 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21484 21:45:57.719 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21485 21:45:57.719 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21486 21:45:57.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21487 21:45:57.719 0.00141353 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21488 21:45:57.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21489 21:45:57.719 0.00112711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21490 21:45:57.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21491 21:45:57.719 0.00136494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21492 21:45:57.719 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21493 21:45:57.719 0.00121758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21494 21:45:57.719 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21495 21:45:57.719 0.00138904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21496 21:45:57.719 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21497 21:45:57.719 0.00144119 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21498 21:45:57.735 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21499 21:45:57.735 0.00124563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21500 21:45:57.735 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21501 21:45:57.735 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21502 21:45:57.735 0.00005610 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21503 21:45:57.735 0.00128079 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21504 21:45:57.735 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21505 21:45:57.735 0.00147635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21506 21:45:57.735 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21507 21:45:57.735 0.00118440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21508 21:45:57.735 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21509 21:45:57.735 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21510 21:45:57.735 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21511 21:45:57.735 0.00108761 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21512 21:45:57.735 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21513 21:45:57.735 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21514 21:45:57.735 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21515 21:45:57.735 0.00127289 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21516 21:45:57.735 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21517 21:45:57.735 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21518 21:45:57.735 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21519 21:45:57.735 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21520 21:45:57.751 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21521 21:45:57.751 0.00141393 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21522 21:45:57.751 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21523 21:45:57.751 0.00120849 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21524 21:45:57.751 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21525 21:45:57.751 0.00133373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21526 21:45:57.751 0.00006242 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21527 21:45:57.751 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21528 21:45:57.751 0.00012681 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21529 21:45:57.751 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21530 21:45:57.751 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21531 21:45:57.751 0.00123457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21532 21:45:57.751 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21533 21:45:57.751 0.00142775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21534 21:45:57.751 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21535 21:45:57.751 0.00126657 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21536 21:45:57.751 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21537 21:45:57.751 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21538 21:45:57.751 0.00007664 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21539 21:45:57.751 0.00135427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21540 21:45:57.751 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21541 21:45:57.751 0.00138943 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21542 21:45:57.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21543 21:45:57.766 0.00139615 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21544 21:45:57.766 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21545 21:45:57.766 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21546 21:45:57.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21547 21:45:57.766 0.00138193 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21548 21:45:57.766 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21549 21:45:57.766 0.00138588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21550 21:45:57.766 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21551 21:45:57.766 0.00147516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21552 21:45:57.766 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21553 21:45:57.766 0.00100780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21554 21:45:57.766 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21555 21:45:57.766 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21556 21:45:57.766 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21557 21:45:57.766 0.00130726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21558 21:45:57.766 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21559 21:45:57.766 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21560 21:45:57.766 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21561 21:45:57.766 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21562 21:45:57.766 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21563 21:45:57.766 0.00130015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21564 21:45:57.782 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21565 21:45:57.782 0.00130410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21566 21:45:57.782 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21567 21:45:57.782 0.00125590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21568 21:45:57.782 0.00008059 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21569 21:45:57.782 0.00120257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21570 21:45:57.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21571 21:45:57.782 0.00119190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21572 21:45:57.782 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21573 21:45:57.782 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21574 21:45:57.782 0.00004425 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21575 21:45:57.782 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21576 21:45:57.782 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21577 21:45:57.782 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21578 21:45:57.782 0.00008336 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21579 21:45:57.782 0.00123022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21580 21:45:57.782 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21581 21:45:57.782 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21582 21:45:57.782 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21583 21:45:57.782 0.00125432 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21584 21:45:57.782 0.00003081 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21585 21:45:57.797 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21586 21:45:57.797 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21587 21:45:57.797 0.00152217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21588 21:45:57.797 0.00007072 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21589 21:45:57.797 0.00125630 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21590 21:45:57.797 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21591 21:45:57.797 0.00139141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21592 21:45:57.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21593 21:45:57.797 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21594 21:45:57.797 0.00006637 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21595 21:45:57.797 0.00130133 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21596 21:45:57.797 0.00007980 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21597 21:45:57.797 0.00103585 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21598 21:45:57.797 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21599 21:45:57.797 0.00136810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21600 21:45:57.797 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 21601 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 21602 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1B 21603 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: C0 21604 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 21605 21:45:57.797 0.00004030 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21606 21:45:57.797 0.00001027 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21607 21:45:57.797 0.00005570 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21608 21:45:57.797 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21609 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21610 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21611 21:45:57.797 0.00003437 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21612 21:45:57.797 0.00000000 UV4BAND_E_CPS. IRP_MJ_READ COM1 Length: 0, Data: 21613 21:45:57.797 0.00001106 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21614 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21615 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21616 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21617 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21618 21:45:57.797 0.00002726 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21619 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21620 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21621 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21622 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21623 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21624 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21625 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21626 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21627 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21628 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21629 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21630 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21631 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21632 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21633 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21634 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21635 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21636 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21637 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21638 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21639 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21640 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21641 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21642 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21643 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21644 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21645 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21646 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21647 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21648 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21649 21:45:57.797 0.00001896 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21650 21:45:57.797 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21651 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21652 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21653 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21654 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21655 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21656 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21657 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21658 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21659 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21660 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21661 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21662 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21663 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21664 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21665 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21666 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21667 21:45:57.797 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21668 21:45:57.797 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21669 21:45:57.797 0.00002528 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 21670 21:45:57.797 0.00011417 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 21671 21:45:57.797 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21672 21:45:57.797 0.00199822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21673 21:45:57.797 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21674 21:45:57.797 0.00247151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21675 21:45:57.813 0.00024612 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 21676 21:45:57.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21677 21:45:57.813 0.00028326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21678 21:45:57.813 0.00019161 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0C 21679 21:45:57.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21680 21:45:57.813 0.00018252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21681 21:45:57.813 0.00016277 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 00 21682 21:45:57.813 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21683 21:45:57.813 0.00018133 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 21684 21:45:57.813 0.00018726 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21685 21:45:57.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21686 21:45:57.813 0.00491892 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21687 21:45:57.813 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21688 21:45:57.813 0.00093985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21689 21:45:57.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21690 21:45:57.813 0.00115200 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21691 21:45:57.813 0.00008612 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21692 21:45:57.813 0.00089916 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21693 21:45:57.813 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21694 21:45:57.813 0.00128474 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21695 21:45:57.813 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21696 21:45:57.813 0.00134044 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21697 21:45:57.813 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21698 21:45:57.813 0.00119151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21699 21:45:57.828 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21700 21:45:57.828 0.00112158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21701 21:45:57.828 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21702 21:45:57.828 0.00131714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21703 21:45:57.828 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21704 21:45:57.828 0.00133096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21705 21:45:57.828 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21706 21:45:57.828 0.00141551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21707 21:45:57.828 0.00006953 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21708 21:45:57.828 0.00129027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21709 21:45:57.828 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21710 21:45:57.828 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21711 21:45:57.828 0.00003911 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21712 21:45:57.828 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21713 21:45:57.828 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21714 21:45:57.828 0.00129580 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21715 21:45:57.828 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21716 21:45:57.828 0.00148583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21717 21:45:57.828 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21718 21:45:57.828 0.00121403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21719 21:45:57.828 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21720 21:45:57.828 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21721 21:45:57.844 0.00005689 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21722 21:45:57.844 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21723 21:45:57.844 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21724 21:45:57.844 0.00113027 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21725 21:45:57.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21726 21:45:57.844 0.00136257 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21727 21:45:57.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21728 21:45:57.844 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21729 21:45:57.844 0.00002923 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21730 21:45:57.844 0.00130607 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21731 21:45:57.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21732 21:45:57.844 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21733 21:45:57.844 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21734 21:45:57.844 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21735 21:45:57.844 0.00012286 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21736 21:45:57.844 0.00117333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21737 21:45:57.844 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21738 21:45:57.844 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21739 21:45:57.844 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21740 21:45:57.844 0.00131003 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21741 21:45:57.844 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21742 21:45:57.844 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21743 21:45:57.860 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21744 21:45:57.860 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21745 21:45:57.860 0.00005847 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21746 21:45:57.860 0.00144751 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21747 21:45:57.860 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21748 21:45:57.860 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21749 21:45:57.860 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21750 21:45:57.860 0.00115832 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21751 21:45:57.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21752 21:45:57.860 0.00130449 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21753 21:45:57.860 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21754 21:45:57.860 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21755 21:45:57.860 0.00008375 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21756 21:45:57.860 0.00121600 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21757 21:45:57.860 0.00008652 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21758 21:45:57.860 0.00109669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21759 21:45:57.860 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21760 21:45:57.860 0.00139575 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21761 21:45:57.860 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21762 21:45:57.860 0.00139931 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21763 21:45:57.860 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21764 21:45:57.860 0.00117807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21765 21:45:57.875 0.00010430 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21766 21:45:57.875 0.00108682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21767 21:45:57.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21768 21:45:57.875 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21769 21:45:57.875 0.00004899 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21770 21:45:57.875 0.00127052 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21771 21:45:57.875 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21772 21:45:57.875 0.00140563 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21773 21:45:57.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21774 21:45:57.875 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21775 21:45:57.875 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21776 21:45:57.875 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21777 21:45:57.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21778 21:45:57.875 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21779 21:45:57.875 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21780 21:45:57.875 0.00127961 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21781 21:45:57.875 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21782 21:45:57.875 0.00122232 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21783 21:45:57.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21784 21:45:57.875 0.00125946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21785 21:45:57.875 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21786 21:45:57.875 0.00143724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21787 21:45:57.891 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21788 21:45:57.891 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21789 21:45:57.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21790 21:45:57.891 0.00127407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21791 21:45:57.891 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21792 21:45:57.891 0.00139496 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21793 21:45:57.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21794 21:45:57.891 0.00127170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21795 21:45:57.891 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21796 21:45:57.891 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21797 21:45:57.891 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21798 21:45:57.891 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21799 21:45:57.891 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21800 21:45:57.891 0.00127724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21801 21:45:57.891 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21802 21:45:57.891 0.00121442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21803 21:45:57.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21804 21:45:57.891 0.00132385 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21805 21:45:57.891 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21806 21:45:57.891 0.00140326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21807 21:45:57.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21808 21:45:57.906 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21809 21:45:57.906 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21810 21:45:57.906 0.00134084 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21811 21:45:57.906 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21812 21:45:57.906 0.00130528 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21813 21:45:57.906 0.00009679 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21814 21:45:57.906 0.00123536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21815 21:45:57.906 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21816 21:45:57.906 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21817 21:45:57.906 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21818 21:45:57.906 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21819 21:45:57.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21820 21:45:57.906 0.00118440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21821 21:45:57.906 0.00006795 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21822 21:45:57.906 0.00122588 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21823 21:45:57.906 0.00000316 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 21824 21:45:57.906 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 21825 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0C 21826 21:45:57.906 0.00009600 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 21827 21:45:57.906 0.00002805 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 21828 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21829 21:45:57.906 0.00005017 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21830 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21831 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21832 21:45:57.906 0.00001343 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21833 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21834 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21835 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21836 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21837 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21838 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21839 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21840 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21841 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21842 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21843 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21844 21:45:57.906 0.00003200 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21845 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21846 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21847 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21848 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21849 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21850 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21851 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21852 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21853 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21854 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21855 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21856 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21857 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21858 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21859 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21860 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21861 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21862 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21863 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21864 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21865 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21866 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21867 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21868 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21869 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21870 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21871 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21872 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21873 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21874 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21875 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21876 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21877 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21878 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21879 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21880 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21881 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21882 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21883 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21884 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21885 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21886 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21887 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21888 21:45:57.906 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21889 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21890 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21891 21:45:57.906 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 21892 21:45:57.906 0.00002607 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 21893 21:45:57.906 0.00019714 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 21894 21:45:57.906 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21895 21:45:57.906 0.00189669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21896 21:45:57.906 0.00004227 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21897 21:45:57.906 0.00278874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21898 21:45:57.922 0.00018805 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 21899 21:45:57.922 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21900 21:45:57.922 0.00017501 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21901 21:45:57.922 0.00014341 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1C 21902 21:45:57.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21903 21:45:57.922 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 21904 21:45:57.922 0.00000000 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 Length: 1, Data: 00 21906 21:45:57.922 0.00001343 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21907 21:45:57.922 0.00007783 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21908 21:45:57.922 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21909 21:45:57.922 0.00515793 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21910 21:45:57.922 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21911 21:45:57.922 0.00099437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21912 21:45:57.922 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21913 21:45:57.922 0.00091536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21914 21:45:57.922 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21915 21:45:57.922 0.00100030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21916 21:45:57.922 0.00011654 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21917 21:45:57.922 0.00128909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21918 21:45:57.922 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21919 21:45:57.922 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21920 21:45:57.922 0.00008533 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21921 21:45:57.922 0.00135941 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21922 21:45:57.922 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21923 21:45:57.922 0.00140721 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21924 21:45:57.938 0.00014736 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21925 21:45:57.938 0.00112277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21926 21:45:57.938 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21927 21:45:57.938 0.00112237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21928 21:45:57.938 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21929 21:45:57.938 0.00124089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21930 21:45:57.938 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21931 21:45:57.938 0.00136731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21932 21:45:57.938 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21933 21:45:57.938 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21934 21:45:57.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21935 21:45:57.938 0.00137403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21936 21:45:57.938 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21937 21:45:57.938 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21938 21:45:57.938 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21939 21:45:57.938 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21940 21:45:57.938 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21941 21:45:57.938 0.00145738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21942 21:45:57.938 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21943 21:45:57.938 0.00125985 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21944 21:45:57.954 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21945 21:45:57.954 0.00143526 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21946 21:45:57.954 0.00002133 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21947 21:45:57.954 0.00104099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21948 21:45:57.954 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21949 21:45:57.954 0.00145541 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21950 21:45:57.954 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21951 21:45:57.954 0.00085373 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21952 21:45:57.954 0.00007348 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21953 21:45:57.954 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21954 21:45:57.954 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21955 21:45:57.954 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21956 21:45:57.954 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21957 21:45:57.954 0.00137047 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21958 21:45:57.954 0.00018726 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21959 21:45:57.954 0.00111170 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21960 21:45:57.954 0.00004978 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21961 21:45:57.954 0.00134558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21962 21:45:57.954 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21964 21:45:57.954 0.00006005 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21965 21:45:57.954 0.00128593 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21966 21:45:57.969 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21967 21:45:57.969 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21968 21:45:57.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21969 21:45:57.969 0.00130212 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21970 21:45:57.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21971 21:45:57.969 0.00146489 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21972 21:45:57.969 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21973 21:45:57.969 0.00115595 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21974 21:45:57.969 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21975 21:45:57.969 0.00124326 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21976 21:45:57.969 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21977 21:45:57.969 0.00123101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21978 21:45:57.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21979 21:45:57.969 0.00138706 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21980 21:45:57.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21981 21:45:57.969 0.00137995 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21982 21:45:57.969 0.00004820 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21983 21:45:57.969 0.00134598 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21984 21:45:57.969 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21985 21:45:57.969 0.00130331 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21986 21:45:57.969 0.00008375 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21987 21:45:57.969 0.00123378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21988 21:45:57.985 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21989 21:45:57.985 0.00129422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21990 21:45:57.985 0.00010074 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21991 21:45:57.985 0.00123773 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21992 21:45:57.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21993 21:45:57.985 0.00132780 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21994 21:45:57.985 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21995 21:45:57.985 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21996 21:45:57.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21997 21:45:57.985 0.00140958 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 21998 21:45:57.985 0.00008257 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 21999 21:45:57.985 0.00125551 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22000 21:45:57.985 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22001 21:45:57.985 0.00141472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22002 21:45:57.985 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22003 21:45:57.985 0.00114686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22004 21:45:57.985 0.00013788 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22005 21:45:57.985 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22006 21:45:57.985 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22007 21:45:57.985 0.00140405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22008 21:45:57.985 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22009 21:45:57.985 0.00134519 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22010 21:45:58.001 0.00002252 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22011 21:45:58.001 0.00114924 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22012 21:45:58.001 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22013 21:45:58.001 0.00130884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22014 21:45:58.001 0.00003319 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22015 21:45:58.001 0.00129067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22016 21:45:58.001 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22017 21:45:58.001 0.00158696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22018 21:45:58.001 0.00008494 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22019 21:45:58.001 0.00097699 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22020 21:45:58.001 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22021 21:45:58.001 0.00110736 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22022 21:45:58.001 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22023 21:45:58.001 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22024 21:45:58.001 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22025 21:45:58.001 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22026 21:45:58.001 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22027 21:45:58.001 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22028 21:45:58.001 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22029 21:45:58.001 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22030 21:45:58.001 0.00003160 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22031 21:45:58.001 0.00134993 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22032 21:45:58.016 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22033 21:45:58.016 0.00133333 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22034 21:45:58.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22035 21:45:58.016 0.00126025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22036 21:45:58.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22037 21:45:58.016 0.00149057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22038 21:45:58.016 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22039 21:45:58.016 0.00134953 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22040 21:45:58.016 0.00000830 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22041 21:45:58.016 0.00117491 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22042 21:45:58.016 0.00011575 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22043 21:45:58.016 0.00121521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22044 21:45:58.016 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22045 21:45:58.016 0.00208198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22046 21:45:58.016 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 22047 21:45:58.016 0.00004385 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 22048 21:45:58.016 0.00012207 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1C 22049 21:45:58.016 0.00003160 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 00 22050 21:45:58.016 0.00003319 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 22051 21:45:58.016 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22052 21:45:58.016 0.00003240 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22053 21:45:58.016 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22054 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22055 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22056 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22057 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22058 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22059 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22060 21:45:58.016 0.00003240 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22061 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22062 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22063 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22064 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22065 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22066 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22067 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22068 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22069 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22070 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22071 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22072 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22073 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22074 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22075 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22076 21:45:58.016 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22077 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22078 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22079 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22080 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22081 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22082 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22083 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22084 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22085 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22086 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22087 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22088 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22089 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22090 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22091 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22092 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22093 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22094 21:45:58.016 0.00004978 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22095 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22096 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22097 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22098 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22099 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22100 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22101 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22102 21:45:58.016 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22103 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22104 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22105 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22106 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22107 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22108 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22109 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22110 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22111 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22112 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22113 21:45:58.016 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22114 21:45:58.016 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22115 21:45:58.016 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 22116 21:45:58.016 0.00022953 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 22117 21:45:58.016 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22118 21:45:58.016 0.00188524 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22119 21:45:58.016 0.00002805 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22120 21:45:58.016 0.01698806 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22121 21:45:58.047 0.00034410 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 22122 21:45:58.047 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22123 21:45:58.047 0.00023822 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22124 21:45:58.047 0.00018923 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0C 22125 21:45:58.047 0.00021254 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 22126 21:45:58.047 0.00004267 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22127 21:45:58.047 0.00091891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22128 21:45:58.047 0.00000000 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 Length: 1, Data: 40 22129 21:45:58.047 0.00015684 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22130 21:45:58.047 0.00000000 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 22133 21:45:58.047 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22134 21:45:58.047 0.00104810 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22135 21:45:58.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22136 21:45:58.047 0.00093590 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22137 21:45:58.047 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22138 21:45:58.047 0.00109314 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22139 21:45:58.047 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22140 21:45:58.047 0.00140247 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22141 21:45:58.047 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22142 21:45:58.047 0.00138627 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22143 21:45:58.047 0.00003872 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22144 21:45:58.047 0.00143131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22145 21:45:58.063 0.00001027 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22146 21:45:58.063 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22147 21:45:58.063 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22148 21:45:58.063 0.00124405 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22149 21:45:58.063 0.00006321 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22150 21:45:58.063 0.00121798 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22151 21:45:58.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22152 21:45:58.063 0.00137482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22153 21:45:58.063 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22154 21:45:58.063 0.00121877 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22155 21:45:58.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22156 21:45:58.063 0.00132859 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22157 21:45:58.063 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22158 21:45:58.063 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22159 21:45:58.063 0.00019595 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22160 21:45:58.063 0.00111803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22161 21:45:58.063 0.00015012 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22162 21:45:58.063 0.00084938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22163 21:45:58.063 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22164 21:45:58.063 0.00133531 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22165 21:45:58.063 0.00008770 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22166 21:45:58.063 0.00127131 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22167 21:45:58.078 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22168 21:45:58.078 0.00115398 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22169 21:45:58.078 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22170 21:45:58.078 0.00137205 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22171 21:45:58.078 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22172 21:45:58.078 0.00137403 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22173 21:45:58.078 0.00000948 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22174 21:45:58.078 0.00112869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22175 21:45:58.078 0.00005215 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22176 21:45:58.078 0.00125195 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22177 21:45:58.078 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22178 21:45:58.078 0.00133689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22179 21:45:58.078 0.00011259 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22180 21:45:58.078 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22181 21:45:58.078 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22182 21:45:58.078 0.00150874 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22183 21:45:58.078 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22184 21:45:58.078 0.00120573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22185 21:45:58.078 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22186 21:45:58.078 0.00138390 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22187 21:45:58.078 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22188 21:45:58.078 0.00132464 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22189 21:45:58.094 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22190 21:45:58.094 0.00134124 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22191 21:45:58.094 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22192 21:45:58.094 0.00133649 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22193 21:45:58.094 0.00005333 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22194 21:45:58.094 0.00132622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22195 21:45:58.094 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22196 21:45:58.094 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22197 21:45:58.094 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22198 21:45:58.094 0.00137324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22199 21:45:58.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22200 21:45:58.094 0.00132267 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22201 21:45:58.094 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22202 21:45:58.094 0.00128711 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22203 21:45:58.094 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22204 21:45:58.094 0.00143407 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22205 21:45:58.094 0.00010114 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22206 21:45:58.094 0.00096198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22207 21:45:58.094 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22208 21:45:58.094 0.00118558 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22209 21:45:58.109 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22210 21:45:58.109 0.00131872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22211 21:45:58.109 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22212 21:45:58.109 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22213 21:45:58.109 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22214 21:45:58.109 0.00132306 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22215 21:45:58.109 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22216 21:45:58.109 0.00135427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22217 21:45:58.109 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22218 21:45:58.109 0.00135348 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22219 21:45:58.109 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22220 21:45:58.109 0.00131279 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22221 21:45:58.109 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22222 21:45:58.109 0.00136336 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22223 21:45:58.109 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22224 21:45:58.109 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22225 21:45:58.109 0.00002686 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22226 21:45:58.109 0.00129975 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22227 21:45:58.109 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22228 21:45:58.109 0.00133926 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22229 21:45:58.109 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22230 21:45:58.109 0.00145896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22231 21:45:58.125 0.00008059 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22232 21:45:58.125 0.00126696 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22233 21:45:58.125 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22234 21:45:58.125 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22235 21:45:58.125 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22236 21:45:58.125 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22237 21:45:58.125 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22238 21:45:58.125 0.00124682 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22239 21:45:58.125 0.00001936 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22240 21:45:58.125 0.00139457 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22241 21:45:58.125 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22242 21:45:58.125 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22243 21:45:58.125 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22244 21:45:58.125 0.00140049 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22245 21:45:58.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22246 21:45:58.125 0.00128158 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22247 21:45:58.125 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22248 21:45:58.125 0.00129106 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22249 21:45:58.125 0.00008533 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22250 21:45:58.125 0.00121956 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22251 21:45:58.125 0.00010785 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22252 21:45:58.125 0.00116543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22253 21:45:58.141 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22254 21:45:58.141 0.00134005 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22255 21:45:58.141 0.00004385 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22256 21:45:58.141 0.00130291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22257 21:45:58.141 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22258 21:45:58.141 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22259 21:45:58.141 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22260 21:45:58.141 0.00119664 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22261 21:45:58.141 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22262 21:45:58.141 0.00146686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22263 21:45:58.141 0.00003674 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22264 21:45:58.141 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22265 21:45:58.141 0.00001659 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22266 21:45:58.141 0.00121324 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22267 21:45:58.141 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22268 21:45:58.141 0.00168533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22269 21:45:58.141 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 22270 21:45:58.141 0.00014657 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 22271 21:45:58.141 0.00005965 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0C 22272 21:45:58.141 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 22273 21:45:58.141 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 22274 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22275 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22276 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22277 21:45:58.141 0.00009165 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22278 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22279 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22280 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22281 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22282 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22283 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22284 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22285 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22286 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22287 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22288 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22289 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22290 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22291 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22292 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22293 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22294 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22295 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22296 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22297 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22298 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22299 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22300 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22301 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22302 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22303 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22304 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22305 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22306 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22307 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22308 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22309 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22310 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22311 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22312 21:45:58.141 0.00005333 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22313 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22314 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22315 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22316 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22317 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22318 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22319 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22320 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22321 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22322 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22323 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22324 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22325 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22326 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22327 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22328 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22329 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22330 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22331 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22332 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22333 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22334 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22335 21:45:58.141 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22336 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22337 21:45:58.141 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22338 21:45:58.141 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 22339 21:45:58.141 0.00017817 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 22340 21:45:58.141 0.00001975 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22341 21:45:58.141 0.00194015 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22342 21:45:58.141 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22343 21:45:58.141 0.00158459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22344 21:45:58.156 0.00042469 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 22345 21:45:58.156 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22346 21:45:58.156 0.00033778 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22347 21:45:58.156 0.00021649 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1C 22348 21:45:58.156 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22349 21:45:58.156 0.00037689 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22350 21:45:58.156 0.00028326 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 22351 21:45:58.156 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22352 21:45:58.156 0.00027299 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22353 21:45:58.156 0.00019595 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 22354 21:45:58.156 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22355 21:45:58.156 0.00597334 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22356 21:45:58.156 0.00000593 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22357 21:45:58.156 0.00097422 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22358 21:45:58.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22359 21:45:58.156 0.00107733 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22360 21:45:58.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22361 21:45:58.156 0.00107141 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22362 21:45:58.156 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22363 21:45:58.156 0.00159724 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22364 21:45:58.156 0.00010153 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22365 21:45:58.156 0.00093472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22366 21:45:58.156 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22367 21:45:58.156 0.00142301 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22368 21:45:58.172 0.00006756 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22369 21:45:58.172 0.00141906 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22370 21:45:58.172 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22371 21:45:58.172 0.00088415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22372 21:45:58.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22373 21:45:58.172 0.00133136 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22374 21:45:58.172 0.00002015 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22375 21:45:58.172 0.00137126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22376 21:45:58.172 0.00002607 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22377 21:45:58.172 0.00122311 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22378 21:45:58.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22379 21:45:58.172 0.00136889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22380 21:45:58.172 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22381 21:45:58.172 0.00142104 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22382 21:45:58.172 0.00001067 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22383 21:45:58.172 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22384 21:45:58.172 0.00001738 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22385 21:45:58.172 0.00125077 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22386 21:45:58.172 0.00004030 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22387 21:45:58.172 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22388 21:45:58.172 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22389 21:45:58.172 0.00140207 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22390 21:45:58.188 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22391 21:45:58.188 0.00139536 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22392 21:45:58.188 0.00003121 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22393 21:45:58.188 0.00110933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22394 21:45:58.188 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22395 21:45:58.188 0.00117294 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22396 21:45:58.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22397 21:45:58.188 0.00139220 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22398 21:45:58.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22399 21:45:58.188 0.00127803 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22400 21:45:58.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22401 21:45:58.188 0.00131556 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22402 21:45:58.188 0.00005926 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22403 21:45:58.188 0.00125511 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22404 21:45:58.188 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22405 21:45:58.188 0.00141235 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22406 21:45:58.188 0.00002884 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22407 21:45:58.188 0.00144869 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22408 21:45:58.188 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22409 21:45:58.188 0.00127763 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22410 21:45:58.203 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22411 21:45:58.203 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22412 21:45:58.203 0.00000751 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22413 21:45:58.203 0.00126459 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22414 21:45:58.203 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22415 21:45:58.203 0.00137244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22416 21:45:58.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22417 21:45:58.203 0.00140603 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22418 21:45:58.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22419 21:45:58.203 0.00131635 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22420 21:45:58.203 0.00002054 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22421 21:45:58.203 0.00135901 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22422 21:45:58.203 0.00009126 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22423 21:45:58.203 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22424 21:45:58.203 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22425 21:45:58.203 0.00118203 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22426 21:45:58.203 0.00015131 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22427 21:45:58.203 0.00114252 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22428 21:45:58.203 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22429 21:45:58.203 0.00124642 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22430 21:45:58.203 0.00003714 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22431 21:45:58.203 0.00104770 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22432 21:45:58.219 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22433 21:45:58.219 0.00135151 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22434 21:45:58.219 0.00004346 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22435 21:45:58.219 0.00125156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22436 21:45:58.219 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22437 21:45:58.219 0.00135111 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22439 21:45:58.219 0.00123417 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22440 21:45:58.219 0.00002844 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22441 21:45:58.219 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22442 21:45:58.219 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22443 21:45:58.219 0.00124128 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22444 21:45:58.219 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22445 21:45:58.219 0.00131042 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22446 21:45:58.219 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22447 21:45:58.219 0.00131161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22448 21:45:58.219 0.00002647 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22449 21:45:58.219 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22450 21:45:58.219 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22451 21:45:58.219 0.00134756 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22452 21:45:58.219 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22453 21:45:58.219 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22454 21:45:58.235 0.00002291 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22455 21:45:58.235 0.00107891 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22456 21:45:58.235 0.00009244 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22457 21:45:58.235 0.00120652 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22458 21:45:58.235 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22459 21:45:58.235 0.00143447 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22460 21:45:58.235 0.00002370 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22461 21:45:58.235 0.00103467 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22462 21:45:58.235 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22463 21:45:58.235 0.00143012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22464 21:45:58.235 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22465 21:45:58.235 0.00129225 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22466 21:45:58.235 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22467 21:45:58.235 0.00135506 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22468 21:45:58.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22469 21:45:58.235 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22470 21:45:58.235 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22471 21:45:58.235 0.00131121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22472 21:45:58.235 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22473 21:45:58.235 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22474 21:45:58.235 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22475 21:45:58.235 0.00138983 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22476 21:45:58.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22477 21:45:58.250 0.00127012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22478 21:45:58.250 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22479 21:45:58.250 0.00126538 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22480 21:45:58.250 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22481 21:45:58.250 0.00132583 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22482 21:45:58.250 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22483 21:45:58.250 0.00150440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22484 21:45:58.250 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22485 21:45:58.250 0.00102321 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22486 21:45:58.250 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22487 21:45:58.250 0.00107378 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22488 21:45:58.250 0.00013472 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22489 21:45:58.250 0.00120217 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22490 21:45:58.250 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22491 21:45:58.250 0.00178291 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22492 21:45:58.250 0.00002923 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 22493 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 22494 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1C 22495 21:45:58.250 0.00005531 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 22496 21:45:58.250 0.00003714 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 22497 21:45:58.250 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22498 21:45:58.250 0.00010469 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22499 21:45:58.250 0.00003674 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22500 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22501 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22502 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22503 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22504 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22505 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22506 21:45:58.250 0.00012247 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22507 21:45:58.250 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22508 21:45:58.250 0.00003793 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22509 21:45:58.250 0.00003002 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22510 21:45:58.250 0.00002054 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22512 21:45:58.250 0.00003358 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22513 21:45:58.250 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22514 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22515 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22516 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22517 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22518 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22519 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22520 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22521 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22522 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22523 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22524 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22525 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22526 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22527 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22528 21:45:58.250 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22529 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22530 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22531 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22532 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22533 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22534 21:45:58.250 0.00002015 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22535 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22536 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22537 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22538 21:45:58.250 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22539 21:45:58.250 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22540 21:45:58.250 0.00002212 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22541 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22542 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22543 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22544 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22545 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22546 21:45:58.250 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22547 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22548 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22549 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22550 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22551 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22552 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22553 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22554 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22555 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22556 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22557 21:45:58.250 0.00003556 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22558 21:45:58.250 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22559 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22560 21:45:58.250 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22561 21:45:58.250 0.00001501 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 22562 21:45:58.250 0.00011536 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 22563 21:45:58.250 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22564 21:45:58.250 0.00192237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22565 21:45:58.250 0.00010272 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22566 21:45:58.250 0.00052504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22567 21:45:58.266 0.00017778 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 22568 21:45:58.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22569 21:45:58.266 0.00018054 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22570 21:45:58.266 0.00013432 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 0C 22571 21:45:58.266 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22572 21:45:58.266 0.00016909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22573 21:45:58.266 0.00015407 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 22574 21:45:58.266 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22575 21:45:58.266 0.00018410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22576 21:45:58.266 0.00014301 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 22577 21:45:58.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22578 21:45:58.266 0.00535032 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22579 21:45:58.266 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22580 21:45:58.266 0.00095012 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22581 21:45:58.266 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22582 21:45:58.266 0.00097936 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22583 21:45:58.266 0.00000237 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22584 21:45:58.266 0.00105442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22585 21:45:58.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22586 21:45:58.266 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22587 21:45:58.266 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22588 21:45:58.266 0.00125827 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22589 21:45:58.266 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22590 21:45:58.266 0.00128672 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22591 21:45:58.266 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22592 21:45:58.266 0.00142578 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22593 21:45:58.281 0.00001146 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22594 21:45:58.281 0.00122114 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22595 21:45:58.281 0.00005768 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22596 21:45:58.281 0.00140840 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22597 21:45:58.281 0.00001580 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22598 21:45:58.281 0.00123970 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22599 21:45:58.281 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22600 21:45:58.281 0.00123338 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22601 21:45:58.281 0.00012642 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22602 21:45:58.281 0.00144277 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22603 21:45:58.281 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22604 21:45:58.281 0.00104731 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22605 21:45:58.281 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22606 21:45:58.281 0.00122351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22607 21:45:58.281 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22608 21:45:58.281 0.00133017 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22609 21:45:58.281 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22610 21:45:58.281 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22611 21:45:58.281 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22612 21:45:58.281 0.00121442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22613 21:45:58.281 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22614 21:45:58.281 0.00131319 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22615 21:45:58.297 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22616 21:45:58.297 0.00142775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22617 21:45:58.297 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22618 21:45:58.297 0.00123812 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22619 21:45:58.297 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22620 21:45:58.297 0.00148622 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22621 21:45:58.297 0.00000869 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22623 21:45:58.297 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22624 21:45:58.297 0.00128790 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22625 21:45:58.297 0.00006123 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22626 21:45:58.297 0.00146410 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22627 21:45:58.297 0.00006044 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22628 21:45:58.297 0.00096395 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22629 21:45:58.297 0.00006993 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22630 21:45:58.297 0.00123694 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22631 21:45:58.297 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22632 21:45:58.297 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22633 21:45:58.297 0.00001896 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22634 21:45:58.297 0.00126933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22637 21:45:58.313 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22638 21:45:58.313 0.00125037 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22639 21:45:58.313 0.00005886 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22640 21:45:58.313 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22641 21:45:58.313 0.00004504 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22642 21:45:58.313 0.00136375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22643 21:45:58.313 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22644 21:45:58.313 0.00116504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22645 21:45:58.313 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22646 21:45:58.313 0.00136020 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22647 21:45:58.313 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22648 21:45:58.313 0.00136968 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22649 21:45:58.313 0.00003753 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22650 21:45:58.313 0.00132148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22651 21:45:58.313 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22652 21:45:58.313 0.00132030 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22653 21:45:58.313 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22654 21:45:58.313 0.00133570 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22655 21:45:58.313 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22656 21:45:58.313 0.00137521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22657 21:45:58.329 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22658 21:45:58.329 0.00122904 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22659 21:45:58.329 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22660 21:45:58.329 0.00142420 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22661 21:45:58.329 0.00004741 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22662 21:45:58.329 0.00113896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22663 21:45:58.329 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22664 21:45:58.329 0.00138351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22665 21:45:58.329 0.00004780 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22666 21:45:58.329 0.00110775 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22667 21:45:58.329 0.00004662 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22668 21:45:58.329 0.00120889 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22669 21:45:58.329 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22670 21:45:58.329 0.00132425 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22671 21:45:58.329 0.00001541 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22672 21:45:58.329 0.00137363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22673 21:45:58.329 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22674 21:45:58.329 0.00127605 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22675 21:45:58.329 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22676 21:45:58.329 0.00129857 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22677 21:45:58.329 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22678 21:45:58.329 0.00130805 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22679 21:45:58.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22680 21:45:58.344 0.00144909 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22681 21:45:58.344 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22682 21:45:58.344 0.00139022 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22683 21:45:58.344 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22684 21:45:58.344 0.00136573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22685 21:45:58.344 0.00003990 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22686 21:45:58.344 0.00117807 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22687 21:45:58.344 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22688 21:45:58.344 0.00142933 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22689 21:45:58.344 0.00001817 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22690 21:45:58.344 0.00133175 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22691 21:45:58.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22692 21:45:58.344 0.00124800 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22693 21:45:58.344 0.00003516 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22694 21:45:58.344 0.00146173 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22695 21:45:58.344 0.00001383 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22696 21:45:58.344 0.00120375 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22697 21:45:58.344 0.00000553 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22698 21:45:58.344 0.00115161 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22699 21:45:58.344 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22700 21:45:58.344 0.00138272 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22701 21:45:58.360 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22702 21:45:58.360 0.00137719 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22704 21:45:58.360 0.00116148 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22705 21:45:58.360 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22706 21:45:58.360 0.00133057 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22707 21:45:58.360 0.00005412 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22708 21:45:58.360 0.00115516 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22709 21:45:58.360 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22710 21:45:58.360 0.00132662 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22711 21:45:58.360 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22712 21:45:58.360 0.00137442 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22713 21:45:58.360 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22714 21:45:58.360 0.00150361 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22715 21:45:58.360 0.00001146 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 22716 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 22717 21:45:58.360 0.00004346 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 0C 22718 21:45:58.360 0.00000198 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 22719 21:45:58.360 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 22720 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22721 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22722 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22723 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22724 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22725 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22726 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22727 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22728 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22729 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22730 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22731 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22732 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22733 21:45:58.360 0.00002291 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22734 21:45:58.360 0.00001975 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22735 21:45:58.360 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22736 21:45:58.360 0.00000158 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22737 21:45:58.360 0.00002331 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22738 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22739 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22740 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22741 21:45:58.360 0.00003832 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22742 21:45:58.360 0.00001225 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22743 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22744 21:45:58.360 0.00000395 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22746 21:45:58.360 0.00001659 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22747 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22748 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22749 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22750 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22751 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22752 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22753 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22754 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22755 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22756 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22757 21:45:58.360 0.00000119 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22758 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22759 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22760 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22761 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22762 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22763 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22764 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22765 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22766 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22767 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22768 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22769 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22770 21:45:58.360 0.00000277 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22771 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22772 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22773 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22774 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22775 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22776 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22777 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22778 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22779 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22780 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22781 21:45:58.360 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22782 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22783 21:45:58.360 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22784 21:45:58.360 0.00001699 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 22785 21:45:58.360 0.00016198 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 22786 21:45:58.360 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22787 21:45:58.360 0.00193304 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22788 21:45:58.360 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22789 21:45:58.360 0.00261096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22790 21:45:58.375 0.00026074 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 53 22791 21:45:58.375 0.00005254 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22792 21:45:58.375 0.00026311 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 1C 22793 21:45:58.375 0.00029156 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22794 21:45:58.375 0.00021096 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 80 22795 21:45:58.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22796 21:45:58.375 0.00014854 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22797 21:45:58.375 0.00023585 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 40 22798 21:45:58.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22799 21:45:58.375 0.00009086 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22800 21:45:58.375 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22801 21:45:58.375 0.00564227 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22802 21:45:58.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22803 21:45:58.375 0.00098884 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22804 21:45:58.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22805 21:45:58.375 0.00099714 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22806 21:45:58.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22807 21:45:58.375 0.00103230 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22808 21:45:58.375 0.00001304 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22809 21:45:58.375 0.00131477 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22810 21:45:58.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22811 21:45:58.375 0.00121521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22812 21:45:58.375 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22813 21:45:58.375 0.00125669 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22814 21:45:58.375 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22815 21:45:58.375 0.00129896 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22816 21:45:58.391 0.00003358 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22817 21:45:58.391 0.00055190 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22818 21:45:58.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22819 21:45:58.391 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22820 21:45:58.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22821 21:45:58.391 0.00125867 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22822 21:45:58.391 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22823 21:45:58.391 0.00139259 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22824 21:45:58.391 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22825 21:45:58.391 0.00141946 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22826 21:45:58.391 0.00003398 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22827 21:45:58.391 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22828 21:45:58.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22829 21:45:58.391 0.00140089 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22830 21:45:58.391 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22831 21:45:58.391 0.00118440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22832 21:45:58.391 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22833 21:45:58.391 0.00131951 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22834 21:45:58.391 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22835 21:45:58.391 0.00167427 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22836 21:45:58.407 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22837 21:45:58.407 0.00105126 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22838 21:45:58.407 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22839 21:45:58.407 0.00126341 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22840 21:45:58.407 0.00000632 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22841 21:45:58.407 0.00128198 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22842 21:45:58.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22843 21:45:58.407 0.00137165 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22844 21:45:58.407 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22845 21:45:58.407 0.00133412 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22846 21:45:58.407 0.00002963 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22847 21:45:58.407 0.00123852 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22848 21:45:58.407 0.00013432 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22849 21:45:58.407 0.00116701 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22850 21:45:58.407 0.00010588 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22851 21:45:58.407 0.00121363 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22853 21:45:58.407 0.00117096 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22854 21:45:58.407 0.00005057 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22855 21:45:58.407 0.00133215 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22856 21:45:58.407 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22857 21:45:58.407 0.00138351 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22858 21:45:58.422 0.00000790 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22859 21:45:58.422 0.00135980 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22860 21:45:58.422 0.00000672 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22861 21:45:58.422 0.00113067 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22862 21:45:58.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22863 21:45:58.422 0.00132820 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22864 21:45:58.422 0.00011931 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22865 21:45:58.422 0.00120928 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22866 21:45:58.422 0.00005649 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22867 21:45:58.422 0.00125472 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22868 21:45:58.422 0.00001264 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22869 21:45:58.422 0.00131437 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22870 21:45:58.422 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22871 21:45:58.422 0.00136533 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22872 21:45:58.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22873 21:45:58.422 0.00132938 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22874 21:45:58.422 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22875 21:45:58.422 0.00135704 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22876 21:45:58.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22877 21:45:58.422 0.00130963 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22878 21:45:58.422 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22879 21:45:58.422 0.00136415 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22880 21:45:58.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22881 21:45:58.438 0.00147872 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22882 21:45:58.438 0.00001422 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22883 21:45:58.438 0.00120612 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22884 21:45:58.438 0.00008454 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22885 21:45:58.438 0.00116504 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22886 21:45:58.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22887 21:45:58.438 0.00125709 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22888 21:45:58.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22889 21:45:58.438 0.00130686 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22890 21:45:58.438 0.00000277 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22891 21:45:58.438 0.00134677 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22892 21:45:58.438 0.00003002 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22893 21:45:58.438 0.00137758 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22894 21:45:58.438 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22895 21:45:58.438 0.00134440 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22896 21:45:58.438 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22897 21:45:58.438 0.00138548 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22898 21:45:58.438 0.00000435 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22899 21:45:58.438 0.00121482 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22900 21:45:58.438 0.00004938 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22901 21:45:58.438 0.00118716 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22902 21:45:58.454 0.00000316 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22903 21:45:58.454 0.00147121 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22904 21:45:58.454 0.00019279 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22905 21:45:58.454 0.00110025 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22906 21:45:58.454 0.00000711 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22907 21:45:58.454 0.00129738 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22908 21:45:58.454 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22909 21:45:58.454 0.00136099 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22910 21:45:58.454 0.00005017 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22911 21:45:58.454 0.00120573 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22912 21:45:58.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22913 21:45:58.454 0.00131753 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22914 21:45:58.454 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22915 21:45:58.454 0.00130370 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22916 21:45:58.454 0.00002449 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22917 21:45:58.454 0.00123101 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22918 21:45:58.454 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22919 21:45:58.454 0.00132543 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22920 21:45:58.454 0.00006360 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22921 21:45:58.454 0.00133847 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22922 21:45:58.469 0.00000395 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22923 21:45:58.469 0.00152494 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22924 21:45:58.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22925 21:45:58.469 0.00119546 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22926 21:45:58.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22927 21:45:58.469 0.00137244 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22928 21:45:58.469 0.00001778 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22929 21:45:58.469 0.00095565 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22930 21:45:58.469 0.00000514 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22931 21:45:58.469 0.00132899 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22932 21:45:58.469 0.00000474 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22933 21:45:58.469 0.00129462 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22934 21:45:58.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22935 21:45:58.469 0.00128237 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22936 21:45:58.469 0.00000356 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: RXCHAR TXEMPTY CTS DSR RLSD BREAK ERR RING 22937 21:45:58.469 0.00121521 UV4BAND_E_CPS. IOCTL_SERIAL_WAIT_ON_MASK COM1 SUCCESS 22938 21:45:58.469 0.00000237 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 06 22939 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 58 22940 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 1C 22941 21:45:58.469 0.00001817 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 80 22942 21:45:58.469 0.00003595 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: 40 22943 21:45:58.469 0.00002173 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22944 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22945 21:45:58.469 0.00007269 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22946 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22947 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22948 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22949 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22950 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22951 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22952 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22953 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22954 21:45:58.469 0.00001541 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22955 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22956 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22957 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22958 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22959 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22960 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22961 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22962 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22963 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22964 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22965 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22966 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22967 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22968 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22969 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22970 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22971 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22972 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22973 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22974 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22975 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22976 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22977 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22978 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22979 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22980 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22981 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22982 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22983 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22984 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22985 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22986 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22987 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22988 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22989 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22990 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22991 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22992 21:45:58.469 0.00005649 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22993 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22994 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22995 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22996 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22997 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22998 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 22999 21:45:58.469 0.00000079 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23000 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23001 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23002 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23003 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23004 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23005 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23006 21:45:58.469 0.00000040 UV4BAND_E_CPS. IRP_MJ_READ COM1 SUCCESS Length: 1, Data: FF 23007 21:45:58.469 0.00001462 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: RXABORT RXCLEAR 23008 21:45:58.469 0.00013314 UV4BAND_E_CPS. IRP_MJ_WRITE COM1 SUCCESS Length: 1, Data: 06 23009 21:45:58.469 0.00001106 UV4BAND_E_CPS. IOCTL_SERIAL_SET_WAIT_MASK COM1 SUCCESS Mask: 23010 21:45:58.469 0.00021610 UV4BAND_E_CPS. IOCTL_SERIAL_CLR_DTR COM1 SUCCESS 23011 21:45:58.469 0.00003793 UV4BAND_E_CPS. IOCTL_SERIAL_PURGE COM1 SUCCESS Purge: TXABORT RXABORT TXCLEAR RXCLEAR 23012 21:45:58.469 0.02245532 UV4BAND_E_CPS. IRP_MJ_CLOSE COM1 SUCCESS Port Closed